Fix compilation of GDMA and periph enable in IDF 6 (#816)

Author: me-no-dev

target/esp32/ll_cam.c

@@ -45,6 +45,11 @@ static inline int gpio_ll_get_level(gpio_dev_t *hw, int gpio_num)
 #define gpio_matrix_in(a,b,c) esp_rom_gpio_connect_in_signal(a,b,c)
 #endif
 
+#if (ESP_IDF_VERSION_MAJOR > 5)
+#include "soc/dport_access.h"
+#include "soc/dport_reg.h"
+#endif
+
 #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 2) 
 #define ets_delay_us esp_rom_delay_us
 #endif
@@ -289,7 +294,12 @@ bool ll_cam_start(cam_obj_t *cam, int frame_pos)
 esp_err_t ll_cam_config(cam_obj_t *cam, const camera_config_t *config)
 {
     // Enable and configure I2S peripheral
+#if ESP_IDF_VERSION_MAJOR > 5
+    DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
+    DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
+#else
     periph_module_enable(PERIPH_I2S0_MODULE);
+#endif
 
     I2S0.conf.rx_reset = 1;
     I2S0.conf.rx_reset = 0;

target/esp32s2/ll_cam.c

@@ -33,6 +33,10 @@
 #define ets_delay_us(a) esp_rom_delay_us(a)
 #endif
 
+#if (ESP_IDF_VERSION_MAJOR > 5)
+#include "soc/dport_access.h"
+#endif
+
 static const char *TAG = "s2 ll_cam";
 
 #define I2S_ISR_ENABLE(i) {I2S0.int_clr.i = 1;I2S0.int_ena.i = 1;}
@@ -136,7 +140,12 @@ esp_err_t ll_cam_config(cam_obj_t *cam, const camera_config_t *config)
     if(err != ESP_OK) {
         return err;
     }
+#if ESP_IDF_VERSION_MAJOR > 5
+    DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
+    DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN0_REG, DPORT_I2S0_RST);
+#else
     periph_module_enable(PERIPH_I2S0_MODULE);
+#endif
     // Configure the clock
     I2S0.clkm_conf.clkm_div_num = 2; // 160MHz / 2 = 80MHz
     I2S0.clkm_conf.clkm_div_b = 0;

target/esp32s3/ll_cam.c

@@ -18,7 +18,6 @@
 #include "soc/lcd_cam_struct.h"
 #include "soc/lcd_cam_reg.h"
 #include "soc/gdma_struct.h"
-#include "soc/gdma_periph.h"
 #include "soc/gdma_reg.h"
 #include "hal/clk_gate_ll.h"
 #include "esp_private/gdma.h"
@@ -36,6 +35,12 @@
 #define ets_delay_us(a) esp_rom_delay_us(a)
 #endif
 
+#if (ESP_IDF_VERSION_MAJOR > 5)
+#include "soc/dport_access.h"
+#else
+#include "soc/gdma_periph.h"
+#endif
+
 #if !defined(SOC_GDMA_PAIRS_PER_GROUP) && defined(SOC_GDMA_PAIRS_PER_GROUP_MAX)
 #define SOC_GDMA_PAIRS_PER_GROUP SOC_GDMA_PAIRS_PER_GROUP_MAX
 #endif
@@ -235,16 +240,20 @@ static esp_err_t ll_cam_dma_init(cam_obj_t *cam)
     //     }
     // }
 
+#if ESP_IDF_VERSION_MAJOR > 5
+    if (!(DPORT_REG_GET_BIT(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_DMA_RST) == 0 &&
+          DPORT_REG_GET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN) != 0)) {
+        DPORT_CLEAR_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN);
+        DPORT_SET_PERI_REG_MASK(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_DMA_RST);
+        DPORT_SET_PERI_REG_MASK(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN);
+        DPORT_CLEAR_PERI_REG_MASK(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_DMA_RST);
+    }
+#else
     if (!periph_ll_periph_enabled(PERIPH_GDMA_MODULE)) {
         periph_ll_disable_clk_set_rst(PERIPH_GDMA_MODULE);
         periph_ll_enable_clk_clear_rst(PERIPH_GDMA_MODULE);
     }
-    // if (REG_GET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN) == 0) {
-    //     REG_CLR_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN);
-    //     REG_SET_BIT(SYSTEM_PERIP_CLK_EN1_REG, SYSTEM_DMA_CLK_EN);
-    //     REG_SET_BIT(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_DMA_RST);
-    //     REG_CLR_BIT(SYSTEM_PERIP_RST_EN1_REG, SYSTEM_DMA_RST);
-    // }
+#endif
     ll_cam_dma_reset(cam);
     return ESP_OK;
 }
@@ -405,7 +414,12 @@ esp_err_t ll_cam_set_pin(cam_obj_t *cam, const camera_config_t *config)
 esp_err_t ll_cam_init_isr(cam_obj_t *cam)
 {
 	esp_err_t ret = ESP_OK;
-    ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[0].pairs[cam->dma_num].rx_irq_id,
+    ret = esp_intr_alloc_intrstatus(
+#if (ESP_IDF_VERSION_MAJOR > 5)
+                                     ETS_DMA_IN_CH0_INTR_SOURCE + cam->dma_num,
+#else
+                                     gdma_periph_signals.groups[0].pairs[cam->dma_num].rx_irq_id,
+#endif
                                      ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED | CAMERA_ISR_IRAM_FLAG,
                                      (uint32_t)&GDMA.channel[cam->dma_num].in.int_st, GDMA_IN_SUC_EOF_CH0_INT_ST_M,
                                      ll_cam_dma_isr, cam, &cam->dma_intr_handle);