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alexforencichalexforencich
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Enable overtemp shutdown in constraints files
Signed-off-by: Alex Forencich <alex@alexforencich.com>
1 parent fd965f3 commit 1044fcf

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19 files changed

+47
-28
lines changed

19 files changed

+47
-28
lines changed

‎example/AU200/fpga_25g/fpga.xdc‎

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@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
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set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
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set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
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set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]
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set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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set_operating_conditions -design_power_budget 160
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‎example/AU250/fpga_25g/fpga.xdc‎

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@@ -12,6 +12,7 @@ set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
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set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
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set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
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set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]
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set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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set_operating_conditions -design_power_budget 160
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‎example/AU280/fpga_25g/fpga.xdc‎

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@@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design]
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set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
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set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]
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set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
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set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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set_operating_conditions -design_power_budget 160
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‎example/AU50/fpga_25g/fpga.xdc‎

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@@ -13,6 +13,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN DISABLE [current_design]
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set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
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set_property BITSTREAM.CONFIG.UNUSEDPIN PULLUP [current_design]
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set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
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set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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set_operating_conditions -design_power_budget 63
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‎example/Arty/fpga/fpga.xdc‎

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@@ -2,11 +2,12 @@
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# part: xc7a35t-csg324-1
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# General configuration
5-
set_property CFGBVS VCCO [current_design]
6-
set_property CONFIG_VOLTAGE 3.3 [current_design]
7-
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
8-
set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
9-
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
5+
set_property CFGBVS VCCO [current_design]
6+
set_property CONFIG_VOLTAGE 3.3 [current_design]
7+
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
8+
set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
9+
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
10+
set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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# 100 MHz clock
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set_property -dict {LOC E3 IOSTANDARD LVCMOS33} [get_ports clk]

‎example/ExaNIC_X10/fpga/fpga.xdc‎

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@@ -2,13 +2,14 @@
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# part: xcku035-fbva676-2-e
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# General configuration
5-
set_property CFGBVS GND [current_design]
6-
set_property CONFIG_VOLTAGE 1.8 [current_design]
7-
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
8-
set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design]
9-
set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
10-
set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2 [current_design]
11-
set_property CONFIG_MODE BPI16 [current_design]
5+
set_property CFGBVS GND [current_design]
6+
set_property CONFIG_VOLTAGE 1.8 [current_design]
7+
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
8+
set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design]
9+
set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
10+
set_property BITSTREAM.CONFIG.BPI_SYNC_MODE Type2 [current_design]
11+
set_property CONFIG_MODE BPI16 [current_design]
12+
set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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# 100 MHz system clock
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set_property -dict {LOC D18 IOSTANDARD LVDS} [get_ports clk_100mhz_p]

‎example/HTG9200/fpga_25g/fpga.xdc‎

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@@ -9,6 +9,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design]
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set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
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set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8 [current_design]
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set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
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set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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# System clocks
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# DDR4 clocks from U5 (200 MHz)

‎example/HTG9200/fpga_fmc_htg_6qsfp_25g/fpga.xdc‎

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Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN {DIV-1} [current_design]
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set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
1010
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 8 [current_design]
1111
set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
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set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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# System clocks
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# DDR4 clocks from U5 (200 MHz)

‎example/KC705/fpga_gmii/fpga.xdc‎

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@@ -2,9 +2,10 @@
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# part: xc7k325tffg900-2
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# General configuration
5-
set_property CFGBVS VCCO [current_design]
6-
set_property CONFIG_VOLTAGE 2.5 [current_design]
7-
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
5+
set_property CFGBVS VCCO [current_design]
6+
set_property CONFIG_VOLTAGE 2.5 [current_design]
7+
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
8+
set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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# System clocks
1011
# 200 MHz

‎example/KC705/fpga_rgmii/fpga.xdc‎

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@@ -2,9 +2,10 @@
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# part: xc7k325tffg900-2
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# General configuration
5-
set_property CFGBVS VCCO [current_design]
6-
set_property CONFIG_VOLTAGE 2.5 [current_design]
7-
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
5+
set_property CFGBVS VCCO [current_design]
6+
set_property CONFIG_VOLTAGE 2.5 [current_design]
7+
set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
8+
set_property BITSTREAM.CONFIG.OVERTEMPSHUTDOWN Enable [current_design]
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# System clocks
1011
# 200 MHz

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