diff --git a/.gitignore b/.gitignore index 23b04b41b..54ec7938a 100644 --- a/.gitignore +++ b/.gitignore @@ -31,6 +31,12 @@ ipch/ *.VC.db +# Visual Studio Code +.vscode/* +!.vscode/settings.json +!.vscode/tasks.json +!.vscode/launch.json + !/tools/bin/ #uVision @@ -53,7 +59,18 @@ ReleaseNotesCrypto.txt /Solutions/Windows/TinyCLR/FLASH_MEMORY.bin *.opendb *.dbgconf +!STM32Cube/ReadMe.m /tools/DisAsmPE/Debug /tools/DisAsmPE/DisAsmPE/Debug /tools/DisAsmPE/NETMF.PE.Metadata/Debug /tools/DisAsmPE/DisAsmPE/*.txt + +# STM32 Cube +STM32Cube/* +!STM32Cube/ReadMe.m + +# CMSIS PAL and HAL folders +DeviceCode/Targets/Native/*/HAL_Driver +DeviceCode/Targets/Native/*/USB/STM32_USB_Device_Library +!DeviceCode/Targets/Native/*.proj +!DeviceCode/Targets/Native/*.settings diff --git a/Application/MicroBooter/MicroBooter.cpp b/Application/MicroBooter/MicroBooter.cpp index 4185b6247..0675649c1 100644 --- a/Application/MicroBooter/MicroBooter.cpp +++ b/Application/MicroBooter/MicroBooter.cpp @@ -3,7 +3,7 @@ // // // Microsoft dotNetMF Project -// Copyright ©2004 Microsoft Corporation +// Copyright �2004 Microsoft Corporation // One Microsoft Way, Redmond, Washington 98052-6399 U.S.A. // All rights reserved. // MICROSOFT CONFIDENTIAL @@ -22,7 +22,7 @@ BOOL MemStreamSeekBlockAddress( BlockStorageStream &stream, UINT32 address ); static SREC_Handler g_SREC; #endif -HAL_DECLARE_CUSTOM_HEAP( SimpleHeap_Allocate, SimpleHeap_Release, SimpleHeap_ReAllocate ); +//HAL_DECLARE_CUSTOM_HEAP( SimpleHeap_Allocate, SimpleHeap_Release, SimpleHeap_ReAllocate ); #pragma arm section zidata = "s_SystemStates" static INT32 s_SystemStates[SYSTEM_STATE_TOTAL_STATES]; @@ -438,8 +438,8 @@ void BootEntryLoader() HeapLocation( BaseAddress, SizeInBytes ); - // Initialize custom heap with heap block returned from CustomHeapLocation - SimpleHeap_Initialize( BaseAddress, SizeInBytes ); + //// Initialize custom heap with heap block returned from CustomHeapLocation + //SimpleHeap_Initialize( BaseAddress, SizeInBytes ); // this is the place where interrupts are enabled after boot for the first time after boot ENABLE_INTERRUPTS(); diff --git a/Application/MicroBooter/SrecProcessor.cpp b/Application/MicroBooter/SrecProcessor.cpp index feb4b904b..5cbfd8b22 100644 --- a/Application/MicroBooter/SrecProcessor.cpp +++ b/Application/MicroBooter/SrecProcessor.cpp @@ -75,7 +75,9 @@ BOOL SREC_Handler::Process( char c ) { ApplicationStartAddress str = (ApplicationStartAddress)m_ImageStart; + #ifdef FEATURE_LCD LCD_Clear(); + #endif DebuggerPort_Uninitialize( HalSystemConfig.DebuggerPorts[0] ); @@ -83,7 +85,9 @@ BOOL SREC_Handler::Process( char c ) LCD_Uninitialize(); + #ifdef FEATURE_CPUCACHE CPU_DisableCaches(); + #endif (*str)(); } diff --git a/Application/TinyBooter/Commands.cpp b/Application/TinyBooter/Commands.cpp index e130c73c2..57962e4a2 100644 --- a/Application/TinyBooter/Commands.cpp +++ b/Application/TinyBooter/Commands.cpp @@ -80,7 +80,7 @@ struct BitFieldManager { const BlockDeviceInfo* deviceInfo = m_blockDevice->GetDeviceInfo(); - data = (BYTE*)private_malloc( m_region->BytesPerBlock ); + data = (BYTE*)malloc( m_region->BytesPerBlock ); if(data != NULL) { @@ -99,7 +99,7 @@ struct BitFieldManager ConfigurationSector *pCfg = (ConfigurationSector*)data; memset( (void*)&pCfg->SignatureCheck[ 0 ], 0xFF, sizeof(pCfg->SignatureCheck) ); m_blockDevice->Write( m_cfgPhysicalAddress, m_region->BytesPerBlock,data, FALSE ); - private_free(data); + free(data); } else { @@ -140,7 +140,12 @@ struct BitFieldManager dataAddr = (volatile FLASH_WORD*)&m_signatureCheck->BitField[ sectorIndex / BITS_PER_UINT32 ]; // read back the + +#ifdef FEATURE_CPUCACHE dataRdAddr = (volatile FLASH_WORD*)CPU_GetUncachableAddress( dataAddr ); +#else + dataRdAddr = (volatile FLASH_WORD*)dataAddr; +#endif data = (*dataRdAddr) & ~( 1ul << (sectorIndex % BITS_PER_UINT32) ); // write directly @@ -150,7 +155,7 @@ struct BitFieldManager else { UINT32 length = m_region->BytesPerBlock; - BYTE* dataptr = (BYTE*)private_malloc(length); + BYTE* dataptr = (BYTE*)malloc(length); if(dataptr != NULL) { @@ -174,7 +179,7 @@ struct BitFieldManager // write back to sector, as we only change one bit from 0 to 1, no need to erase sector m_blockDevice->Write( m_cfgPhysicalAddress, length, dataptr, FALSE ); - private_free(dataptr); + free(dataptr); } } @@ -227,7 +232,7 @@ struct BitFieldManager UINT32 length = sizeof(ConfigurationSector); memset( &m_skipCfgSectorCheck, 0xff, sizeof(m_skipCfgSectorCheck) ); - data = (BYTE*)private_malloc(length); + data = (BYTE*)malloc(length); stream.Device->Read( m_cfgPhysicalAddress, length, (BYTE *)data ); configSector = (ConfigurationSector*)data; m_signatureCheck = NULL; @@ -253,13 +258,17 @@ struct BitFieldManager m_signatureCheck = &m_skipCfgSectorCheck; } - private_free(data); + free(data); } else // XIP device { +#ifdef FEATURE_CPUCACHE configSector = (ConfigurationSector*)CPU_GetUncachableAddress( m_cfgPhysicalAddress ); // global config not in flash for bootloader +#else + configSector = (ConfigurationSector*)m_cfgPhysicalAddress; // global config not in flash for bootloader +#endif m_signatureCheck = NULL; @@ -476,7 +485,7 @@ static bool AccessMemory( UINT32 location, UINT32 lengthInBytes, BYTE* buf, int { if (mode == AccessMemory_Check) { - bufPtr = (BYTE*) private_malloc(NumOfBytes); + bufPtr = (BYTE*) malloc(NumOfBytes); if(!bufPtr) return false; } @@ -486,7 +495,7 @@ static bool AccessMemory( UINT32 location, UINT32 lengthInBytes, BYTE* buf, int { if (mode == AccessMemory_Check) { - private_free(bufPtr); + free(bufPtr); } break; @@ -495,7 +504,7 @@ static bool AccessMemory( UINT32 location, UINT32 lengthInBytes, BYTE* buf, int if (mode == AccessMemory_Check) { *(UINT32*)buf = SUPPORT_ComputeCRC( bufPtr, NumOfBytes, *(UINT32*)buf ); - private_free(bufPtr); + free(bufPtr); } } break; @@ -525,18 +534,18 @@ static bool AccessMemory( UINT32 location, UINT32 lengthInBytes, BYTE* buf, int { if(g_ConfigBuffer != NULL) { - private_free(g_ConfigBuffer); + free(g_ConfigBuffer); } g_ConfigBufferLength = 0; - // g_ConfigBuffer = (UINT8*)private_malloc(pRegion->BytesPerBlock); + // g_ConfigBuffer = (UINT8*)malloc(pRegion->BytesPerBlock); // Just allocate the configuration Sector size, configuration block can be large and not necessary to have that buffer. - g_ConfigBuffer = (UINT8*)private_malloc(g_ConfigBufferTotalSize); + g_ConfigBuffer = (UINT8*)malloc(g_ConfigBufferTotalSize); } else if(g_ConfigBufferTotalSize < ( g_ConfigBufferLength + lengthInBytes)) { - UINT8* tmp = (UINT8*)private_malloc(g_ConfigBufferLength + lengthInBytes); + UINT8* tmp = (UINT8*)malloc(g_ConfigBufferLength + lengthInBytes); if(tmp == NULL) { @@ -545,7 +554,7 @@ static bool AccessMemory( UINT32 location, UINT32 lengthInBytes, BYTE* buf, int memcpy( tmp, g_ConfigBuffer, g_ConfigBufferLength ); - private_free(g_ConfigBuffer); + free(g_ConfigBuffer); g_ConfigBuffer = tmp; } @@ -754,7 +763,7 @@ bool Loader_Engine::SignedDataState::VerifySignature( UINT8* signature, UINT32 l const BlockDeviceInfo* deviceInfo = m_pDevice->GetDeviceInfo(); if(!deviceInfo->Attribute.SupportsXIP) { - signCheckedAddr = (BYTE*)private_malloc(m_dataLength); + signCheckedAddr = (BYTE*)malloc(m_dataLength); if (signCheckedAddr == NULL) { EraseMemoryAndReset(); @@ -764,7 +773,7 @@ bool Loader_Engine::SignedDataState::VerifySignature( UINT8* signature, UINT32 l if(!m_pDevice->Read( m_dataAddress, m_dataLength, signCheckedAddr )) { EraseMemoryAndReset(); - private_free(signCheckedAddr); + free(signCheckedAddr); return false; } @@ -791,7 +800,7 @@ bool Loader_Engine::SignedDataState::VerifySignature( UINT8* signature, UINT32 l if(!deviceInfo->Attribute.SupportsXIP) { - private_free(signCheckedAddr); + free(signCheckedAddr); } return fret; @@ -1076,7 +1085,9 @@ void Loader_Engine::Launch( ApplicationStartAddress startAddress ) if (retAddress != NULL) startAddress = retAddress; + #ifdef FEATURE_LCD LCD_Clear(); + #endif DebuggerPort_Flush( m_port ); @@ -1089,9 +1100,13 @@ void Loader_Engine::Launch( ApplicationStartAddress startAddress ) DISABLE_INTERRUPTS(); + #ifdef FEATURE_LCD LCD_Uninitialize(); + #endif + #ifdef FEATURE_CPUCACHE CPU_DisableCaches(); + #endif if(Tinybooter_ImageIsCompressed()) { @@ -1426,8 +1441,8 @@ bool Loader_Engine::Monitor_MemoryMap( WP_Message* msg ) map[ 0 ].m_length = HalSystemConfig.RAM1.Size; map[ 0 ].m_flags = CLR_DBG_Commands::Monitor_MemoryMap::c_RAM; - map[ 1 ].m_address = HalSystemConfig.FLASH.Base; - map[ 1 ].m_length = HalSystemConfig.FLASH.Size; + map[ 1 ].m_address = HalSystemConfig.FLASH1.Base; + map[ 1 ].m_length = HalSystemConfig.FLASH1.Size; map[ 1 ].m_flags = CLR_DBG_Commands::Monitor_MemoryMap::c_FLASH; ReplyToCommand( msg, true, false, map, sizeof(map) ); @@ -1542,7 +1557,7 @@ bool Loader_Engine::Monitor_FlashSectorMap( WP_Message* msg ) if(cnt == 1) { - pData = (struct Flash_Sector*)private_malloc(rangeCount * sizeof(struct Flash_Sector)); + pData = (struct Flash_Sector*)malloc(rangeCount * sizeof(struct Flash_Sector)); if(pData == NULL) { @@ -1582,7 +1597,7 @@ bool Loader_Engine::Monitor_FlashSectorMap( WP_Message* msg ) ReplyToCommand(msg, true, false, (void*)pData, rangeCount * sizeof (struct Flash_Sector) ); - private_free(pData); + free(pData); return true; } diff --git a/Application/TinyBooter/ConfigurationManager.cpp b/Application/TinyBooter/ConfigurationManager.cpp index c3a43da18..807483071 100644 --- a/Application/TinyBooter/ConfigurationManager.cpp +++ b/Application/TinyBooter/ConfigurationManager.cpp @@ -38,7 +38,11 @@ void ConfigurationSectorManager::LocateConfigurationSector( UINT32 BlockUsage ) m_fSupportsXIP = TRUE; m_fUsingRAM = FALSE; // Get the real address +#ifdef FEATURE_CPUCACHE m_configurationSector = (ConfigurationSector *)CPU_GetUncachableAddress( m_cfgPhysicalAddress ); +#else + m_configurationSector = (ConfigurationSector *)m_cfgPhysicalAddress; +#endif } else { @@ -74,7 +78,11 @@ void ConfigurationSectorManager::LoadConfiguration() if (m_fSupportsXIP) { // Get the real address +#ifdef FEATURE_CPUCACHE m_configurationSector = (ConfigurationSector *)CPU_GetUncachableAddress( m_cfgPhysicalAddress ); +#else + m_configurationSector = (ConfigurationSector *)m_cfgPhysicalAddress; +#endif return ; } @@ -130,7 +138,7 @@ void ConfigurationSectorManager::WriteConfiguration( UINT32 writeOffset, BYTE *d // Copy the whole block to a buffer, for NonXIP or need to erase block if ((eraseWrite) || (!m_fSupportsXIP)) { - configurationInBytes =(BYTE*)private_malloc(writeLengthInBytes); + configurationInBytes =(BYTE*)malloc(writeLengthInBytes); // load data to the local buffer. if (configurationInBytes) @@ -154,7 +162,7 @@ void ConfigurationSectorManager::WriteConfiguration( UINT32 writeOffset, BYTE *d // rewrite from the start of block m_device->Write( m_cfgPhysicalAddress, writeLengthInBytes, configurationInBytes, FALSE ); - private_free(configurationInBytes); + free(configurationInBytes); } diff --git a/Application/TinyBooter/CryptoInterface.cpp b/Application/TinyBooter/CryptoInterface.cpp index caf1afe3c..c77bfc71c 100644 --- a/Application/TinyBooter/CryptoInterface.cpp +++ b/Application/TinyBooter/CryptoInterface.cpp @@ -10,7 +10,11 @@ extern int g_ConfigBufferLength; CryptoState::CryptoState( UINT32 dataAddress, UINT32 dataLength, BYTE* sig, UINT32 sigLength, UINT32 sectorType ) : #if defined(ARM_V1_2) +#ifdef FEATURE_CPUCACHE m_dataAddress( CPU_GetCachableAddress( dataAddress ) ), +#else + m_dataAddress(dataAddress), +#endif #else m_dataAddress( dataAddress ), #endif @@ -111,7 +115,7 @@ bool CryptoState::VerifySignature( UINT32 keyIndex ) } // free RAM buffer - private_free(g_ConfigBuffer); + free(g_ConfigBuffer); g_ConfigBuffer = NULL; return fRet; diff --git a/Application/TinyBooter/TinyBooter.cpp b/Application/TinyBooter/TinyBooter.cpp index 9b98750bc..199f3db5f 100644 --- a/Application/TinyBooter/TinyBooter.cpp +++ b/Application/TinyBooter/TinyBooter.cpp @@ -16,11 +16,11 @@ extern bool WaitForTinyBooterUpload( INT32 &timeout_ms ); Loader_Engine g_eng; -//--// +// //--// -HAL_DECLARE_CUSTOM_HEAP( SimpleHeap_Allocate, SimpleHeap_Release, SimpleHeap_ReAllocate ); +// HAL_DECLARE_CUSTOM_HEAP( SimpleHeap_Allocate, SimpleHeap_Release, SimpleHeap_ReAllocate ); -//--// +// //--// void ApplicationEntryPoint() { @@ -32,7 +32,6 @@ void ApplicationEntryPoint() UINT32 SizeInBytes; HeapLocation ( BaseAddress, SizeInBytes ); - SimpleHeap_Initialize( BaseAddress, SizeInBytes ); g_eng.Initialize( HalSystemConfig.DebuggerPorts[ 0 ] ); @@ -55,8 +54,10 @@ void ApplicationEntryPoint() if(enterBootMode) { +#ifdef FEATURE_LCD LCD_Clear(); - +#endif + hal_fprintf( STREAM_LCD, "TinyBooter v%d.%d.%d.%d\r\n", VERSION_MAJOR, VERSION_MINOR, VERSION_BUILD, VERSION_REVISION); hal_fprintf( STREAM_LCD, "%s Build Date:\r\n\t%s %s\r\n", HalName, __DATE__, __TIME__ ); diff --git a/CLR/Core/CLR_RT_Memory.cpp b/CLR/Core/CLR_RT_Memory.cpp index 0b9998bc0..2039c288d 100644 --- a/CLR/Core/CLR_RT_Memory.cpp +++ b/CLR/Core/CLR_RT_Memory.cpp @@ -16,7 +16,7 @@ static int s_PreHeapInitIndex = 0; //////////////////////////////////////////////////////////// -HAL_DECLARE_CUSTOM_HEAP( CLR_RT_Memory::Allocate, CLR_RT_Memory::Release, CLR_RT_Memory::ReAllocate ); +//HAL_DECLARE_CUSTOM_HEAP( CLR_RT_Memory::Allocate, CLR_RT_Memory::Release, CLR_RT_Memory::ReAllocate ); //--// diff --git a/CLR/Debugger/Debugger.cpp b/CLR/Debugger/Debugger.cpp index 5b5c48684..e838900ee 100644 --- a/CLR/Debugger/Debugger.cpp +++ b/CLR/Debugger/Debugger.cpp @@ -901,8 +901,8 @@ bool CLR_DBG_Debugger::Monitor_MemoryMap( WP_Message* msg, void* owner ) map[0].m_length = HalSystemConfig.RAM1.Size; map[0].m_flags = CLR_DBG_Commands::Monitor_MemoryMap::c_RAM; - map[1].m_address = HalSystemConfig.FLASH.Base; - map[1].m_length = HalSystemConfig.FLASH.Size; + map[1].m_address = HalSystemConfig.FLASH1.Base; + map[1].m_length = HalSystemConfig.FLASH1.Size; map[1].m_flags = CLR_DBG_Commands::Monitor_MemoryMap::c_FLASH; dbg->m_messaging->ReplyToCommand( msg, true, false, map, sizeof(map) ); diff --git a/CLR/Libraries/SPOT_Hardware/spot_hardware_native_Microsoft_SPOT_Hardware_LargeBuffer.cpp b/CLR/Libraries/SPOT_Hardware/spot_hardware_native_Microsoft_SPOT_Hardware_LargeBuffer.cpp index 7a5b4f522..b647ed4c9 100644 --- a/CLR/Libraries/SPOT_Hardware/spot_hardware_native_Microsoft_SPOT_Hardware_LargeBuffer.cpp +++ b/CLR/Libraries/SPOT_Hardware/spot_hardware_native_Microsoft_SPOT_Hardware_LargeBuffer.cpp @@ -17,7 +17,7 @@ HRESULT Library_spot_hardware_native_Microsoft_SPOT_Hardware_LargeBuffer::Create reflex.m_levels = 1; reflex.m_data.m_type = g_CLR_RT_WellKnownTypes.m_UInt8; - CLR_RT_HeapBlock_Array* pData = (CLR_RT_HeapBlock_Array*)SimpleHeap_Allocate(size + sizeof(CLR_RT_HeapBlock_Array)); CHECK_ALLOCATION(pData); + CLR_RT_HeapBlock_Array* pData = (CLR_RT_HeapBlock_Array*)malloc(size + sizeof(CLR_RT_HeapBlock_Array)); CHECK_ALLOCATION(pData); CLR_RT_Memory::ZeroFill(pData, size + sizeof(CLR_RT_HeapBlock_Array)); @@ -57,7 +57,7 @@ HRESULT Library_spot_hardware_native_Microsoft_SPOT_Hardware_LargeBuffer::Intern CLR_RT_HeapBlock_Array* hbRef = hbBytes.DereferenceArray(); FAULT_ON_NULL(hbRef); - SimpleHeap_Release(hbRef); + free(hbRef); hbBytes.SetObjectReference( NULL ); @@ -112,7 +112,7 @@ HRESULT Library_spot_hardware_native_Microsoft_SPOT_Hardware_LargeBufferMarshall if(array->m_numOfElements != size) { - SimpleHeap_Release(array); + free(array); TINYCLR_CHECK_HRESULT(Library_spot_hardware_native_Microsoft_SPOT_Hardware_LargeBuffer::CreateBufferHelper( pLB[Library_spot_hardware_native_Microsoft_SPOT_Hardware_LargeBuffer::FIELD__m_bytes], size )); diff --git a/CMSIS/ReadMe.md b/CMSIS/ReadMe.md index d712fb476..72bcad7b0 100644 --- a/CMSIS/ReadMe.md +++ b/CMSIS/ReadMe.md @@ -2,6 +2,6 @@ This folder is a placeholder for the CMSIS source code installation. CMSIS is available from ARM on the [ARM web site](http://www.arm.com/products/processors/cortex-m/cortex-microcontroller-software-interface-standard.php) -CMSIS comes as a ZIP file, **_the version this code base is validated and tested with is v4.3 (CMSIS-SP-00300-r4p3-00rel0.zip)_** +CMSIS comes as a ZIP file, **_the version this code base is validated and tested with is v4.5 (CMSIS-SP-00300-r4p5-00rel0.zip)_** Extract the contents of the zip file into the same directory as this readme.md file. The build system will look for the CMSIS support files here. diff --git a/DeviceCode/Cores/arm/Processors/CortexMx/GlobalLock/SmartPtr_cortex.cpp b/DeviceCode/Cores/arm/Processors/CortexMx/GlobalLock/SmartPtr_cortex.cpp index 5d1fd943f..caee7ee4e 100644 --- a/DeviceCode/Cores/arm/Processors/CortexMx/GlobalLock/SmartPtr_cortex.cpp +++ b/DeviceCode/Cores/arm/Processors/CortexMx/GlobalLock/SmartPtr_cortex.cpp @@ -11,11 +11,14 @@ //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// #include +#include "processor_selector.h" + #define __CMSIS_GENERIC /* disable NVIC and Systick functions */ #if defined (CORTEX_M7) #include "core_cm7.h" #elif defined (CORTEX_M4) + #define __FPU_PRESENT 1 #include "core_cm4.h" #elif defined (CORTEX_M3) #include "core_cm3.h" diff --git a/DeviceCode/Cores/arm/Processors/CortexMx/ItmPort/ItmPort.cpp b/DeviceCode/Cores/arm/Processors/CortexMx/ItmPort/ItmPort.cpp index a62c83c75..7b8cdfd60 100644 --- a/DeviceCode/Cores/arm/Processors/CortexMx/ItmPort/ItmPort.cpp +++ b/DeviceCode/Cores/arm/Processors/CortexMx/ItmPort/ItmPort.cpp @@ -1,7 +1,5 @@ #include -#include "cmsis_generic.h" - // only one "generic" port supported for ITM tracing messages to hardware debugger // so pInstance is ignored static int ItmPort_Write( void* pInstance, const char* Data, size_t size ) diff --git a/DeviceCode/Cores/arm/Processors/CortexMx/TinyHal/GNU_S/OtherHandlers.s b/DeviceCode/Cores/arm/Processors/CortexMx/TinyHal/GNU_S/OtherHandlers.s new file mode 100644 index 000000000..d426718d6 --- /dev/null +++ b/DeviceCode/Cores/arm/Processors/CortexMx/TinyHal/GNU_S/OtherHandlers.s @@ -0,0 +1,82 @@ +@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ +@@ This file is part of the Microsoft .NET Micro Framework Porting Kit Code Samples and is unsupported. +@@ Copyright (c) Microsoft Open Technologies, Inc. All rights reserved. +@@ +@@ Licensed under the Apache License, Version 2.0 (the "License")@ you may not use these files except in compliance with the License. +@@ You may obtain a copy of the License at: +@@ +@@ http://www.apache.org/licenses/LICENSE-2.0 +@@ +@@ Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, +@@ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing +@@ permissions and limitations under the License. +@@ +@@ !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! +@@ NOTE: +@@ This is only an example for use as a template in creating SoC specific versions and is not intended to be used directly +@@ for any particular SoC. Each SoC must provide a version of these handlers (and the corresponding VectorTables) that is +@@ specific to the SoC. +@@ !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! +@@ +@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ + + .syntax unified + .arch armv7-m + .thumb + +@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ +@ Dummy Exception Handlers (infinite loops which can be overloaded since they are exported with weak linkage ) + + .section SectionForBootsrtapOperations, "ax", %progbits + + .global FAULT_SubHandler + .extern FAULT_Handler @ void FAULT_Handler(UINT32*, UINT32) + + .global HARD_Breakpoint + .extern HARD_Breakpoint_Handler @ HARD_Breakpoint_Handler(UINT32*) + +@ This serves as an adapter from the Cortex-M exception signature +@ to map back to the original CLR API designed around the older ARM +@ mode exception architecture. + .section i.FAULT_SubHandler, "ax", %progbits + .thumb_func + +FAULT_SubHandler: + @ on entry, we have an exception frame on the stack: + @ SP+00: R0 + @ SP+04: R1 + @ SP+08: R2 + @ SP+12: R3 + @ SP+16: R12 + @ SP+20: LR + @ SP+24: PC + @ SP+28: PSR + @ R0-R12 are not overwritten yet + add sp,sp,#16 @ remove R0-R3 + push {r0-r11} @ store R0-R11 + mov r0,sp + @ R0+00: R0-R12 + @ R0+52: LR + @ R0+56: PC + @ R0+60: PSR + mrs r1,IPSR @ exception number + b FAULT_Handler + @ never expect to return + + .section i.HARD_Breakpoint, "ax", %progbits + HARD_Breakpoint: + @ on entry, were are being called from C/C++ in Thread mode + add sp,sp,#-4 @ space for PSR + push {r14} @ store original PC + push {r0-r12,r14} @ store R0 - R12, LR + mov r0,sp + mrs r1,XPSR + str r1,[r0,#60] @ store PSR + @ R0+00: R0-R12 + @ R0+52: LR + @ R0+56: PC + @ R0+60: PSR + b HARD_Breakpoint_Handler + @ never expect to return + +.end diff --git a/DeviceCode/Cores/arm/Processors/CortexMx/TinyHal/RVD_S/OtherHandlers.s b/DeviceCode/Cores/arm/Processors/CortexMx/TinyHal/RVD_S/OtherHandlers.s new file mode 100644 index 000000000..61087e420 --- /dev/null +++ b/DeviceCode/Cores/arm/Processors/CortexMx/TinyHal/RVD_S/OtherHandlers.s @@ -0,0 +1,82 @@ +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; This file is part of the Microsoft .NET Micro Framework Porting Kit Code Samples and is unsupported. +;; Copyright (c) Microsoft Open Technologies, Inc. All rights reserved. +;; +;; Licensed under the Apache License, Version 2.0 (the "License"); you may not use these files except in compliance with the License. +;; You may obtain a copy of the License at: +;; +;; http://www.apache.org/licenses/LICENSE-2.0 +;; +;; Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, +;; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing +;; permissions and limitations under the License. +;; +;; !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! +;; NOTE: +;; This is only an example for use as a template in creating SoC specific versions and is not intended to be used directly +;; for any particular SoC. Each SoC must provide a version of these handlers (and the corresponding VectorTables) that is +;; specific to the SoC. +;; !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! +;; +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + + PRESERVE8 + THUMB + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + AREA |SectionForBootstrapOperations|, CODE, READONLY + + + EXPORT FAULT_SubHandler + IMPORT FAULT_Handler ; void FAULT_Handler(UINT32*, UINT32) + + EXPORT HARD_Breakpoint + IMPORT HARD_Breakpoint_Handler ; HARD_Breakpoint_Handler(UINT32*) + +; This serves as an adapter from the Cortex-M exception signature +; to map back to the original CLR API designed around the older ARM +; mode exception architecture. + AREA ||i.FAULT_SubHandler||, CODE, READONLY +FAULT_SubHandler + ; on entry, we have an exception frame on the stack: + ; SP+00: R0 + ; SP+04: R1 + ; SP+08: R2 + ; SP+12: R3 + ; SP+16: R12 + ; SP+20: LR + ; SP+24: PC + ; SP+28: PSR + ; R0-R12 are not overwritten yet + add sp,sp,#16 ; remove R0-R3 + push {r0-r11} ; store R0-R11 + mov r0,sp + ; R0+00: R0-R12 + ; R0+52: LR + ; R0+56: PC + ; R0+60: PSR + mrs r1,IPSR ; exception number + b FAULT_Handler + ; never expect to return + + ;***************************************************************************** + + AREA ||i.HARD_Breakpoint||, CODE, READONLY +HARD_Breakpoint + ; on entry, were are being called from C/C++ in Thread mode + add sp,sp,#-4 ; space for PSR + push {r14} ; store original PC + push {r0-r12,r14} ; store R0 - R12, LR + mov r0,sp + mrs r1,XPSR + str r1,[r0,#60] ; store PSR + ; R0+00: R0-R12 + ; R0+52: LR + ; R0+56: PC + ; R0+60: PSR + b HARD_Breakpoint_Handler + ; never expect to return + + ;***************************************************************************** + + END \ No newline at end of file diff --git a/DeviceCode/Drivers/BlockStorage/SD/SD_BL_driver.cpp b/DeviceCode/Drivers/BlockStorage/SD/SD_BL_driver.cpp index b115dba04..6195c7157 100644 --- a/DeviceCode/Drivers/BlockStorage/SD/SD_BL_driver.cpp +++ b/DeviceCode/Drivers/BlockStorage/SD/SD_BL_driver.cpp @@ -364,10 +364,10 @@ BOOL SD_BS_Driver::ChipInitialize(void *context) // send CMD16, set block length to 512 #ifdef SD_DEBUG - debug_printf" SD SendCmdWithR1Resp: SD_SET_BLOCKLEN[512] -> R1_IN_READY_STATUS\r\n"); + debug_printf" SD SendCmdWithR1Resp: SD_CMD_SET_BLOCKLEN[512] -> R1_IN_READY_STATUS\r\n"); #endif - response = SD_SendCmdWithR1Resp(SD_SET_BLOCKLEN, 512, 0xFF, R1_IN_READY_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_SET_BLOCKLEN, 512, 0xFF, R1_IN_READY_STATUS); if(response != R1_IN_READY_STATUS) { @@ -391,10 +391,10 @@ BOOL SD_BS_Driver::ChipInitialize(void *context) #ifdef SD_DEBUG - debug_printf(" SD SendCmdWithR1Resp: SD_SEND_CSD[0] -> SD_START_DATA_BLOCK_TOKEN=%02X\r\n",SD_START_DATA_BLOCK_TOKEN); + debug_printf(" SD SendCmdWithR1Resp: SD_CMD_SEND_CSD[0] -> SD_START_DATA_BLOCK_TOKEN=%02X\r\n",SD_START_DATA_BLOCK_TOKEN); #endif - response = SD_SendCmdWithR1Resp(SD_SEND_CSD, 0, 0xFF, SD_START_DATA_BLOCK_TOKEN); + response = SD_SendCmdWithR1Resp(SD_CMD_SEND_CSD, 0, 0xFF, SD_START_DATA_BLOCK_TOKEN); if(response != SD_START_DATA_BLOCK_TOKEN) { @@ -412,7 +412,7 @@ BOOL SD_BS_Driver::ChipInitialize(void *context) //Table 5-5: TAAC Access Time Definition //TAAC bit position code - //2:0 time unit 0=1ns, 1=10ns, 2=100ns, 3=1µs, 4=10µs,5=100µs, 6=1ms, 7=10ms + //2:0 time unit 0=1ns, 1=10ns, 2=100ns, 3=1�s, 4=10�s,5=100�s, 6=1ms, 7=10ms //6:3 time value 0=reserved, 1=1.0, 2=1.2, 3=1.3, 4=1.5, 5=2.0, 6=2.5, 7=3.0, // 8=3.5, 9=4.0, A=4.5, B=5.0, C=5.5, D=6.0, E=7.0, F=8.0 // 7 reserved @@ -543,8 +543,8 @@ BOOL SD_BS_Driver::ChipInitialize(void *context) //CMD55+ACMD51 to get SCR register BYTE regSCR[8]; - SD_SendCmdWithR1Resp(SD_APP_CMD, 0, 0xFF, R1_IN_READY_STATUS); - response = SD_SendCmdWithR1Resp(SD_SEND_SCR, 0, 0xFF, SD_START_DATA_BLOCK_TOKEN); + SD_SendCmdWithR1Resp(SD_CMD_APP_CMD, 0, 0xFF, R1_IN_READY_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_SEND_SCR, 0, 0xFF, SD_START_DATA_BLOCK_TOKEN); if(response != SD_START_DATA_BLOCK_TOKEN) { @@ -582,7 +582,7 @@ BOOL SD_BS_Driver::ChipInitialize(void *context) BYTE ProductName[5]; - response = SD_SendCmdWithR1Resp(SD_SEND_CID, 0, 0xFF, SD_START_DATA_BLOCK_TOKEN); + response = SD_SendCmdWithR1Resp(SD_CMD_SEND_CID, 0, 0xFF, SD_START_DATA_BLOCK_TOKEN); if(response != SD_START_DATA_BLOCK_TOKEN) { @@ -652,7 +652,7 @@ BYTE SD_BS_Driver::SD_Cmd_GO_IDLE_STATE() // send CMD0, card should enter IDLE state for(i = 0; i < 10; i++) { - response = SD_SendCmdWithR1Resp(SD_GO_IDLE_STATE, 0, 0x95, R1_IN_IDLE_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_GO_IDLE_STATE, 0, 0x95, R1_IN_IDLE_STATUS); if(response == R1_IN_IDLE_STATUS) break; } @@ -687,7 +687,7 @@ BYTE SD_BS_Driver::ReadOCR_R3(UINT32* pOCR) *pOCR=0; // SD_SEND_OCR - BYTE R3response = SD_SendCmdWithR3Resp(SD_READ_OCR, 0, pOCR); + BYTE R3response = SD_SendCmdWithR3Resp(SD_CMD_READ_OCR, 0, pOCR); #ifdef SD_DEBUG debug_printf(" SD %s OCR=%08X : BUSY=%d CCS=%d\r\n",(Get_OCR_CCS() ? "HC/XC" : "SC"), @@ -725,7 +725,7 @@ BOOL SD_BS_Driver::SD_Cmd_SEND_IF_COND(BOOL isLowVoltageRequired, BOOL *pIs_SD_v supply_voltage = 1; CMD8_Arg |= (supply_voltage << 8); - BYTE R7response = SD_SendCmdWithR7Resp(SD_SEND_IF_COND, CMD8_Arg, &support_voltage); + BYTE R7response = SD_SendCmdWithR7Resp(SD_CMD_SEND_IF_COND, CMD8_Arg, &support_voltage); // check if command was successful? if(R7response == R7_ILLEGAL_COOMMAND) { @@ -765,9 +765,9 @@ BOOL SD_BS_Driver::SD_Set_In_READY_STATUS(BOOL isHC_XC_Supported) for(i=0; i<0x7fff; i++) { //send CMD55 + ACMD41 until return 0x00 for type 1 cards - SD_SendCmdWithR1Resp(SD_APP_CMD, 0, 0xFF, R1_IN_IDLE_STATUS); + SD_SendCmdWithR1Resp(SD_CMD_APP_CMD, 0, 0xFF, R1_IN_IDLE_STATUS); - response = SD_SendCmdWithR1Resp(SD_SEND_OP_COND, (isHC_XC_Supported ? CMD41_HCS_PATTERN : 0), 0xFF, R1_IN_READY_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_SEND_OP_COND, (isHC_XC_Supported ? CMD41_HCS_PATTERN : 0), 0xFF, R1_IN_READY_STATUS); if(response == R1_IN_READY_STATUS) { @@ -778,7 +778,7 @@ BOOL SD_BS_Driver::SD_Set_In_READY_STATUS(BOOL isHC_XC_Supported) if (isHC_XC_Supported) { // use v2.0 command - response = SD_SendCmdWithR1Resp(SD_V2_SEND_OP_COND, 0, 0xFF, R1_IN_READY_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_V2_SEND_OP_COND, 0, 0xFF, R1_IN_READY_STATUS); if(response == R1_IN_READY_STATUS) { return TRUE; @@ -890,7 +890,7 @@ BOOL SD_BS_Driver::ReadSector(SectorAddress sectorAddress, UINT32 Offset, UINT32 SD_CsSetLow(); // send CMD17 and wait for DATA_BLOCK_TOKEN - response = SD_SendCmdWithR1Resp(SD_READ_SINGLE_BLOCK, sectorAddress << 9, 0xff, SD_START_DATA_BLOCK_TOKEN, 10000); + response = SD_SendCmdWithR1Resp(SD_CMD_READ_SINGLE_BLOCK, sectorAddress << 9, 0xff, SD_START_DATA_BLOCK_TOKEN, 10000); if(response == SD_START_DATA_BLOCK_TOKEN) { @@ -1109,7 +1109,7 @@ BOOL SD_BS_Driver::WriteX(void *context, ByteAddress phyAddr, UINT32 NumBytes, B SD_CsSetLow(); // send CMD24 --read single block data - response = SD_SendCmdWithR1Resp(SD_WRITE_SINGLE_BLOCK, StartSector << 9, 0xff, R1_IN_READY_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_WRITE_SINGLE_BLOCK, StartSector << 9, 0xff, R1_IN_READY_STATUS); if(response == R1_IN_READY_STATUS) { @@ -1207,7 +1207,7 @@ BOOL SD_BS_Driver::EraseSectors(SectorAddress Address, INT32 SectorCount) SD_CsSetLow(); // cs low //send ERASE_WR_BLK_START command - response = SD_SendCmdWithR1Resp(SD_ERASE_WR_BLK_START, Address << 9, 0xff, R1_IN_READY_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_ERASE_WR_BLK_START, Address << 9, 0xff, R1_IN_READY_STATUS); if(response != R1_IN_READY_STATUS) { @@ -1216,7 +1216,7 @@ BOOL SD_BS_Driver::EraseSectors(SectorAddress Address, INT32 SectorCount) } //send ERASE_WR_BLK_END command - response = SD_SendCmdWithR1Resp(SD_ERASE_WR_BLK_END, (Address + SectorCount - 1) << 9, 0xff, R1_IN_READY_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_ERASE_WR_BLK_END, (Address + SectorCount - 1) << 9, 0xff, R1_IN_READY_STATUS); if(response != R1_IN_READY_STATUS) { @@ -1225,7 +1225,7 @@ BOOL SD_BS_Driver::EraseSectors(SectorAddress Address, INT32 SectorCount) } // send erase command - response = SD_SendCmdWithR1Resp(SD_ERASE, 0xffffffff, 0xff, R1_IN_READY_STATUS); + response = SD_SendCmdWithR1Resp(SD_CMD_ERASE, 0xffffffff, 0xff, R1_IN_READY_STATUS); if(response != R1_IN_READY_STATUS) { diff --git a/DeviceCode/Drivers/Stubs/BlockStorage/AddDevices/Bl_addDevices_stubs.cpp b/DeviceCode/Drivers/Stubs/BlockStorage/AddDevices/Bl_addDevices_stubs.cpp index 15c9394d7..12b9638ec 100644 --- a/DeviceCode/Drivers/Stubs/BlockStorage/AddDevices/Bl_addDevices_stubs.cpp +++ b/DeviceCode/Drivers/Stubs/BlockStorage/AddDevices/Bl_addDevices_stubs.cpp @@ -6,7 +6,6 @@ //--// -void BlockStorage_AddDevices() +__weak void BlockStorage_AddDevices() { } - diff --git a/DeviceCode/Drivers/Stubs/BlockStorage/Driver/BlockStorageDriver_stubs.cpp b/DeviceCode/Drivers/Stubs/BlockStorage/Driver/BlockStorageDriver_stubs.cpp index a35897bc7..44f750788 100644 --- a/DeviceCode/Drivers/Stubs/BlockStorage/Driver/BlockStorageDriver_stubs.cpp +++ b/DeviceCode/Drivers/Stubs/BlockStorage/Driver/BlockStorageDriver_stubs.cpp @@ -7,68 +7,68 @@ //--// -BOOL STUB_BlockStorage_Driver::ChipInitialize( void* context ) +__weak BOOL STUB_BlockStorage_Driver::ChipInitialize( void* context ) { return TRUE; } -BOOL STUB_BlockStorage_Driver::ChipUnInitialize( void* context ) +__weak BOOL STUB_BlockStorage_Driver::ChipUnInitialize( void* context ) { return TRUE; } -const BlockDeviceInfo* STUB_BlockStorage_Driver::GetDeviceInfo( void* context ) +__weak const BlockDeviceInfo* STUB_BlockStorage_Driver::GetDeviceInfo( void* context ) { return NULL; } -BOOL STUB_BlockStorage_Driver::ChipReadOnly( void* context, BOOL On, UINT32 ProtectionKey ) +__weak BOOL STUB_BlockStorage_Driver::ChipReadOnly( void* context, BOOL On, UINT32 ProtectionKey ) { return TRUE; } -BOOL STUB_BlockStorage_Driver::Read( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff) +__weak BOOL STUB_BlockStorage_Driver::Read( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff) { return TRUE; } -BOOL STUB_BlockStorage_Driver::Write(void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL ReadModifyWrite) +__weak BOOL STUB_BlockStorage_Driver::Write(void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL ReadModifyWrite) { return TRUE; } -BOOL STUB_BlockStorage_Driver::Memset(void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes) +__weak BOOL STUB_BlockStorage_Driver::Memset(void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes) { return TRUE; } -BOOL STUB_BlockStorage_Driver::GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata) +__weak BOOL STUB_BlockStorage_Driver::GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata) { return TRUE; } -BOOL STUB_BlockStorage_Driver::SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata) +__weak BOOL STUB_BlockStorage_Driver::SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata) { return TRUE; } -BOOL STUB_BlockStorage_Driver::IsBlockErased( void* context, ByteAddress Address, UINT32 BlockLength ) +__weak BOOL STUB_BlockStorage_Driver::IsBlockErased( void* context, ByteAddress Address, UINT32 BlockLength ) { return TRUE; } -BOOL STUB_BlockStorage_Driver::EraseBlock( void* context, ByteAddress Sector ) +__weak BOOL STUB_BlockStorage_Driver::EraseBlock( void* context, ByteAddress Sector ) { return TRUE; } -void STUB_BlockStorage_Driver::SetPowerState( void* context, UINT32 State ) +__weak void STUB_BlockStorage_Driver::SetPowerState( void* context, UINT32 State ) { return; } @@ -77,7 +77,7 @@ void STUB_BlockStorage_Driver::SetPowerState( void* context, UINT32 State ) // Public functions -BOOL STUB_BlockStorage_Driver::ReadProductID( void* context, FLASH_WORD& ManufacturerCode, FLASH_WORD& DeviceCode ) +__weak BOOL STUB_BlockStorage_Driver::ReadProductID( void* context, FLASH_WORD& ManufacturerCode, FLASH_WORD& DeviceCode ) { return TRUE; } @@ -90,13 +90,13 @@ BOOL STUB_BlockStorage_Driver::ReadProductID( void* context, FLASH_WORD& Manufac #pragma arm section code = "SectionForFlashOperations" #endif -UINT32 STUB_BlockStorage_Driver::MaxSectorWrite_uSec( void* context ) +__weak UINT32 STUB_BlockStorage_Driver::MaxSectorWrite_uSec( void* context ) { return 1; } -UINT32 STUB_BlockStorage_Driver::MaxBlockErase_uSec( void* context ) +__weak UINT32 STUB_BlockStorage_Driver::MaxBlockErase_uSec( void* context ) { return 1; @@ -133,6 +133,3 @@ struct IBlockStorageDevice g_I28F_16_BS_DeviceTable = #if defined(ADS_LINKER_BUG__NOT_ALL_UNUSED_VARIABLES_ARE_REMOVED) #pragma arm section rodata #endif - - - diff --git a/DeviceCode/Drivers/Stubs/GlobalLock/GlobalLock_stubs.cpp b/DeviceCode/Drivers/Stubs/GlobalLock/GlobalLock_stubs.cpp index 85383378c..fbdb9cb9f 100644 --- a/DeviceCode/Drivers/Stubs/GlobalLock/GlobalLock_stubs.cpp +++ b/DeviceCode/Drivers/Stubs/GlobalLock/GlobalLock_stubs.cpp @@ -6,54 +6,53 @@ #if !defined(ARM_V1_2) -SmartPtr_IRQ::SmartPtr_IRQ(void* context) +__weak SmartPtr_IRQ::SmartPtr_IRQ(void* context) { } -SmartPtr_IRQ::~SmartPtr_IRQ() +__weak SmartPtr_IRQ::~SmartPtr_IRQ() { } #endif -BOOL SmartPtr_IRQ::WasDisabled() +__weak BOOL SmartPtr_IRQ::WasDisabled() { return TRUE; } -void SmartPtr_IRQ::Acquire() +__weak void SmartPtr_IRQ::Acquire() { } -void SmartPtr_IRQ::Release() +__weak void SmartPtr_IRQ::Release() { } -void SmartPtr_IRQ::Probe() +__weak void SmartPtr_IRQ::Probe() { } -BOOL SmartPtr_IRQ::GetState(void* context) +__weak BOOL SmartPtr_IRQ::GetState(void* context) { return TRUE; } -BOOL SmartPtr_IRQ::ForceDisabled(void* context) +__weak BOOL SmartPtr_IRQ::ForceDisabled(void* context) { return TRUE; } -BOOL SmartPtr_IRQ::ForceEnabled(void* context) +__weak BOOL SmartPtr_IRQ::ForceEnabled(void* context) { return TRUE; } -void SmartPtr_IRQ::Disable() +__weak void SmartPtr_IRQ::Disable() { } -void SmartPtr_IRQ::Restore() +__weak void SmartPtr_IRQ::Restore() { } - diff --git a/DeviceCode/Drivers/Stubs/Network/Ethernet/EthernetDriver_stubs.cpp b/DeviceCode/Drivers/Stubs/Network/Ethernet/EthernetDriver_stubs.cpp index 1f740b3b0..06e01d1de 100644 --- a/DeviceCode/Drivers/Stubs/Network/Ethernet/EthernetDriver_stubs.cpp +++ b/DeviceCode/Drivers/Stubs/Network/Ethernet/EthernetDriver_stubs.cpp @@ -5,15 +5,17 @@ #include -BOOL Network_Interface_Bind(int index) +__weak BOOL Network_Interface_Bind(int index) { return FALSE; } -int Network_Interface_Open(int index) + +__weak int Network_Interface_Open(int index) { return 0; } -BOOL Network_Interface_Close(int index) + +__weak BOOL Network_Interface_Close(int index) { return FALSE; } diff --git a/DeviceCode/Drivers/Stubs/Network/Loopback/loopback_stubs.cpp b/DeviceCode/Drivers/Stubs/Network/Loopback/loopback_stubs.cpp index eadfbbefc..84bfed110 100644 --- a/DeviceCode/Drivers/Stubs/Network/Loopback/loopback_stubs.cpp +++ b/DeviceCode/Drivers/Stubs/Network/Loopback/loopback_stubs.cpp @@ -24,21 +24,21 @@ LOOPBACK_Driver g_LOOPBACK_Driver; INIT_FNCS RTP_FAR loop_fnc; -void init_loopback(void) +__weak void init_loopback(void) { } -int LOOPBACK_Driver::Open( ) +__weak int LOOPBACK_Driver::Open( ) { return 0; } -BOOL LOOPBACK_Driver::Close( ) +__weak BOOL LOOPBACK_Driver::Close( ) { return FALSE; } -BOOL LOOPBACK_Driver::Bind ( ) +__weak BOOL LOOPBACK_Driver::Bind ( ) { return FALSE; } diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_DA/stubs_functions_DA.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_DA/stubs_functions_DA.cpp index 7a5357e72..c28efd705 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_DA/stubs_functions_DA.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_DA/stubs_functions_DA.cpp @@ -6,31 +6,30 @@ //--// -BOOL DA_Initialize( DA_CHANNEL channel, INT32 precisionInBits ) +__weak BOOL DA_Initialize( DA_CHANNEL channel, INT32 precisionInBits ) { return FALSE; } -void DA_Uninitialize( DA_CHANNEL channel ) +__weak void DA_Uninitialize( DA_CHANNEL channel ) { } -void DA_Write( DA_CHANNEL channel, INT32 level ) +__weak void DA_Write( DA_CHANNEL channel, INT32 level ) { } -UINT32 DA_DAChannels() +__weak UINT32 DA_DAChannels() { return 0; } -GPIO_PIN DA_GetPinForChannel( DA_CHANNEL channel ) +__weak GPIO_PIN DA_GetPinForChannel( DA_CHANNEL channel ) { return GPIO_PIN_NONE; } -BOOL DA_GetAvailablePrecisionsForChannel( DA_CHANNEL channel, INT32* precisions, UINT32& size ) +__weak BOOL DA_GetAvailablePrecisionsForChannel( DA_CHANNEL channel, INT32* precisions, UINT32& size ) { size = 0; return FALSE; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_DMA/stubs_functions_DMA.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_DMA/stubs_functions_DMA.cpp index 023e590da..014b82e8b 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_DMA/stubs_functions_DMA.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_DMA/stubs_functions_DMA.cpp @@ -5,26 +5,24 @@ #include //--// -BOOL DMA_Initialize() +__weak BOOL DMA_Initialize() { return true; } -BOOL DMA_Uninitialize() +__weak BOOL DMA_Uninitialize() { return true; } -void DMA_MemCpy( void* dst, void*src, UINT32 size, BOOL async = FALSE ) +__weak void DMA_MemCpy( void* dst, void*src, UINT32 size, BOOL async = FALSE ) { } -void DMA_MemCpy2D( void* dst, void*src, UINT32 width, UINT32 height, UINT32 dataWidth, BOOL async = FALSE ) +__weak void DMA_MemCpy2D( void* dst, void*src, UINT32 width, UINT32 height, UINT32 dataWidth, BOOL async = FALSE ) { } -void DMA_StartDummyDMA() +__weak void DMA_StartDummyDMA() { } - - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_EBIU/stubs_functions_EBIU.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_EBIU/stubs_functions_EBIU.cpp index 7dfb1a999..16ce708d5 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_EBIU/stubs_functions_EBIU.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_EBIU/stubs_functions_EBIU.cpp @@ -5,12 +5,11 @@ #include //--// -void CPU_EBIU_ConfigMemoryBlock( const CPU_MEMORY_CONFIG& CPUMemoryConfig ) +__weak void CPU_EBIU_ConfigMemoryBlock( const CPU_MEMORY_CONFIG& CPUMemoryConfig ) { } -BOOL CPU_EBIU_Memory_ReadOnly( const CPU_MEMORY_CONFIG& CPUMemoryConfig, BOOL ReadOnly ) +__weak BOOL CPU_EBIU_Memory_ReadOnly( const CPU_MEMORY_CONFIG& CPUMemoryConfig, BOOL ReadOnly ) { return FALSE; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_I2C/stubs_functions_I2C.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_I2C/stubs_functions_I2C.cpp index 397818dd4..def7b2882 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_I2C/stubs_functions_I2C.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_I2C/stubs_functions_I2C.cpp @@ -7,32 +7,31 @@ //--// struct I2C_CONFIGURATION; -BOOL I2C_Internal_Initialize() +__weak BOOL I2C_Internal_Initialize() { return FALSE; } -BOOL I2C_Internal_Uninitialize() +__weak BOOL I2C_Internal_Uninitialize() { return FALSE; } -void I2C_Internal_XActionStart( I2C_HAL_XACTION* xAction, bool repeatedStart ) +__weak void I2C_Internal_XActionStart( I2C_HAL_XACTION* xAction, bool repeatedStart ) { } -void I2C_Internal_XActionStop() +__weak void I2C_Internal_XActionStop() { } -void I2C_Internal_GetClockRate( UINT32 rateKhz, UINT8& clockRate, UINT8& clockRate2) +__weak void I2C_Internal_GetClockRate( UINT32 rateKhz, UINT8& clockRate, UINT8& clockRate2) { return ; } -void I2C_Internal_GetPins( GPIO_PIN& scl, GPIO_PIN& sda ) +__weak void I2C_Internal_GetPins( GPIO_PIN& scl, GPIO_PIN& sda ) { scl = GPIO_PIN_NONE; sda = GPIO_PIN_NONE; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_INTC/stubs_functions_INTC.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_INTC/stubs_functions_INTC.cpp index 119a42802..ee8fad260 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_INTC/stubs_functions_INTC.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_INTC/stubs_functions_INTC.cpp @@ -5,42 +5,40 @@ #include //--// -void __irq IRQ_Handler() +__weak void __irq IRQ_Handler() { } -void CPU_INTC_Initialize() +__weak void CPU_INTC_Initialize() { } -BOOL CPU_INTC_ActivateInterrupt( UINT32 Irq_Index, HAL_CALLBACK_FPN ISR, void* ISR_Param ) +__weak BOOL CPU_INTC_ActivateInterrupt( UINT32 Irq_Index, HAL_CALLBACK_FPN ISR, void* ISR_Param ) { return FALSE; } -BOOL CPU_INTC_DeactivateInterrupt( UINT32 Irq_Index ) +__weak BOOL CPU_INTC_DeactivateInterrupt( UINT32 Irq_Index ) { return FALSE; } -BOOL CPU_INTC_InterruptEnable( UINT32 Irq_Index ) +__weak BOOL CPU_INTC_InterruptEnable( UINT32 Irq_Index ) { return FALSE; } -BOOL CPU_INTC_InterruptDisable( UINT32 Irq_Index ) +__weak BOOL CPU_INTC_InterruptDisable( UINT32 Irq_Index ) { return FALSE; } -BOOL CPU_INTC_InterruptEnableState( UINT32 Irq_Index ) +__weak BOOL CPU_INTC_InterruptEnableState( UINT32 Irq_Index ) { return FALSE; } -BOOL CPU_INTC_InterruptState( UINT32 Irq_Index ) +__weak BOOL CPU_INTC_InterruptState( UINT32 Irq_Index ) { return FALSE; } - - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_LCD/stubs_functions_LCD.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_LCD/stubs_functions_LCD.cpp index 4988cbe40..01ed21d41 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_LCD/stubs_functions_LCD.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_LCD/stubs_functions_LCD.cpp @@ -6,18 +6,17 @@ //--// -BOOL LCD_Controller_Initialize( DISPLAY_CONTROLLER_CONFIG& config ) +__weak BOOL LCD_Controller_Initialize( DISPLAY_CONTROLLER_CONFIG& config ) { return FALSE; } -BOOL LCD_Controller_Uninitialize() +__weak BOOL LCD_Controller_Uninitialize() { return TRUE; } -BOOL LCD_Controller_Enable( BOOL fEnable ) +__weak BOOL LCD_Controller_Enable( BOOL fEnable ) { return TRUE; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_MMU/stubs_functions_MMU.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_MMU/stubs_functions_MMU.cpp index d1317229a..64a0e5f81 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_MMU/stubs_functions_MMU.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_MMU/stubs_functions_MMU.cpp @@ -5,21 +5,19 @@ #include //--// -void CPU_InvalidateTLBs() +__weak void CPU_InvalidateTLBs() { } -void CPU_EnableMMU( void* TTB ) +__weak void CPU_EnableMMU( void* TTB ) { } -void CPU_DisableMMU() +__weak void CPU_DisableMMU() { } -BOOL CPU_IsMMUEnabled() +__weak BOOL CPU_IsMMUEnabled() { return FALSE; } - - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_PCU/stubs_functions_PCU.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_PCU/stubs_functions_PCU.cpp index 6715c46e5..7468fe0fd 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_PCU/stubs_functions_PCU.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_PCU/stubs_functions_PCU.cpp @@ -5,17 +5,15 @@ #include //--// -void CPU_PCU_Regulator_Switcher1_On () {} +__weak void CPU_PCU_Regulator_Switcher1_On () {} -void CPU_PCU_Regulator_Switcher1_Off() {} -BOOL CPU_PCU_Regulator_Switcher1_Status() { return TRUE; } - -void CPU_PCU_Regulator_Linear1_On () {} -void CPU_PCU_Regulator_Linear1_Off() {} -BOOL CPU_PCU_Regulator_Linear1_Status() { return FALSE; } - -void CPU_PCU_Regulator_Linear2_On () {} -void CPU_PCU_Regulator_Linear2_Off() {} -BOOL CPU_PCU_Regulator_Linear2_Status() { return FALSE; } +__weak void CPU_PCU_Regulator_Switcher1_Off() {} +__weak BOOL CPU_PCU_Regulator_Switcher1_Status() { return TRUE; } +__weak void CPU_PCU_Regulator_Linear1_On () {} +__weak void CPU_PCU_Regulator_Linear1_Off() {} +__weak BOOL CPU_PCU_Regulator_Linear1_Status() { return FALSE; } +__weak void CPU_PCU_Regulator_Linear2_On () {} +__weak void CPU_PCU_Regulator_Linear2_Off() {} +__weak BOOL CPU_PCU_Regulator_Linear2_Status() { return FALSE; } diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_PWM/stubs_functions_pwm.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_PWM/stubs_functions_pwm.cpp index 2d504f184..2d0c01279 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_PWM/stubs_functions_pwm.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_PWM/stubs_functions_pwm.cpp @@ -6,46 +6,45 @@ //--// -BOOL PWM_Initialize(PWM_CHANNEL channel) +__weak BOOL PWM_Initialize(PWM_CHANNEL channel) { return TRUE; } -BOOL PWM_Uninitialize(PWM_CHANNEL channel) +__weak BOOL PWM_Uninitialize(PWM_CHANNEL channel) { return TRUE; } -BOOL PWM_ApplyConfiguration(PWM_CHANNEL channel, GPIO_PIN pin, UINT32& period, UINT32& duration, PWM_SCALE_FACTOR& scale, BOOL invert) +__weak BOOL PWM_ApplyConfiguration(PWM_CHANNEL channel, GPIO_PIN pin, UINT32& period, UINT32& duration, PWM_SCALE_FACTOR& scale, BOOL invert) { return TRUE; } -BOOL PWM_Start(PWM_CHANNEL channel, GPIO_PIN pin) +__weak BOOL PWM_Start(PWM_CHANNEL channel, GPIO_PIN pin) { return TRUE; } -void PWM_Stop(PWM_CHANNEL channel, GPIO_PIN pin) +__weak void PWM_Stop(PWM_CHANNEL channel, GPIO_PIN pin) { } -BOOL PWM_Start(PWM_CHANNEL* channel, GPIO_PIN* pin, UINT32 count) +__weak BOOL PWM_Start(PWM_CHANNEL* channel, GPIO_PIN* pin, UINT32 count) { return TRUE; } -void PWM_Stop(PWM_CHANNEL* channel, GPIO_PIN* pin, UINT32 count) +__weak void PWM_Stop(PWM_CHANNEL* channel, GPIO_PIN* pin, UINT32 count) { } -UINT32 PWM_PWMChannels() +__weak UINT32 PWM_PWMChannels() { return 0; } -GPIO_PIN PWM_GetPinForChannel( PWM_CHANNEL channel ) +__weak GPIO_PIN PWM_GetPinForChannel( PWM_CHANNEL channel ) { return GPIO_PIN_NONE; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_PerfCounter/stubs_functions_Perf.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_PerfCounter/stubs_functions_Perf.cpp index 38b4fc70e..db619b142 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_PerfCounter/stubs_functions_Perf.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_PerfCounter/stubs_functions_Perf.cpp @@ -7,16 +7,15 @@ //--// -void Time_PerformanceCounter_Initialize() +__weak void Time_PerformanceCounter_Initialize() { } -void Time_PerformanceCounter_Uninitialize() +__weak void Time_PerformanceCounter_Uninitialize() { } -UINT32 Time_PerformanceCounter() +__weak UINT32 Time_PerformanceCounter() { return 0; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_SPI/stubs_functions_SPI.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_SPI/stubs_functions_SPI.cpp index b1c95c59f..dea9e5529 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_SPI/stubs_functions_SPI.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_SPI/stubs_functions_SPI.cpp @@ -14,51 +14,51 @@ #include //--// -BOOL CPU_SPI_Initialize() +__weak BOOL CPU_SPI_Initialize() { return TRUE; } -void CPU_SPI_Uninitialize() +__weak void CPU_SPI_Uninitialize() { } -BOOL CPU_SPI_nWrite16_nRead16( const SPI_CONFIGURATION& Configuration, UINT16* Write16, INT32 WriteCount, UINT16* Read16, INT32 ReadCount, INT32 ReadStartOffset ) +__weak BOOL CPU_SPI_nWrite16_nRead16( const SPI_CONFIGURATION& Configuration, UINT16* Write16, INT32 WriteCount, UINT16* Read16, INT32 ReadCount, INT32 ReadStartOffset ) { return FALSE; } -BOOL CPU_SPI_nWrite8_nRead8( const SPI_CONFIGURATION& Configuration, UINT8* Write8, INT32 WriteCount, UINT8* Read8, INT32 ReadCount, INT32 ReadStartOffset ) +__weak BOOL CPU_SPI_nWrite8_nRead8( const SPI_CONFIGURATION& Configuration, UINT8* Write8, INT32 WriteCount, UINT8* Read8, INT32 ReadCount, INT32 ReadStartOffset ) { return FALSE; } -BOOL CPU_SPI_Xaction_Start( const SPI_CONFIGURATION& Configuration ) +__weak BOOL CPU_SPI_Xaction_Start( const SPI_CONFIGURATION& Configuration ) { return FALSE; } -BOOL CPU_SPI_Xaction_Stop( const SPI_CONFIGURATION& Configuration ) +__weak BOOL CPU_SPI_Xaction_Stop( const SPI_CONFIGURATION& Configuration ) { return FALSE; } -BOOL CPU_SPI_Xaction_nWrite16_nRead16( SPI_XACTION_16& Transaction ) +__weak BOOL CPU_SPI_Xaction_nWrite16_nRead16( SPI_XACTION_16& Transaction ) { return FALSE; } -BOOL CPU_SPI_Xaction_nWrite8_nRead8( SPI_XACTION_8& Transaction ) +__weak BOOL CPU_SPI_Xaction_nWrite8_nRead8( SPI_XACTION_8& Transaction ) { return FALSE; } -UINT32 CPU_SPI_PortsCount() +__weak UINT32 CPU_SPI_PortsCount() { return 0; } -void CPU_SPI_GetPins( UINT32 spi_mod, GPIO_PIN& msk, GPIO_PIN& miso, GPIO_PIN& mosi ) +__weak void CPU_SPI_GetPins( UINT32 spi_mod, GPIO_PIN& msk, GPIO_PIN& miso, GPIO_PIN& mosi ) { msk = GPIO_PIN_NONE; miso = GPIO_PIN_NONE; @@ -66,17 +66,17 @@ void CPU_SPI_GetPins( UINT32 spi_mod, GPIO_PIN& msk, GPIO_PIN& miso, GPIO_PIN& m return; } -UINT32 CPU_SPI_MinClockFrequency( UINT32 spi_mod ) +__weak UINT32 CPU_SPI_MinClockFrequency( UINT32 spi_mod ) { return 0; } -UINT32 CPU_SPI_MaxClockFrequency( UINT32 spi_mod ) +__weak UINT32 CPU_SPI_MaxClockFrequency( UINT32 spi_mod ) { return 0; } -UINT32 CPU_SPI_ChipSelectLineCount( UINT32 spi_mod ) +__weak UINT32 CPU_SPI_ChipSelectLineCount( UINT32 spi_mod ) { return 0; } diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_USART/stubs_functions_USART.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_USART/stubs_functions_USART.cpp index 859dc5ac9..17e7a3dd1 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_USART/stubs_functions_USART.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_USART/stubs_functions_USART.cpp @@ -5,58 +5,58 @@ #include //--// -BOOL CPU_USART_Initialize( int ComPortNum, int BaudRate, int Parity, int DataBits, int StopBits, int FlowValue ) +__weak BOOL CPU_USART_Initialize( int ComPortNum, int BaudRate, int Parity, int DataBits, int StopBits, int FlowValue ) { return TRUE; } -BOOL CPU_USART_Uninitialize( int ComPortNum ) +__weak BOOL CPU_USART_Uninitialize( int ComPortNum ) { return TRUE; } -BOOL CPU_USART_TxBufferEmpty( int ComPortNum ) +__weak BOOL CPU_USART_TxBufferEmpty( int ComPortNum ) { return TRUE; } -BOOL CPU_USART_TxShiftRegisterEmpty( int ComPortNum ) +__weak BOOL CPU_USART_TxShiftRegisterEmpty( int ComPortNum ) { return TRUE; } -void CPU_USART_WriteCharToTxBuffer( int ComPortNum, UINT8 c ) +__weak void CPU_USART_WriteCharToTxBuffer( int ComPortNum, UINT8 c ) { } -void CPU_USART_TxBufferEmptyInterruptEnable( int ComPortNum, BOOL Enable ) +__weak void CPU_USART_TxBufferEmptyInterruptEnable( int ComPortNum, BOOL Enable ) { } -BOOL CPU_USART_TxBufferEmptyInterruptState( int ComPortNum ) +__weak BOOL CPU_USART_TxBufferEmptyInterruptState( int ComPortNum ) { return TRUE; } -void CPU_USART_RxBufferFullInterruptEnable( int ComPortNum, BOOL Enable ) +__weak void CPU_USART_RxBufferFullInterruptEnable( int ComPortNum, BOOL Enable ) { } -BOOL CPU_USART_RxBufferFullInterruptState( int ComPortNum ) +__weak BOOL CPU_USART_RxBufferFullInterruptState( int ComPortNum ) { return TRUE; } -void CPU_USART_ProtectPins( int ComPortNum, BOOL On ) +__weak void CPU_USART_ProtectPins( int ComPortNum, BOOL On ) { } -UINT32 CPU_USART_PortsCount() +__weak UINT32 CPU_USART_PortsCount() { return 0; } -void CPU_USART_GetPins( int ComPortNum, GPIO_PIN& rxPin, GPIO_PIN& txPin,GPIO_PIN& ctsPin, GPIO_PIN& rtsPin ) +__weak void CPU_USART_GetPins( int ComPortNum, GPIO_PIN& rxPin, GPIO_PIN& txPin,GPIO_PIN& ctsPin, GPIO_PIN& rtsPin ) { rxPin = GPIO_PIN_NONE; txPin = GPIO_PIN_NONE; @@ -66,27 +66,23 @@ void CPU_USART_GetPins( int ComPortNum, GPIO_PIN& rxPin, GPIO_PIN& txPin,GPIO_PI return; } -BOOL CPU_USART_SupportNonStandardBaudRate ( int ComPortNum ) +__weak BOOL CPU_USART_SupportNonStandardBaudRate ( int ComPortNum ) { return FALSE; } -void CPU_USART_GetBaudrateBoundary( int ComPortNum, UINT32& maxBaudrateHz, UINT32& minBaudrateHz ) +__weak void CPU_USART_GetBaudrateBoundary( int ComPortNum, UINT32& maxBaudrateHz, UINT32& minBaudrateHz ) { maxBaudrateHz = 0; minBaudrateHz = 0; } -BOOL CPU_USART_IsBaudrateSupported( int ComPortNum, UINT32 & BaudrateHz ) +__weak BOOL CPU_USART_IsBaudrateSupported( int ComPortNum, UINT32 & BaudrateHz ) { return FALSE; } -BOOL CPU_USART_TxHandshakeEnabledState( int comPort ) +__weak BOOL CPU_USART_TxHandshakeEnabledState( int comPort ) { return TRUE; } - - - - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_USB/stubs_functions_USB.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_USB/stubs_functions_USB.cpp index 64122a0df..0b6ef2e6f 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_USB/stubs_functions_USB.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_USB/stubs_functions_USB.cpp @@ -1,4 +1,4 @@ -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +__weak //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // Copyright (c) Microsoft Corporation. All rights reserved. //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// @@ -7,39 +7,37 @@ //--// struct USB_CONTROLLER_STATE; -USB_CONTROLLER_STATE *CPU_USB_GetState( int Controller ) +__weak USB_CONTROLLER_STATE *CPU_USB_GetState( int Controller ) { return NULL; } -HRESULT CPU_USB_Initialize( int Controller ) +__weak HRESULT CPU_USB_Initialize( int Controller ) { return S_OK; } -HRESULT CPU_USB_Uninitialize( int Controller ) +__weak HRESULT CPU_USB_Uninitialize( int Controller ) { return S_OK; } -BOOL CPU_USB_StartOutput( USB_CONTROLLER_STATE* State, int endpoint ) +__weak BOOL CPU_USB_StartOutput( USB_CONTROLLER_STATE* State, int endpoint ) { return FALSE; } -BOOL CPU_USB_RxEnable( USB_CONTROLLER_STATE* State, int endpoint ) +__weak BOOL CPU_USB_RxEnable( USB_CONTROLLER_STATE* State, int endpoint ) { return FALSE; } -BOOL CPU_USB_GetInterruptState() +__weak BOOL CPU_USB_GetInterruptState() { return FALSE; } -BOOL CPU_USB_ProtectPins( int Controller, BOOL On ) +__weak BOOL CPU_USB_ProtectPins( int Controller, BOOL On ) { return FALSE; } - - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_WATCHDOG/stubs_functions_WATCHDOG.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_WATCHDOG/stubs_functions_WATCHDOG.cpp index 3c05773ea..f7e2828a7 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_WATCHDOG/stubs_functions_WATCHDOG.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_WATCHDOG/stubs_functions_WATCHDOG.cpp @@ -6,20 +6,19 @@ //--// -HRESULT Watchdog_Enable( UINT32 TimeoutMilliseconds, WATCHDOG_INTERRUPT_CALLBACK isr, void* context ) +__weak HRESULT Watchdog_Enable( UINT32 TimeoutMilliseconds, WATCHDOG_INTERRUPT_CALLBACK isr, void* context ) { return CLR_E_FAIL; } -void Watchdog_Disable() +__weak void Watchdog_Disable() { } -void Watchdog_ResetCpu() +__weak void Watchdog_ResetCpu() { } -void Watchdog_ResetCounter() +__weak void Watchdog_ResetCounter() { } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_analog/stubs_functions_analog.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_analog/stubs_functions_analog.cpp index 4a962c00d..cc64dc400 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_analog/stubs_functions_analog.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_analog/stubs_functions_analog.cpp @@ -6,32 +6,31 @@ //--// -BOOL AD_Initialize( ANALOG_CHANNEL channel, INT32 precisionInBits ) +__weak BOOL AD_Initialize( ANALOG_CHANNEL channel, INT32 precisionInBits ) { return FALSE; } -void AD_Uninitialize( ANALOG_CHANNEL channel ) +__weak void AD_Uninitialize( ANALOG_CHANNEL channel ) { } -INT32 AD_Read( ANALOG_CHANNEL channel ) +__weak INT32 AD_Read( ANALOG_CHANNEL channel ) { return 0; } -UINT32 AD_ADChannels() +__weak UINT32 AD_ADChannels() { return 0; } -GPIO_PIN AD_GetPinForChannel( ANALOG_CHANNEL channel ) +__weak GPIO_PIN AD_GetPinForChannel( ANALOG_CHANNEL channel ) { return GPIO_PIN_NONE; } -BOOL AD_GetAvailablePrecisionsForChannel( ANALOG_CHANNEL channel, INT32* precisions, UINT32& size ) +__weak BOOL AD_GetAvailablePrecisionsForChannel( ANALOG_CHANNEL channel, INT32* precisions, UINT32& size ) { size = 0; return FALSE; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_bootstrap/stubs_functions_bootstrap.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_bootstrap/stubs_functions_bootstrap.cpp index 36f7595be..37ea52f8f 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_bootstrap/stubs_functions_bootstrap.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_bootstrap/stubs_functions_bootstrap.cpp @@ -6,7 +6,6 @@ //--// -void BootstrapCode() +__weak void BootstrapCode() { } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_cache/stubs_functions_cache.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_cache/stubs_functions_cache.cpp index 0a4b0f1f0..78dc20643 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_cache/stubs_functions_cache.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_cache/stubs_functions_cache.cpp @@ -2,27 +2,28 @@ // Copyright (c) Microsoft Corporation. All rights reserved. //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +#include #include //--// -void CPU_FlushCaches() +__weak void CPU_FlushCaches() { } -void CPU_DrainWriteBuffers() +__weak void CPU_DrainWriteBuffers() { } -void CPU_InvalidateCaches() +__weak void CPU_InvalidateCaches() { } -void CPU_EnableCaches() +__weak void CPU_EnableCaches() { } -void CPU_DisableCaches() +__weak void CPU_DisableCaches() { } @@ -38,15 +39,14 @@ template void CPU_InvalidateAddress( volatile T* address ) //--// -size_t CPU_GetCachableAddress( size_t address ) +__weak size_t CPU_GetCachableAddress( size_t address ) { return address; } //--// -size_t CPU_GetUncachableAddress( size_t address ) +__weak size_t CPU_GetUncachableAddress( size_t address ) { return address; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_cmu/stubs_functions_cmu.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_cmu/stubs_functions_cmu.cpp index 48bb74488..fc61b4f99 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_cmu/stubs_functions_cmu.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_cmu/stubs_functions_cmu.cpp @@ -5,17 +5,15 @@ #include //--// -UINT32 CPU_CMU_ReadPeripheralClock() +__weak UINT32 CPU_CMU_ReadPeripheralClock() { return 0; } -void CPU_CMU_ClockDivisor( UINT32 Divisor ) +__weak void CPU_CMU_ClockDivisor( UINT32 Divisor ) { } -void CPU_CMU_PeripheralClock( UINT32 Peripheral, BOOL On ) +__weak void CPU_CMU_PeripheralClock( UINT32 Peripheral, BOOL On ) { } - - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_gpio/stubs_functions_gpio.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_gpio/stubs_functions_gpio.cpp index d6379daf9..88154de78 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_gpio/stubs_functions_gpio.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_gpio/stubs_functions_gpio.cpp @@ -5,86 +5,86 @@ #include //--// -BOOL CPU_GPIO_Initialize() +__weak BOOL CPU_GPIO_Initialize() { return FALSE; } -BOOL CPU_GPIO_Uninitialize() +__weak BOOL CPU_GPIO_Uninitialize() { return FALSE; } -UINT32 CPU_GPIO_Attributes( GPIO_PIN Pin ) +__weak UINT32 CPU_GPIO_Attributes( GPIO_PIN Pin ) { return GPIO_ATTRIBUTE_NONE; } -void CPU_GPIO_DisablePin( GPIO_PIN Pin, GPIO_RESISTOR ResistorState, UINT32 Direction, GPIO_ALT_MODE AltFunction ) +__weak void CPU_GPIO_DisablePin( GPIO_PIN Pin, GPIO_RESISTOR ResistorState, UINT32 Direction, GPIO_ALT_MODE AltFunction ) { } -void CPU_GPIO_EnableOutputPin( GPIO_PIN Pin, BOOL InitialState ) +__weak void CPU_GPIO_EnableOutputPin( GPIO_PIN Pin, BOOL InitialState ) { } -BOOL CPU_GPIO_EnableInputPin( GPIO_PIN Pin, BOOL GlitchFilterEnable, GPIO_INTERRUPT_SERVICE_ROUTINE PIN_ISR, GPIO_INT_EDGE IntEdge, GPIO_RESISTOR ResistorState ) +__weak BOOL CPU_GPIO_EnableInputPin( GPIO_PIN Pin, BOOL GlitchFilterEnable, GPIO_INTERRUPT_SERVICE_ROUTINE PIN_ISR, GPIO_INT_EDGE IntEdge, GPIO_RESISTOR ResistorState ) { return FALSE; } -BOOL CPU_GPIO_EnableInputPin2( GPIO_PIN Pin, BOOL GlitchFilterEnable, GPIO_INTERRUPT_SERVICE_ROUTINE PIN_ISR, void* ISR_Param, GPIO_INT_EDGE IntEdge, GPIO_RESISTOR ResistorState ) +__weak BOOL CPU_GPIO_EnableInputPin2( GPIO_PIN Pin, BOOL GlitchFilterEnable, GPIO_INTERRUPT_SERVICE_ROUTINE PIN_ISR, void* ISR_Param, GPIO_INT_EDGE IntEdge, GPIO_RESISTOR ResistorState ) { return FALSE; } -BOOL CPU_GPIO_GetPinState( GPIO_PIN Pin ) +__weak BOOL CPU_GPIO_GetPinState( GPIO_PIN Pin ) { return FALSE; } -void CPU_GPIO_SetPinState( GPIO_PIN Pin, BOOL PinState ) +__weak void CPU_GPIO_SetPinState( GPIO_PIN Pin, BOOL PinState ) { } -BOOL CPU_GPIO_PinIsBusy( GPIO_PIN Pin ) +__weak BOOL CPU_GPIO_PinIsBusy( GPIO_PIN Pin ) { return FALSE; } -BOOL CPU_GPIO_ReservePin( GPIO_PIN Pin, BOOL fReserve ) +__weak BOOL CPU_GPIO_ReservePin( GPIO_PIN Pin, BOOL fReserve ) { return FALSE; } -UINT32 CPU_GPIO_GetDebounce() +__weak UINT32 CPU_GPIO_GetDebounce() { return 0; } -BOOL CPU_GPIO_SetDebounce( INT64 debounceTimeMilliseconds ) +__weak BOOL CPU_GPIO_SetDebounce( INT64 debounceTimeMilliseconds ) { return FALSE; } -INT32 CPU_GPIO_GetPinCount() +__weak INT32 CPU_GPIO_GetPinCount() { return 0; } -void CPU_GPIO_GetPinsMap( UINT8* pins, size_t size ) +__weak void CPU_GPIO_GetPinsMap( UINT8* pins, size_t size ) { pins = NULL; } -UINT8 CPU_GPIO_GetSupportedResistorModes( GPIO_PIN pin ) +__weak UINT8 CPU_GPIO_GetSupportedResistorModes( GPIO_PIN pin ) { // as it is stub, return 0; return 0; } -UINT8 CPU_GPIO_GetSupportedInterruptModes( GPIO_PIN pin ) + +__weak UINT8 CPU_GPIO_GetSupportedInterruptModes( GPIO_PIN pin ) { // as it is stub, return 0; return 0; } - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_power/stubs_functions_power.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_power/stubs_functions_power.cpp index b4137137d..69461d4be 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_power/stubs_functions_power.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_power/stubs_functions_power.cpp @@ -6,7 +6,7 @@ //--// -void HAL_AssertEx() +__weak void HAL_AssertEx() { // cause an abort and let the abort handler take over //*((char*)0xFFFFFFFF) = 'a'; @@ -14,7 +14,7 @@ void HAL_AssertEx() //--// -BOOL CPU_Initialize() +__weak BOOL CPU_Initialize() { return TRUE; } @@ -27,18 +27,15 @@ BOOL CPU_Initialize() //{ //} -void CPU_ChangePowerLevel(POWER_LEVEL level) +__weak void CPU_ChangePowerLevel(POWER_LEVEL level) { } -BOOL CPU_IsSoftRebootSupported () +__weak BOOL CPU_IsSoftRebootSupported () { return FALSE; } - -void CPU_Halt() +__weak void CPU_Halt() { } - - diff --git a/DeviceCode/Drivers/Stubs/Processor/stubs_time/stubs_functions_time.cpp b/DeviceCode/Drivers/Stubs/Processor/stubs_time/stubs_functions_time.cpp index c7dc78c00..095cd3204 100644 --- a/DeviceCode/Drivers/Stubs/Processor/stubs_time/stubs_functions_time.cpp +++ b/DeviceCode/Drivers/Stubs/Processor/stubs_time/stubs_functions_time.cpp @@ -6,95 +6,94 @@ //--// -BOOL HAL_Time_Initialize() +__weak BOOL HAL_Time_Initialize() { return FALSE; } -BOOL HAL_Time_Uninitialize() +__weak BOOL HAL_Time_Uninitialize() { return FALSE; } -UINT64 HAL_Time_CurrentTicks() +__weak UINT64 HAL_Time_CurrentTicks() { return 0; } -INT64 HAL_Time_TicksToTime( UINT64 Ticks ) +__weak INT64 HAL_Time_TicksToTime( UINT64 Ticks ) { return 0; } -INT64 HAL_Time_CurrentTime() +__weak INT64 HAL_Time_CurrentTime() { return 0; } -void HAL_Time_SetCompare( UINT64 CompareValue ) +__weak void HAL_Time_SetCompare( UINT64 CompareValue ) { } -void HAL_Time_Sleep_MicroSeconds( UINT32 uSec ) +__weak void HAL_Time_Sleep_MicroSeconds( UINT32 uSec ) { } -void HAL_Time_Sleep_MicroSeconds_InterruptEnabled( UINT32 uSec ) +__weak void HAL_Time_Sleep_MicroSeconds_InterruptEnabled( UINT32 uSec ) { } -void HAL_Time_GetDriftParameters ( INT32* a, INT32* b, INT64* c ) +__weak void HAL_Time_GetDriftParameters ( INT32* a, INT32* b, INT64* c ) { *a = 1; *b = 1; *c = 0; } -UINT32 CPU_SystemClock() +__weak UINT32 CPU_SystemClock() { return 0; } -UINT32 CPU_TicksPerSecond() +__weak UINT32 CPU_TicksPerSecond() { return 0; } -UINT64 CPU_MillisecondsToTicks( UINT64 Ticks ) +__weak UINT64 CPU_MillisecondsToTicks( UINT64 Ticks ) { return 0; } -UINT64 CPU_MillisecondsToTicks( UINT32 Ticks32 ) +__weak UINT64 CPU_MillisecondsToTicks( UINT32 Ticks32 ) { return 0; } -UINT64 CPU_MicrosecondsToTicks( UINT64 uSec ) +__weak UINT64 CPU_MicrosecondsToTicks( UINT64 uSec ) { return 0; } -UINT32 CPU_MicrosecondsToTicks( UINT32 uSec ) +__weak UINT32 CPU_MicrosecondsToTicks( UINT32 uSec ) { return 0; } -UINT32 CPU_MicrosecondsToSystemClocks( UINT32 uSec ) +__weak UINT32 CPU_MicrosecondsToSystemClocks( UINT32 uSec ) { return 0; } -UINT64 CPU_TicksToTime( UINT64 Ticks ) +__weak UINT64 CPU_TicksToTime( UINT64 Ticks ) { return 0; } -UINT64 CPU_TicksToTime( UINT32 Ticks32 ) +__weak UINT64 CPU_TicksToTime( UINT32 Ticks32 ) { return 0; } - diff --git a/DeviceCode/Drivers/Stubs/VirtualKey/virtualkey_stubs.cpp b/DeviceCode/Drivers/Stubs/VirtualKey/virtualkey_stubs.cpp index 9d20823b5..022744c13 100644 --- a/DeviceCode/Drivers/Stubs/VirtualKey/virtualkey_stubs.cpp +++ b/DeviceCode/Drivers/Stubs/VirtualKey/virtualkey_stubs.cpp @@ -4,8 +4,7 @@ #include -GPIO_PIN VirtualKey_GetPins( UINT32 virtualKey) +__weak GPIO_PIN VirtualKey_GetPins( UINT32 virtualKey) { return GPIO_PIN_NONE; } - diff --git a/DeviceCode/Drivers/Thermistor/stubs/Thermistor_stubs_functions.cpp b/DeviceCode/Drivers/Thermistor/stubs/Thermistor_stubs_functions.cpp index 193f1a2e7..0cacaa136 100644 --- a/DeviceCode/Drivers/Thermistor/stubs/Thermistor_stubs_functions.cpp +++ b/DeviceCode/Drivers/Thermistor/stubs/Thermistor_stubs_functions.cpp @@ -6,9 +6,7 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// -INT32 Thermistor_ResistanceToTemperature( UINT32 R_Thermistor, UINT32 R_Nominal, INT32 T_Nominal_x100, INT32 B_VAL ) +__weak INT32 Thermistor_ResistanceToTemperature( UINT32 R_Thermistor, UINT32 R_Nominal, INT32 T_Nominal_x100, INT32 B_VAL ) { return 250; // 25.0 C } - - diff --git a/DeviceCode/Drivers/TimeService/stubs/timeservice_stubs_functions.cpp b/DeviceCode/Drivers/TimeService/stubs/timeservice_stubs_functions.cpp index 0a3508b0b..6bca24ee4 100644 --- a/DeviceCode/Drivers/TimeService/stubs/timeservice_stubs_functions.cpp +++ b/DeviceCode/Drivers/TimeService/stubs/timeservice_stubs_functions.cpp @@ -7,12 +7,12 @@ //--// -INT32 HAL_TIMESERVICE_GetTimeFromSNTPServer(UINT8* serverIP, SYSTEMTIME* systemTime) +__weak INT32 HAL_TIMESERVICE_GetTimeFromSNTPServer(UINT8* serverIP, SYSTEMTIME* systemTime) { return -1; } -INT32 HAL_TIMESERVICE_GetTimeFromSNTPServerList(UINT8* serverIP, INT32 serverNum, SYSTEMTIME* systemTime) +__weak INT32 HAL_TIMESERVICE_GetTimeFromSNTPServerList(UINT8* serverIP, INT32 serverNum, SYSTEMTIME* systemTime) { return -1; } diff --git a/DeviceCode/Drivers/TouchPanel/stubs/touchpanel_stubs_functions.cpp b/DeviceCode/Drivers/TouchPanel/stubs/touchpanel_stubs_functions.cpp index 1d45fc827..8b7f973a6 100644 --- a/DeviceCode/Drivers/TouchPanel/stubs/touchpanel_stubs_functions.cpp +++ b/DeviceCode/Drivers/TouchPanel/stubs/touchpanel_stubs_functions.cpp @@ -6,21 +6,21 @@ //--// -BOOL HAL_TOUCH_PANEL_Enable(GPIO_INTERRUPT_SERVICE_ROUTINE touchIsrProc) +__weak BOOL HAL_TOUCH_PANEL_Enable(GPIO_INTERRUPT_SERVICE_ROUTINE touchIsrProc) { return FALSE; } -BOOL HAL_TOUCH_PANEL_Disable() +__weak BOOL HAL_TOUCH_PANEL_Disable() { return FALSE; } -void HAL_TOUCH_PANEL_GetPoint( TOUCH_PANEL_SAMPLE_FLAGS* pTipState, int* pSource, int* pUnCalX, int* pUnCalY) +__weak void HAL_TOUCH_PANEL_GetPoint( TOUCH_PANEL_SAMPLE_FLAGS* pTipState, int* pSource, int* pUnCalX, int* pUnCalY) { } -HRESULT HAL_TOUCH_PANEL_GetDeviceCaps(unsigned int iIndex, void* lpOutput) +__weak HRESULT HAL_TOUCH_PANEL_GetDeviceCaps(unsigned int iIndex, void* lpOutput) { return 0; // return CLR_E_NOTIMPL; diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/SystemState.cpp b/DeviceCode/Initialization/SystemState.cpp similarity index 100% rename from Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/SystemState.cpp rename to DeviceCode/Initialization/SystemState.cpp diff --git a/DeviceCode/Initialization/tinyhal.cpp b/DeviceCode/Initialization/tinyhal.cpp index 48f42b66d..17e0216d2 100644 --- a/DeviceCode/Initialization/tinyhal.cpp +++ b/DeviceCode/Initialization/tinyhal.cpp @@ -8,11 +8,11 @@ #include #endif -//--// +extern "C" void SystemClock_Config(void); -// we need this to force inclusion from library at link time -#pragma import(EntryPoint) +//--// +//extern UINT32 _end; #undef TRACE_ALWAYS #define TRACE_ALWAYS 0x00000001 @@ -22,194 +22,6 @@ //--// -#if !defined(BUILD_RTM) && !defined(PLATFORM_ARM_OS_PORT) - -UINT32 Stack_MaxUsed() -{ - // this is the value we check for stack overruns - const UINT32 StackCheckVal = 0xBAADF00D; - - size_t size = (size_t)&StackTop - (size_t)&StackBottom; - UINT32* ptr = (UINT32*)&StackBottom; - - DEBUG_TRACE1(TRACE_ALWAYS, "Stack Max = %d\r\n", size); - - while(*ptr == StackCheckVal) - { - size -= 4; - ptr++; - } - - DEBUG_TRACE1(TRACE_ALWAYS, "Stack Used = %d\r\n", size); - - return size; -} - -#endif // !defined(BUILD_RTM) - -//--// -// this is the first C function called after bootstrapping ourselves into ram - -// these define the region to zero initialize -extern UINT32 Image$$ER_RAM_RW$$ZI$$Base; -extern UINT32 Image$$ER_RAM_RW$$ZI$$Length; - -// here is the execution address/length of code to move from FLASH to RAM -#define IMAGE_RAM_RO_BASE Image$$ER_RAM_RO$$Base -#define IMAGE_RAM_RO_LENGTH Image$$ER_RAM_RO$$Length - -extern UINT32 IMAGE_RAM_RO_BASE; -extern UINT32 IMAGE_RAM_RO_LENGTH; - -// here is the execution address/length of data to move from FLASH to RAM -extern UINT32 Image$$ER_RAM_RW$$Base; -extern UINT32 Image$$ER_RAM_RW$$Length; - -// here is the load address of the RAM code/data -#define LOAD_RAM_RO_BASE Load$$ER_RAM_RO$$Base - -extern UINT32 LOAD_RAM_RO_BASE; -extern UINT32 Load$$ER_RAM_RW$$Base; - -//--// - -#if defined(TARGETLOCATION_RAM) - -extern UINT32 Load$$ER_RAM$$Base; -extern UINT32 Image$$ER_RAM$$Length; - -#elif defined(TARGETLOCATION_FLASH) - -extern UINT32 Load$$ER_FLASH$$Base; -extern UINT32 Image$$ER_FLASH$$Length; - -#else - !ERROR -#endif - -UINT32 LOAD_IMAGE_Start; -UINT32 LOAD_IMAGE_Length; -UINT32 LOAD_IMAGE_CalcCRC; - -// -// The ARM linker is not keeping FirstEntry.obj (and EntryPoint) for RTM builds of NativeSample (possibly others) -// The --keep FirstEntry.obj linker option also does not work, however, this unused method call to EntryPoint does the trick. -// -void KEEP_THE_LINKER_HAPPY_SINCE_KEEP_IS_NOT_WORKING() -{ - EntryPoint(); -} - -//--// - -#pragma arm section code = "SectionForBootstrapOperations" - -static void __section("SectionForBootstrapOperations") Prepare_Copy( UINT32* src, UINT32* dst, UINT32 len ) -{ - if(dst != src) - { - INT32 extraLen = len & 0x00000003; - len = len & 0xFFFFFFFC; - - while(len != 0) - { - *dst++ = *src++; - - len -= 4; - } - - // thumb2 code can be multiples of 2... - - UINT8 *dst8 = (UINT8*) dst, *src8 = (UINT8*) src; - - while (extraLen > 0) - { - *dst8++ = *src8++; - - extraLen--; - } - } -} - -static void __section("SectionForBootstrapOperations") Prepare_Zero( UINT32* dst, UINT32 len ) -{ - INT32 extraLen = len & 0x00000003; - len = len & 0xFFFFFFFC; - - while(len != 0) - { - *dst++ = 0; - - len -= 4; - } - - // thumb2 code can be multiples of 2... - - UINT8 *dst8 = (UINT8*) dst; - - while (extraLen > 0) - { - *dst8++ = 0; - - extraLen--; - } -} - -void __section("SectionForBootstrapOperations") PrepareImageRegions() -{ - // - // Copy RAM RO regions into proper location. - // - { - UINT32* src = (UINT32*)&LOAD_RAM_RO_BASE; - UINT32* dst = (UINT32*)&IMAGE_RAM_RO_BASE; - UINT32 len = (UINT32 )&IMAGE_RAM_RO_LENGTH; - - Prepare_Copy( src, dst, len ); - } - - // - // Copy RAM RW regions into proper location. - // - { - UINT32* src = (UINT32*)&Load$$ER_RAM_RW$$Base; - UINT32* dst = (UINT32*)&Image$$ER_RAM_RW$$Base; - UINT32 len = (UINT32)&Image$$ER_RAM_RW$$Length; - - Prepare_Copy( src, dst, len ); - } - - // - // Initialize RAM ZI regions. - // - { - UINT32* dst = (UINT32*)&Image$$ER_RAM_RW$$ZI$$Base; - UINT32 len = (UINT32 )&Image$$ER_RAM_RW$$ZI$$Length; - - Prepare_Zero( dst, len ); - } -} - -#pragma arm section code - -//--// - -static void InitCRuntime() -{ -#if (defined(HAL_REDUCESIZE) || defined(PLATFORM_EMULATED_FLOATINGPOINT)) - - // Don't initialize floating-point on small builds. - -#else - -#if !defined(__GNUC__) - _fp_init(); -#endif - - setlocale( LC_ALL, "" ); -#endif -} - #if !defined(BUILD_RTM) static UINT32 g_Boot_RAMConstants_CRC = 0; #endif @@ -269,13 +81,20 @@ void HAL_EnterBooterMode() switch(pAddr[i]) { case c_Empty: - ::Watchdog_ResetCounter(); + + #ifdef FEATURE_WATCHDOG + ::Watchdog_ResetCounter(); + #endif if(deviceInfo->Attribute.SupportsXIP) { // will be either directly read from NOR + #ifdef FEATURE_CPUCACHE dataAddress = (volatile UINT32*)CPU_GetUncachableAddress(&pAddr[i]); + #else + dataAddress = (volatile UINT32*)&pAddr[i]; + #endif // write directly bRet = (TRUE == pBlockDevice->Write( (UINT32)dataAddress, sizeof(UINT32), (PBYTE)&c_Key, FALSE )); @@ -307,7 +126,9 @@ void HAL_EnterBooterMode() // reading whole block, not just the configurationsector const BlockRegionInfo * pBlockRegionInfo = &deviceInfo->Regions[iRegion]; - ::Watchdog_ResetCounter(); + #ifdef FEATURE_WATCHDOG + ::Watchdog_ResetCounter(); + #endif BYTE *data = (BYTE*) private_malloc(pBlockRegionInfo->BytesPerBlock); @@ -333,7 +154,9 @@ void HAL_EnterBooterMode() pBlockDevice->EraseBlock(configSectAddress); - ::Watchdog_ResetCounter(); + #ifdef FEATURE_WATCHDOG + ::Watchdog_ResetCounter(); + #endif // write back to sector, as we only change one bit from 0 to 1, no need to erase sector bRet = (TRUE == pBlockDevice->Write( configSectAddress, pBlockRegionInfo->BytesPerBlock, data, FALSE )); @@ -349,20 +172,39 @@ void HAL_EnterBooterMode() bool g_fDoNotUninitializeDebuggerPort = false; void HAL_Initialize() -{ +{ +#if defined(PLATFORM_ARM_OS_PORT) + // Interrupts must be enabled to handle calls to OS + // (Network stack uses the CMSIS-RTX OS, which uses + // SVC calls, which will hard fault if the interrupts + // are disabled at the Svc instruction ) + // SystemInit handles this for the startup from reset + // However, this is also called from the CLR when doing + // a soft reboot. + __enable_irq(); +#endif + HAL_CONTINUATION::InitializeList(); HAL_COMPLETION ::InitializeList(); - HAL_Init_Custom_Heap(); - Time_Initialize(); + +#ifdef FEATURE_PALEVENT Events_Initialize(); +#endif +#ifdef FEATURE_GPIO CPU_GPIO_Initialize(); +#endif + +#ifdef FEATURE_SPI CPU_SPI_Initialize(); +#endif +#if !defined(PLATFORM_ARM_OS_PORT) // this is the place where interrupts are enabled after boot for the first time after boot ENABLE_INTERRUPTS(); +#endif // have to initialize the blockstorage first, as the USB device needs to update the configure block @@ -372,6 +214,7 @@ void HAL_Initialize() BlockStorageList::InitializeDevices(); +#ifdef FEATURE_FS FS_Initialize(); FileSystemVolumeList::Initialize(); @@ -379,32 +222,63 @@ void HAL_Initialize() FS_AddVolumes(); FileSystemVolumeList::InitializeVolumes(); +#endif +#ifdef FEATURE_LCD LCD_Initialize(); +#endif CPU_InitializeCommunication(); +#ifdef FEATURE_I2C I2C_Initialize(); +#endif +#ifdef FEATURE_BUTTONS Buttons_Initialize(); +#endif +#ifdef FEATURE_BACKLIGHT // Initialize the backlight to a default off state BackLight_Initialize(); +#endif +#ifdef FEATURE_PIEZO Piezo_Initialize(); +#endif +#ifdef FEATURE_BATTERY Battery_Initialize(); - +#endif +#ifdef FEATURE_CHARGER Charger_Initialize(); +#endif +#ifdef FEATURE_PALEVENT PalEvent_Initialize(); +#endif + +#ifdef FEATURE_GESTURE Gesture_Initialize(); +#endif + +#ifdef FEATURE_INK Ink_Initialize(); +#endif + +#ifdef FEATURE_TIMESERVICE TimeService_Initialize(); +#endif #if defined(ENABLE_NATIVE_PROFILER) Native_Profiler_Init(); #endif + +#ifdef FEATURE_HARDWARE_CRC + // enable clock for the CRC calculation module + __HAL_RCC_CRC_CLK_ENABLE(); +#endif + } void HAL_UnReserveAllGpios() @@ -435,24 +309,52 @@ void HAL_Uninitialize() } } +#ifdef FEATURE_HARDWARE_CRC + // disable clock for the CRC calculation module + __HAL_RCC_CRC_CLK_DISABLE(); +#endif + +#ifdef FEATURE_LCD LCD_Uninitialize(); +#endif +#ifdef FEATURE_I2C I2C_Uninitialize(); +#endif +#ifdef FEATURE_BUTTONS Buttons_Uninitialize(); +#endif +#ifdef FEATURE_BACKLIGHT // Initialize the backlight to a default off state BackLight_Uninitialize(); +#endif +#ifdef FEATURE_PIEZO Piezo_Uninitialize(); +#endif +#ifdef FEATURE_BATTERY Battery_Uninitialize(); +#endif + +#ifdef FEATURE_CHARGER Charger_Uninitialize(); +#endif TimeService_UnInitialize(); +#ifdef FEATURE_INK Ink_Uninitialize(); +#endif + +#ifdef FEATURE_GESTURE Gesture_Uninitialize(); +#endif + +#ifdef FEATURE_PALEVENT PalEvent_Uninitialize(); +#endif SOCKETS_CloseConnections(); @@ -460,21 +362,30 @@ void HAL_Uninitialize() CPU_UninitializeCommunication(); #endif +#ifdef FEATURE_FS FileSystemVolumeList::UninitializeVolumes(); +#endif BlockStorageList::UnInitializeDevices(); USART_CloseAllPorts(); +#ifdef FEATURE_SPI CPU_SPI_Uninitialize(); +#endif HAL_UnReserveAllGpios(); +#ifdef FEATURE_GPIO CPU_GPIO_Uninitialize(); +#endif DISABLE_INTERRUPTS(); +#ifdef FEATURE_PALEVENT Events_Uninitialize(); +#endif + Time_Uninitialize(); HAL_CONTINUATION::Uninitialize(); @@ -483,118 +394,93 @@ void HAL_Uninitialize() extern "C" { - -void BootEntry() +// defined as weak to allow it to be overriden by equivalent function at Solution level +__attribute__((weak)) int main(void) { - -#if (defined(GCCOP) && defined(COMPILE_THUMB)) - -// the IRQ_Handler routine generated from the compiler is incorrect, the return address LR has been decrement twice -// it decrements LR at the first instruction of IRQ_handler and then before return, it decrements LR again. -// temporary fix is at the ARM_Vector ( IRQ), make it jump to 2nd instruction of IRQ_handler to skip teh first subs LR, LR #4; -// - volatile int *ptr; - ptr =(int*) 0x28; - *ptr = *ptr +4; -#endif - - -#if !defined(BUILD_RTM) && !defined(PLATFORM_ARM_OS_PORT) + /* CMSIS HAL library initialization: + - Configure the Flash prefetch, instruction and Data caches + - Configure the Systick to generate an interrupt each 1 msec + - Set NVIC Group Priority to 4 + - Global MSP (MCU Support Package) initialization + */ + if(HAL_Init() == HAL_OK) { - int marker; - int* ptr = &marker - 1; // This will point to the current top of the stack. - int* end = &StackBottom; - - while(ptr >= end) + // debug enable options + #if !defined(BUILD_RTM) + HAL_DBGMCU_EnableDBGSleepMode(); + HAL_DBGMCU_EnableDBGStopMode(); + HAL_DBGMCU_EnableDBGStandbyMode(); + #endif + + /* Configure the system clock */ + SystemClock_Config(); + + HAL_Time_Initialize(); + + HAL_Initialize(); + + // check if system is waking-up from STANDBY power mode + if (__HAL_PWR_GET_FLAG(PWR_FLAG_SB) != RESET) { - *ptr-- = 0xBAADF00D; + // TODO + // we may want to handle this to pass it somehow to the NETMF API } - } -#endif - - // these are needed for patch access - -#if defined(TARGETLOCATION_RAM) - - LOAD_IMAGE_Start = (UINT32)&Load$$ER_RAM$$Base; - LOAD_IMAGE_Length = (UINT32)&Image$$ER_RAM$$Length; - -#elif defined(TARGETLOCATION_FLASH) - - LOAD_IMAGE_Start = (UINT32)&Load$$ER_FLASH$$Base; - LOAD_IMAGE_Length = (UINT32)&Image$$ER_FLASH$$Length; - -#else - !ERROR -#endif - - InitCRuntime(); - - LOAD_IMAGE_Length += (UINT32)&IMAGE_RAM_RO_LENGTH + (UINT32)&Image$$ER_RAM_RW$$Length; - -#if !defined(BUILD_RTM) - g_Boot_RAMConstants_CRC = Checksum_RAMConstants(); -#endif - - - CPU_Initialize(); - - HAL_Time_Initialize(); - - HAL_Initialize(); - -#if !defined(BUILD_RTM) - DEBUG_TRACE4( STREAM_LCD, ".NetMF v%d.%d.%d.%d\r\n", VERSION_MAJOR, VERSION_MINOR, VERSION_BUILD, VERSION_REVISION); - DEBUG_TRACE3(TRACE_ALWAYS, "%s, Build Date:\r\n\t%s %s\r\n", HalName, __DATE__, __TIME__); -#if defined(__GNUC__) - DEBUG_TRACE1(TRACE_ALWAYS, "GNU Compiler version %d\r\n", __GNUC__); -#else - DEBUG_TRACE1(TRACE_ALWAYS, "ARM Compiler version %d\r\n", __ARMCC_VERSION); -#endif - - UINT8* BaseAddress; - UINT32 SizeInBytes; - - HeapLocation( BaseAddress, SizeInBytes ); - memset ( BaseAddress, 0, SizeInBytes ); - - lcd_printf("\f"); - - lcd_printf("%-15s\r\n", HalName); - lcd_printf("%-15s\r\n", "Build Date:"); - lcd_printf(" %-13s\r\n", __DATE__); - lcd_printf(" %-13s\r\n", __TIME__); - -#endif // !defined(BUILD_RTM) - - /***********************************************************************************/ - - { -#if defined(FIQ_SAMPLING_PROFILER) - FIQ_Profiler_Init(); -#endif - } - - // - // the runtime is by default using a watchdog - // - - Watchdog_GetSetTimeout ( WATCHDOG_TIMEOUT , TRUE ); - Watchdog_GetSetBehavior( WATCHDOG_BEHAVIOR, TRUE ); - Watchdog_GetSetEnabled ( WATCHDOG_ENABLE, TRUE ); + + #if !defined(BUILD_RTM) + //DEBUG_TRACE4( STREAM_LCD, ".NetMF v%d.%d.%d.%d\r\n", VERSION_MAJOR, VERSION_MINOR, VERSION_BUILD, VERSION_REVISION); + //DEBUG_TRACE3(TRACE_ALWAYS, "%s, Build Date:\r\n\t%s %s\r\n", HalName, __DATE__, __TIME__); + + #if defined(__GNUC__) + //DEBUG_TRACE1(TRACE_ALWAYS, "GNU Compiler version %d\r\n", __GNUC__); + #else + //DEBUG_TRACE1(TRACE_ALWAYS, "ARM Compiler version %d\r\n", __ARMCC_VERSION); + #endif + + UINT8* BaseAddress; + UINT32 SizeInBytes; + + HeapLocation( BaseAddress, SizeInBytes ); + memset ( BaseAddress, 0, SizeInBytes ); + + #ifdef FEATURE_LCD + lcd_printf("\f"); + + lcd_printf("%-15s\r\n", HalName); + lcd_printf("%-15s\r\n", "Build Date:"); + lcd_printf(" %-13s\r\n", __DATE__); + lcd_printf(" %-13s\r\n", __TIME__); + #endif + + #endif // !defined(BUILD_RTM) + + /***********************************************************************************/ - - // HAL initialization completed. Interrupts are enabled. Jump to the Application routine - ApplicationEntryPoint(); + { + #if defined(FIQ_SAMPLING_PROFILER) + FIQ_Profiler_Init(); + #endif + } - lcd_printf("\fmain exited!!???. Halting CPU\r\n"); - debug_printf("main exited!!???. Halting CPU\r\n"); + #ifdef FEATURE_WATCHDOG + Watchdog_GetSetTimeout ( WATCHDOG_TIMEOUT , TRUE ); + Watchdog_GetSetBehavior( WATCHDOG_BEHAVIOR, TRUE ); + Watchdog_GetSetEnabled ( WATCHDOG_ENABLE, TRUE ); + #endif + + // CMSIS & NETMF HALs initialization completed. Interrupts are enabled. Jump to the Application routine + ApplicationEntryPoint(); + + #ifdef FEATURE_LCD + lcd_printf("\fmain exited!!???. Halting CPU\r\n"); + #endif + //debug_printf("main exited!!???. Halting CPU\r\n"); + } -#if defined(BUILD_RTM) - CPU_Reset(); -#else - CPU_Halt(); -#endif + #if defined(BUILD_RTM) + CPU_Reset(); + #else + CPU_Halt(); + #endif } } // extern "C" @@ -605,25 +491,26 @@ void BootEntry() void debug_printf( const char* format, ... ) { - char buffer[256]; + char buffer[256] = {0}; va_list arg_ptr; va_start( arg_ptr, format ); int len = hal_vsnprintf( buffer, sizeof(buffer)-1, format, arg_ptr ); - // flush existing characters - DebuggerPort_Flush( HalSystemConfig.DebugTextPort ); - - // write string - DebuggerPort_Write( HalSystemConfig.DebugTextPort, buffer, len, 0 ); - - // flush new characters - DebuggerPort_Flush( HalSystemConfig.DebugTextPort ); + { // take CLR lock to send whole message + GLOBAL_LOCK(clrLock); + // send characters directly to the trace port + for( char* p = buffer; *p != '\0' || p-buffer >= 256; ++p ) + ITM_SendChar( *p ); + } va_end( arg_ptr ); } +#ifdef FEATURE_LCD +void lcd_printf( const char* format, ... ); + void lcd_printf( const char* format, ... ) { va_list arg_ptr; @@ -632,147 +519,6 @@ void lcd_printf( const char* format, ... ) hal_vfprintf( STREAM_LCD, format, arg_ptr ); } - -#endif // !defined(BUILD_RTM) - -//--// - -volatile INT32 SystemStates[SYSTEM_STATE_TOTAL_STATES]; - - -#if defined(PLATFORM_ARM) - - void SystemState_SetNoLock( SYSTEM_STATE State ) -{ - //ASSERT(State < SYSTEM_STATE_TOTAL_STATES); - - ASSERT_IRQ_MUST_BE_OFF(); - - SystemStates[State]++; - - //ASSERT(SystemStates[State] > 0); -} - - -void SystemState_ClearNoLock( SYSTEM_STATE State ) -{ - //ASSERT(State < SYSTEM_STATE_TOTAL_STATES); - - ASSERT_IRQ_MUST_BE_OFF(); - - SystemStates[State]--; - - //ASSERT(SystemStates[State] >= 0); -} - - - BOOL SystemState_QueryNoLock( SYSTEM_STATE State ) -{ - //ASSERT(State < SYSTEM_STATE_TOTAL_STATES); - - ASSERT_IRQ_MUST_BE_OFF(); - - return (SystemStates[State] > 0) ? TRUE : FALSE; -} - -#endif - - - -void SystemState_Set( SYSTEM_STATE State ) -{ - GLOBAL_LOCK(irq); - - SystemState_SetNoLock( State ); -} - - -void SystemState_Clear( SYSTEM_STATE State ) -{ - GLOBAL_LOCK(irq); - - SystemState_ClearNoLock( State ); -} - - -BOOL SystemState_Query( SYSTEM_STATE State ) -{ - GLOBAL_LOCK(irq); - - return SystemState_QueryNoLock( State ); -} - -//--// - -#if !defined(BUILD_RTM) - -UINT32 Checksum_RAMConstants() -{ - UINT32* RAMConstants = (UINT32*)&IMAGE_RAM_RO_BASE; - UINT32 Length = (UINT32 )&IMAGE_RAM_RO_LENGTH; - - UINT32 CRC; - - // start with Vector area CRC - CRC = SUPPORT_ComputeCRC( NULL, 0x00000020, 0 ); - - // add the big block of RAM constants to CRC - CRC = SUPPORT_ComputeCRC( RAMConstants, Length, CRC ); - - return CRC; -} - -void Verify_RAMConstants( void* arg ) -{ - BOOL BreakpointOnError = (BOOL)arg; - - //debug_printf("RAMC\r\n"); - - UINT32 CRC = Checksum_RAMConstants(); - - if(CRC != g_Boot_RAMConstants_CRC) - { - hal_printf( "RAMC CRC:%08x!=%08x\r\n", CRC, g_Boot_RAMConstants_CRC ); - - UINT32* ROMConstants = (UINT32*)&LOAD_RAM_RO_BASE; - UINT32* RAMConstants = (UINT32*)&IMAGE_RAM_RO_BASE; - UINT32 Length = (UINT32 )&IMAGE_RAM_RO_LENGTH; - BOOL FoundMismatch = FALSE; - - for(int i = 0; i < Length; i += 4) - { - if(*RAMConstants != *ROMConstants) - { - hal_printf( "RAMC %08x:%08x!=%08x\r\n", (UINT32) RAMConstants, *RAMConstants, *ROMConstants ); - - if(!FoundMismatch) lcd_printf( "\fRAMC:%08x\r\n", (UINT32)RAMConstants ); // first one only to LCD - FoundMismatch = TRUE; - } - - RAMConstants++; - ROMConstants++; - } - - if(!FoundMismatch) - { - // the vector area must have been trashed - lcd_printf("\fRAMC:%08x\r\n", (UINT32) NULL); - RAMConstants = (UINT32*)NULL; - - for(int i = 0; i < 32; i += 4) - { - hal_printf( "RAMC %02x:%08x\r\n", i, *RAMConstants ); - lcd_printf( "%02x:%08x\r\n" , i, *RAMConstants++ ); - } - } - - DebuggerPort_Flush( HalSystemConfig.DebugTextPort ); - - if(BreakpointOnError) - { - HARD_BREAKPOINT(); - } - } -} +#endif // !defined(FEATURE_LCD) #endif // !defined(BUILD_RTM) diff --git a/DeviceCode/Targets/Native/STM32F4xx/Analog/AD_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/Analog/AD_functions.cpp new file mode 100644 index 000000000..2f697aa5e --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Analog/AD_functions.cpp @@ -0,0 +1,321 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc. +// +// *** AD Conversion *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include + +//--// + +// indexed port configuration access +#define Port(port) ((GPIO_TypeDef *) (GPIOA_BASE + (port << 10))) + +#define AD_SAMPLE_TIME 2 // sample time = 28 cycles +#define ADC_CHANNELS {ADC_CHANNEL_0,ADC_CHANNEL_1,ADC_CHANNEL_2,ADC_CHANNEL_3,ADC_CHANNEL_4,ADC_CHANNEL_5,ADC_CHANNEL_6,ADC_CHANNEL_7,ADC_CHANNEL_8,ADC_CHANNEL_9,ADC_CHANNEL_10,ADC_CHANNEL_11,ADC_CHANNEL_12,ADC_CHANNEL_13,ADC_CHANNEL_14,ADC_CHANNEL_15,ADC_CHANNEL_VREFINT,ADC_CHANNEL_VBAT} + +#if defined (STM32F401xB) || defined(STM32F401xC) || defined(STM32F401xD) || defined (STM32F401xE) || defined (STM32F410Cx) || defined (STM32F410Rx) || defined (STM32F410Tx) || defined (STM32F411xC) || defined (STM32F411xE) +// these have 1 × 12-bit A/D converter + #if USER_ADC == 1 + #define ADCx ADC1 + #define RCC_APB2ENR_ADCxEN RCC_APB2ENR_ADC1EN + // ADC1 pins plus two internally connected channels thus the 0 for 'no pin' + // Vsense for temperature sensor @ ADC1_IN16 + // Vrefubt for internal voltage reference (1.21V) @ ADC1_IN17 + // to access the internal channels need to include '16' and/or '17' at the AD_CHANNELS array in 'platform_selector.h' + // PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PB0,PB1,PC0,PC1,PC2,PC3,PC4,PC5,INTERNAL_PIN,INTERNAL_PIN + #define ADC_PINS {0,1,2,3,4,5,6,7,16,17,32,33,34,35,36,37,0,0} + #else + #error "wrong USER_ADC value (only 1 is valid). Please go to platform_selector.h (in solution folder) and re-define USER_ADC" + #endif + +#endif // defined (STM32F401xC) || defined(STM32F401xD) || defined (STM32F401xE) || defined (STM32F410Cx) || defined (STM32F410Rx) || defined (STM32F411xC) || defined (STM32F411xE) || defined (STM32F410Tx) + +#if defined (STM32F405xx) || defined (STM32F407xx) || defined (STM32F415xx) || defined (STM32F417xx) || defined (STM32F427xx) || defined (STM32F429xx) || defined (STM32F437xx) || defined (STM32F439xx) || defined (STM32F446xx) || defined (STM32F469xx) || defined (STM32F479xx) +// these have 3 × 12-bit A/D converter + #if USER_ADC == 1 + #define ADCx ADC1 + #define RCC_APB2ENR_ADCxEN RCC_APB2ENR_ADC1EN + // ADC1 pins plus two internally connected channels thus the 0 for 'no pin' + // Vsense for temperature sensor @ ADC1_IN16 + // Vrefubt for internal voltage reference (1.21V) @ ADC1_IN17 + // to access the internal channels need to include '16' and/or '17' at the AD_CHANNELS array in 'platform_selector.h' + // PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PB0,PB1,PC0,PC1,PC2,PC3,PC4,PC5,INTERNAL_PIN,INTERNAL_PIN + #define ADC_PINS {0,1,2,3,4,5,6,7,16,17,32,33,34,35,36,37,0,0} + #elif (USER_ADC == 3 && defined(ADC3)) + #define ADCx ADC3 + #define RCC_APB2ENR_ADCxEN RCC_APB2ENR_ADC3EN + // PA0,PA1,PA2,PA3,PF6,PF7,PF8,PF9,PF10,PF3,PC0,PC1,PC2,PC3,PF4,PF5 + #define ADC_PINS {0,1,2,3,86,87,88,89,90,83,32,33,34,35,84,85} // ADC3 pins + #else + #error "wrong USER_ADC value (1 or 3). Please go to platform_selector.h (in solution folder) and re-define USER_ADC" + #endif + +#endif // defined (STM32F405xx) || defined (STM32F407xx) || defined (STM32F415xx) || defined (STM32F417xx) || defined (STM32F427xx) || defined (STM32F429xx) || defined (STM32F437xx) || defined (STM32F439xx) || defined (STM32F446xx) || defined (STM32F469xx) || defined (STM32F479xx) + + +// Channels +#if !defined (AD_CHANNELS) + #error "AD_CHANNELS not defined. Please go to platform_selector.h (in solution folder) and define AD_CHANNELS" +#endif +static const BYTE g_AD_Channel[] = AD_CHANNELS; +CT_ASSERT( sizeof( g_AD_Channel ) > 0 ) // at least one channel must be set, if you get error here, please go to platform_selector.h (in solution folder) and re-define AD_CHANNELS +CT_ASSERT( sizeof( g_AD_Channel ) <= 8 ) // maximum of 8 channels can be set, if you get error here, please go to platform_selector.h (in solution folder) and re-define AD_CHANNELS + +static const uint32_t g_ADC_Channel[] = ADC_CHANNELS; +static const BYTE g_AD_Pins[] = ADC_PINS; +#define AD_NUM ARRAYSIZE_CONST_EXPR(g_AD_Channel) // number of channels +// GPIO PINs +static const GPIO_PIN g_GPIO_PINS[] = GPIO_PINS; + +// ADC handlers array declaration +ADC_HandleTypeDef AdcHandlers[AD_NUM]; + +//--// + +/* + * + */ +void GetPortFromEncodedPIN(GPIO_TypeDef* port, GPIO_PIN pin) +{ + port = Port( pin >> 4 ); +} + +/** + * @brief ADC MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param huart: UART handle pointer + * @retval None + */ +void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) +{ + GPIO_InitTypeDef GPIO_InitStruct; + GPIO_TypeDef* port;// pointer to the actual port registers + + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /*##-2- Configure peripheral GPIO ##########################################*/ + + /* ADC Periph clock enable */ + __HAL_RCC_ADC1_CLK_ENABLE(); + + /* ADC Channel GPIO pin configuration */ + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + + for(int i = 0; i < ARRAYSIZE(g_AD_Channel); i++) + { + if(g_AD_Channel[i] < 16) // internal channels 16 and 17 doesn't have port + { + GetPortFromEncodedPIN(port, g_AD_Pins[g_AD_Channel[i]]); + GPIO_InitStruct.Pin = g_GPIO_PINS[g_AD_Channel[i]]; + if(port == GPIOA) + { + /* Enable GPIO clock ****************************************/ + __HAL_RCC_GPIOA_CLK_ENABLE(); + /* ADC Channel GPIO pin configuration */ + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + } + else if(port == GPIOB) + { + /* Enable GPIO clock ****************************************/ + __HAL_RCC_GPIOB_CLK_ENABLE(); + /* ADC Channel GPIO pin configuration */ + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + } + else if(port == GPIOC) + { + /* Enable GPIO clock ****************************************/ + __HAL_RCC_GPIOC_CLK_ENABLE(); + /* ADC Channel GPIO pin configuration */ + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + } + else if(port == GPIOF) + { + /* Enable GPIO clock ****************************************/ + __HAL_RCC_GPIOF_CLK_ENABLE(); + /* ADC Channel GPIO pin configuration */ + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + } + } + } +} + +/** + * @brief ADC MSP De-Initialization + * This function frees the hardware resources used in this example: + * - Disable the Peripheral's clock + * - Revert GPIO to their default state + * @param hadc: ADC handle pointer + * @retval None + */ +void HAL_ADC_MspDeInit(ADC_HandleTypeDef *hadc) +{ + GPIO_TypeDef* port;// pointer to the actual port registers + + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_ADC_FORCE_RESET(); + __HAL_RCC_ADC_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + for(int i = 0; i < ARRAYSIZE(g_AD_Channel); i++) + { + if(g_AD_Channel[i] < 16) // internal channels 16 and 17 doesn't have port + { + GetPortFromEncodedPIN(port, g_AD_Pins[g_AD_Channel[i]]); + if(port == GPIOA) + { + /* De-initialize the ADC Channel GPIO pin */ + HAL_GPIO_DeInit(GPIOA, g_GPIO_PINS[g_AD_Channel[i]]); + } + else if(port == GPIOB) + { + /* De-initialize the ADC Channel GPIO pin */ + HAL_GPIO_DeInit(GPIOB, g_GPIO_PINS[g_AD_Channel[i]]); + } + else if(port == GPIOC) + { + /* De-initialize the ADC Channel GPIO pin */ + HAL_GPIO_DeInit(GPIOC, g_GPIO_PINS[g_AD_Channel[i]]); + } + else if(port == GPIOF) + { + /* De-initialize the ADC Channel GPIO pin */ + HAL_GPIO_DeInit(GPIOF, g_GPIO_PINS[g_AD_Channel[i]]); + } + } + } +} + +BOOL AD_Initialize(ANALOG_CHANNEL channel, INT32 precisionInBits) +{ + ADC_ChannelConfTypeDef sConfig; + + // init this channel if it's listed in the AD_CHANNELS array + // FIXME + /*##-1- Configure the ADC peripheral #######################################*/ + AdcHandlers[channel].Instance = ADCx; + + AdcHandlers[channel].Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV4; /* Asynchronous clock mode, input ADC clock not divided */ + AdcHandlers[channel].Init.Resolution = ADC_RESOLUTION_12B; /* 12-bit resolution for converted data */ + AdcHandlers[channel].Init.DataAlign = ADC_DATAALIGN_RIGHT; /* Right-alignment for converted data */ + AdcHandlers[channel].Init.ScanConvMode = DISABLE; /* Sequencer disabled (ADC conversion on only 1 channel: channel set on rank 1) */ + AdcHandlers[channel].Init.EOCSelection = DISABLE; /* EOC flag picked-up to indicate conversion end */ + AdcHandlers[channel].Init.ContinuousConvMode = DISABLE; /* Continuous mode disabled to have only 1 conversion at each conversion trig */ + AdcHandlers[channel].Init.NbrOfConversion = 1; /* Parameter discarded because sequencer is disabled */ + AdcHandlers[channel].Init.DiscontinuousConvMode = DISABLE; /* Parameter discarded because sequencer is disabled */ + AdcHandlers[channel].Init.NbrOfDiscConversion = 0; /* Parameter discarded because sequencer is disabled */ + AdcHandlers[channel].Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1; /* Software start to trig the 1st conversion manually, without external event */ + AdcHandlers[channel].Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; /* Parameter discarded because software trigger chosen */ + AdcHandlers[channel].Init.DMAContinuousRequests = DISABLE; /* DMA one-shot mode selected (not applied to this example) */ + + if(HAL_ADC_Init(&AdcHandlers[channel]) != HAL_OK) + { + // channel not available + return FALSE; + } + + /*##-2- Configure ADC regular channel ######################################*/ + /* Note: Considering IT occurring after each number of size of */ + /* "uhADCxConvertedValue" ADC conversions (IT by DMA end */ + /* of transfer), select sampling time and ADC clock with sufficient */ + /* duration to not create an overhead situation in IRQHandler. */ + sConfig.Channel = g_ADC_Channel[g_AD_Channel[channel]];//ADCx_CHANNEL; /* Sampled channel number */ + sConfig.Rank = 1; /* Rank of sampled channel number ADCx_CHANNEL */ + sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES; /* Sampling time (number of clock cycles unit) */ + sConfig.Offset = 0; /* Parameter discarded because offset correction is disabled */ + + if(HAL_ADC_ConfigChannel(&AdcHandlers[channel], &sConfig) != HAL_OK) + { + // channel not available + return FALSE; + } + return TRUE; +} + +void AD_Uninitialize(ANALOG_CHANNEL channel) +{ + HAL_ADC_DeInit(&AdcHandlers[channel]); +} + +INT32 AD_Read(ANALOG_CHANNEL channel) +{ + int chNum = g_AD_Channel[channel]; + + /*##-1- Start the conversion process #######################################*/ + if (HAL_ADC_Start(&AdcHandlers[channel]) != HAL_OK) + { + /* Start Conversation Error */ + return 0; + } + + /*##-2- Wait for the end of conversion #####################################*/ + /* Before starting a new conversion, you need to check the current state of + the peripheral; if it�s busy you need to wait for the end of current + conversion before starting a new one. + For simplicity reasons, this example is just waiting till the end of the + conversion, but application may perform other tasks while conversion + operation is ongoing. */ + if (HAL_ADC_PollForConversion(&AdcHandlers[channel], 10) != HAL_OK) + { + /* End Of Conversion flag not set on time */ + return 0; + } + + /* Check if the continuous conversion of regular channel is finished */ + if ((HAL_ADC_GetState(&AdcHandlers[channel]) & HAL_ADC_STATE_EOC_REG) == HAL_ADC_STATE_EOC_REG) + { + /*##-3- Get the converted value of regular channel ########################*/ + return HAL_ADC_GetValue(&AdcHandlers[channel]); + } + + // channel not available + return 0; +} + +UINT32 AD_ADChannels() +{ + return AD_NUM; +} + +GPIO_PIN AD_GetPinForChannel(ANALOG_CHANNEL channel) +{ + // return GPIO pin + // for internally connected channels this is GPIO_PIN_NONE as these don't take any GPIO pins + int chNum = g_AD_Channel[channel]; + + for (int i = 0; i < AD_NUM ; i++) { + if (g_AD_Channel[i] == chNum) { + return (GPIO_PIN)g_AD_Pins[chNum]; + } + } + + // channel not available + return GPIO_PIN_NONE; +} + +BOOL AD_GetAvailablePrecisionsForChannel(ANALOG_CHANNEL channel, INT32* precisions, UINT32& size) +{ + int chNum = g_AD_Channel[channel]; + + // check if this channel is listed in the AD_CHANNELS array + for (int i = 0; i < AD_NUM ; i++) { + if (g_AD_Channel[i] == chNum) { + precisions[0] = 12; + size = 1; + return TRUE; + } + } + + // channel not available + size = 0; + return FALSE; +} diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Init/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/Analog/dotNetMF.proj similarity index 53% rename from Solutions/STM32F4DISCOVERY/DeviceCode/Init/dotNetMF.proj rename to DeviceCode/Targets/Native/STM32F4xx/Analog/dotNetMF.proj index fffe870d9..e6bef7c41 100644 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/Init/dotNetMF.proj +++ b/DeviceCode/Targets/Native/STM32F4xx/Analog/dotNetMF.proj @@ -1,23 +1,24 @@ - IO_Init_STM32F4DISCOVERY + CMSIS_Analog + {BAF21A91-C7D1-43F3-A9D0-8098D48E2D29} - {EC3ADEC7-57CC-4F26-B540-30EBA51C32DA} - IO port initialization for STM32F4DISCOVERY solution + CMSIS Analog driver HAL - IO_Init_STM32F4DISCOVERY.$(LIB_EXT) - IO_Init_STM32F4DISCOVERY.$(LIB_EXT).manifest - Solutions\STM32F4DISCOVERY - - + CMSIS_Analog.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\Analog\dotNetMF.proj + CMSIS_Analog.$(LIB_EXT).manifest + False + + False False False - Solutions\STM32F4DISCOVERY\DeviceCode\Init + DeviceCode\Targets\Native\STM32F4xx\DeviceCode\CMSIS_Analog Library false 4.0.0.0 @@ -25,8 +26,7 @@ - - + diff --git a/DeviceCode/Targets/Native/STM32F4xx/CRC/CRC_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/CRC/CRC_functions.cpp new file mode 100644 index 000000000..662916d43 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/CRC/CRC_functions.cpp @@ -0,0 +1,146 @@ +////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Open Technologies. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions Lda +// +// *** Interface for Cortex-M CRC Calculation Unit *** +// +////////////////////////////////////////////////////////////////////////////////////////// + +#include + +#define CRC_BASE (AHB1PERIPH_BASE + 0x3000U) +#define CRC ((CRC_TypeDef *) CRC_BASE) + +typedef struct +{ + CRC_TypeDef *Instance; /*!< Register base address */ +}CRC_HandleTypeDef; + + +/* + Interface to Cortex-M CRC calculation unit that implements the equivalent to the software implementation at Support\CRC project. + CRC-32 (Ethernet) polynomial: 0x4C11DB7. + buffer: pointer to the region block to be CRCed + size: lenght of buffer to compute CRC + crc: previous CRC value to start CRC computing +*/ + +/* NOTE: is good for F1, L1, F2 and F4 units series, other have diferent configurations and polynomial coefficients */ + +static UINT32 ReverseCRC32(UINT32 targetCRC) +{ + // nibble lookup table for _REVERSE_ CRC32 polynomial 0x4C11DB7 + static const UINT32 crc32NibbleTable[16] = + { + 0x00000000, 0xB2B4BCB6, 0x61A864DB, 0xD31CD86D, 0xC350C9B6, 0x71E47500, 0xA2F8AD6D, 0x104C11DB, + 0x82608EDB, 0x30D4326D, 0xE3C8EA00, 0x517C56B6, 0x4130476D, 0xF384FBDB, 0x209823B6, 0x922C9F00 + }; + UINT8 counter = 8; + + while(counter--) + { + targetCRC = (targetCRC >> 4) ^ crc32NibbleTable[targetCRC & 0x0F]; + } + + return targetCRC; +} + +UINT32 FastCRC32(UINT32 initial_crc, uint8_t data) +{ + // nibble lookup table for CRC32 polynomial 0x4C11DB7 + static const UINT32 crc32NibbleTable[16] = + { + 0x00000000, 0x04C11DB7, 0x09823B6E, 0x0D4326D9, 0x130476DC, 0x17C56B6B, 0x1A864DB2, 0x1E475005, + 0x2608EDB8, 0x22C9F00F, 0x2F8AD6D6, 0x2B4BCB61, 0x350C9B64, 0x31CD86D3, 0x3C8EA00A, 0x384FBDBD + }; + + initial_crc = crc32NibbleTable[(initial_crc >> 28) ^ (data >> 4)] ^ (initial_crc << 4) ; + initial_crc = crc32NibbleTable[(initial_crc >> 28) ^ (data & 0xF)] ^ (initial_crc << 4) ; + + return initial_crc; +} + +UINT32 SUPPORT_ComputeCRC(const void* buffer, int size, UINT32 initCrc) +{ + CRC_HandleTypeDef hcrc; + + uint32_t index = 0U; + uint32_t arg1; + uint32_t size_remainder = 0U; + volatile UINT32 crc, crc_temp; + volatile UINT32 targetCRC; + volatile UINT32 currentCRC; + + // anything to do here? + if(size == 0) + { + return initCrc; + } + + // init CRC unit + hcrc.Instance = CRC; + + // get pointer to buffer + uint8_t* ptr = (uint8_t*)buffer; + + // need to reset CRC peripheral if: + // - CRC initial value is 0 + // - the initial CRC is NOT already loaded in the calculation register + if(initCrc == 0 || (hcrc.Instance->DR != initCrc)) + { + // Reset CRC Calculation Unit + (&hcrc)->Instance->CR |= CRC_CR_RESET; + + // CRC calculation unit is initiated with 0xFFFFFFFF which is not a initial value for our CRC calculation + // feeding 0xFFFFFFFF to the calculation unit will set the register to 0x00000000 + while(hcrc.Instance->DR != 0x0) + { + hcrc.Instance->DR = hcrc.Instance->DR; + } + } + + if(initCrc != 0 && hcrc.Instance->DR != initCrc) + { + // we have an initial value for CRC calculation and that is not loaded in the CRC calculation register + // load calculation register with REVERSE initial CRC32 value (because of STM32F4 shift order) + hcrc.Instance->DR = ReverseCRC32(initCrc); + } + + // set variable to hold how many bytes remain after processing the buffer in steps of 4 bytes + size_remainder = size & 3; + + // we'll be reading the buffer in steps of 4 bytes, so the size must be recalculated accordingly + size = size >> 2; + + // feed data into the CRC calculator + for(index = 0U; index < size; index++) + { + // take the next 4 bytes as if they were a UINT32 + // because the CRC calculation unit expects the bytes in reverse order, reverse the byte order first + arg1 = __REV(*(uint32_t*)(ptr)); + + // feed the bytes to the CRC + hcrc.Instance->DR = arg1; + + // copy to return value + crc = (uint32_t)hcrc.Instance->DR; + + // increase pointer by 4 to the next position + // !! we are reading UINT32 from a UINT8 pointer!! + ptr +=4; + } + + // compute CRC for remaining bytes, if any + while(size_remainder--) + { + crc = FastCRC32(crc, *(uint8_t*)(ptr++)); + } + + // Return the CRC computed value + return crc; +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/CRC/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/CRC/dotNetMF.proj new file mode 100644 index 000000000..70a6aaf45 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/CRC/dotNetMF.proj @@ -0,0 +1,37 @@ + + + + CMSIS_CRC + {157C5580-48A2-4F69-8EFB-C5CEB7123177} + + + CMSIS CRC library + HAL + CMSIS_CRC.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\CRC\dotNetMF.proj + CMSIS_CRC.$(LIB_EXT).manifest + + + + False + + + False + False + True + DeviceCode\Targers\Native\STM32F4xx\CRC + Library + false + 4.0.0.0 + + + + + + + + + + + + \ No newline at end of file diff --git a/DeviceCode/Targets/Native/STM32F4xx/DA/DA_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/DA/DA_functions.cpp new file mode 100644 index 000000000..556a3a819 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/DA/DA_functions.cpp @@ -0,0 +1,246 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc. +// +// *** DA Conversion *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include + +/////////////////////////////////////////////////////////////////////////////// + +#define DA_CHANNELS 2 // number of channels + +#if (!defined(USE_DAC_CHANNEL_1) && !defined(USE_DAC_CHANNEL_2) && !defined(USE_BOTH_DAC_CHANNEL)) +#error "No DAC defines! Please go to platform_selector.h (in solution folder) and uncomment one and only one DAC define" +#endif +#if ((defined(USE_DAC_CHANNEL_2) && !defined(DAC_CHANNEL_2)) || (defined(USE_BOTH_DAC_CHANNEL) && !defined(DAC_CHANNEL_2))) +#error "DAC channel 2 doesn't exist! Please go to platform_selector.h (in solution folder) and comment defines USE_DAC_CHANNEL_2 and USE_BOTH_DAC_CHANNEL" +#endif +#if ((defined(USE_DAC_CHANNEL_1) && defined(USE_DAC_CHANNEL_2)) || (defined(USE_DAC_CHANNEL_1) && defined(USE_BOTH_DAC_CHANNEL)) || (defined(USE_DAC_CHANNEL_2) && defined(USE_BOTH_DAC_CHANNEL))) +#error "There can be only one define! Please go to platform_selector.h (in solution folder) and comment DAC defines less one" +#endif +//--// + +DAC_HandleTypeDef DacHandle; + +/** + * @brief DAC MSP De-Initialization + * This function frees the hardware resources used in this example: + * - Disable the Peripheral's clock + * - Revert GPIO to their default state + * @param hadc: DAC handle pointer + * @retval None + */ +void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* DAC Periph clock enable */ + __HAL_RCC_DAC_CLK_ENABLE(); + /* Enable GPIO clock ****************************************/ + __HAL_RCC_GPIOA_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* DAC Channels GPIO pin configuration */ +#ifdef USE_BOTH_DAC_CHANNEL + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + // channel 1 in pin PA4 + GPIO_InitStruct.Pin = GPIO_PIN_4; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + // channel 2 in pin PA5 + GPIO_InitStruct.Pin = GPIO_PIN_5; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +#else + #if USE_DAC_CHANNEL_2 + // channel 2 in pin PA5 + GPIO_InitStruct.Pin = GPIO_PIN_5; + #else + // channel 1 in pin PA4 + GPIO_InitStruct.Pin = GPIO_PIN_4; + #endif + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +#endif +} + +/** + * @brief DeInitializes the DAC MSP. + * @param hdac: pointer to a DAC_HandleTypeDef structure that contains + * the configuration information for the specified DAC. + * @retval None + */ +void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac) +{ + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_DAC_FORCE_RESET(); + __HAL_RCC_DAC_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* De-initialize the DAC Channels GPIO pin */ +#ifdef USE_BOTH_DAC_CHANNEL + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4); + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5); +#elif USE_DAC_CHANNEL_2 + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5); +#else + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4); +#endif +} + +BOOL DA_Initialize(DA_CHANNEL channel, INT32 precisionInBits) +{ + DAC_ChannelConfTypeDef sConfig; + + if (precisionInBits != 12) return FALSE; + + // Configure the DAC peripheral + DacHandle.Instance = DAC; + // Initialize the DAC peripheral + if(HAL_DAC_Init(&DacHandle) != HAL_OK) + { + // Initialization Error + return FALSE; + } + + // Configure DAC channel + sConfig.DAC_Trigger = DAC_TRIGGER_NONE; + sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE; + +#ifdef USE_BOTH_DAC_CHANNEL + if (channel) + { + // enable channel 2 + if(HAL_DAC_ConfigChannel(&DacHandle, &sConfig, DAC_CHANNEL_2) != HAL_OK) + { + // Channel configuration Error + return FALSE; + } + // Enable DAC Channel + if (HAL_DAC_Start(&DacHandle, DAC_CHANNEL_2) != HAL_OK) + { + // Start Error + return FALSE; + } + } + else + { + // enable channel 1 + if(HAL_DAC_ConfigChannel(&DacHandle, &sConfig, DAC_CHANNEL_1) != HAL_OK) + { + // Channel configuration Error + return FALSE; + } + // Enable DAC Channel + if (HAL_DAC_Start(&DacHandle, DAC_CHANNEL_1) != HAL_OK) + { + // Start Error + return FALSE; + } + } +#else + #if USE_DAC_CHANNEL_2 + // enable channel 2 + if(HAL_DAC_ConfigChannel(&DacHandle, &sConfig, DAC_CHANNEL_2) != HAL_OK) + { + // Channel configuration Error + return FALSE; + } + // Enable DAC Channel + if (HAL_DAC_Start(&DacHandle, DAC_CHANNEL_2) != HAL_OK) + { + // Start Error + return FALSE; + } + #else + // enable channel 1 + if(HAL_DAC_ConfigChannel(&DacHandle, &sConfig, DAC_CHANNEL_1) != HAL_OK) + { + // Channel configuration Error + return FALSE; + } + // Enable DAC Channel + if (HAL_DAC_Start(&DacHandle, DAC_CHANNEL_1) != HAL_OK) + { + // Start Error + return FALSE; + } + #endif +#endif + + return TRUE; +} + +void DA_Uninitialize(DA_CHANNEL channel) +{ + HAL_DAC_DeInit(&DacHandle); +} + +// level is a 12 bit value +void DA_Write(DA_CHANNEL channel, INT32 level) +{ + // set value +#ifdef USE_BOTH_DAC_CHANNEL + if (channel) + { + HAL_DAC_SetValue(&DacHandle, DAC_CHANNEL_2, DAC_ALIGN_12B_R, level); + } + else + { + HAL_DAC_SetValue(&DacHandle, DAC_CHANNEL_1, DAC_ALIGN_12B_R, level); + } +#else + #if USE_DAC_CHANNEL_2 + HAL_DAC_SetValue(&DacHandle, DAC_CHANNEL_2, DAC_ALIGN_12B_R, level); + #else + HAL_DAC_SetValue(&DacHandle, DAC_CHANNEL_1, DAC_ALIGN_12B_R, level); + #endif +#endif +} + +UINT32 DA_DAChannels() +{ +#ifdef DAC_CHANNEL_2 + return 2; +#else + return 1; +#endif +} + +GPIO_PIN DA_GetPinForChannel(DA_CHANNEL channel) +{ +#ifdef USE_BOTH_DAC_CHANNEL + if (channel) + { + // DAC_CHANNEL_2 on PA5 + return GPIO_PIN_5; + } + else + { + // DAC_CHANNEL_2 on PA4 + return GPIO_PIN_4; + } +#elif USE_DAC_CHANNEL_2 + return GPIO_PIN_5; +#else + return GPIO_PIN_4; +#endif +} + +BOOL DA_GetAvailablePrecisionsForChannel(DA_CHANNEL channel, INT32* precisions, UINT32& size) +{ + // FIXME - complete code with hardware availabel precisions + // Considering all channels with same precision + precisions[0] = 12; + size = 1; + return TRUE; +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/DA/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/DA/dotNetMF.proj new file mode 100644 index 000000000..3b7792b45 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/DA/dotNetMF.proj @@ -0,0 +1,33 @@ + + + CMSIS_DA + + + {DC611111-BDE0-479C-A1A4-AC76DE4F96B6} + CMSIS DA driver + HAL + CMSIS_DA.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\DA\dotNetMF.proj + CMSIS_DA.$(LIB_EXT).manifest + + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\DA + Library + false + 4.0.0.0 + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/Flash/Flash.h b/DeviceCode/Targets/Native/STM32F4xx/Flash/Flash.h new file mode 100644 index 000000000..7fa6ac71c --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Flash/Flash.h @@ -0,0 +1,56 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions based in original code from Oberon microsystems, Inc. +// +// *** Flash Driver *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include + +//--// +#ifndef _DRIVERS_FLASH_DRIVER_ +#define _DRIVERS_FLASH_DRIVER_ 1 + +//--// + +struct Flash_Driver +{ + + static BOOL ChipInitialize( void* context ); + + static BOOL ChipUnInitialize( void* context ); + + static const BlockDeviceInfo* GetDeviceInfo( void* context ); + + static BOOL Read( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff ); + + static BOOL Write( void* context, ByteAddress Address, UINT32 NumBytes, BYTE * pSectorBuff, BOOL ReadModifyWrite ); + + static BOOL Memset( void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes ); + + static BOOL GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata); + + static BOOL SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata); + + static BOOL IsBlockErased( void* context, ByteAddress BlockStart, UINT32 BlockLength ); + + static BOOL EraseBlock( void* context, ByteAddress Address ); + + static void SetPowerState( void* context, UINT32 State ); + + static UINT32 MaxSectorWrite_uSec( void* context ); + + static UINT32 MaxBlockErase_uSec( void* context ); + + +}; + +//--// + +#endif // _DRIVERS_FLASH_DRIVER_ diff --git a/DeviceCode/Targets/Native/STM32F4xx/Flash/Flash_driver.cpp b/DeviceCode/Targets/Native/STM32F4xx/Flash/Flash_driver.cpp new file mode 100644 index 000000000..99530032f --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Flash/Flash_driver.cpp @@ -0,0 +1,216 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions based in original code from Oberon microsystems, Inc. +// +// *** Flash Driver *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include "tinyhal.h" +#include "Flash.h" + +//--// + +BOOL __section("SectionForFlashOperations")Flash_Driver::ChipInitialize(void* context) +{ + NATIVE_PROFILE_HAL_DRIVERS_FLASH(); + return TRUE; +} + +BOOL __section("SectionForFlashOperations")Flash_Driver::ChipUnInitialize(void* context) +{ + NATIVE_PROFILE_HAL_DRIVERS_FLASH(); + return TRUE; +} + +const BlockDeviceInfo* __section("SectionForFlashOperations")Flash_Driver::GetDeviceInfo(void* context) +{ + MEMORY_MAPPED_NOR_BLOCK_CONFIG* config = (MEMORY_MAPPED_NOR_BLOCK_CONFIG*)context; + + return config->BlockConfig.BlockDeviceInformation; +} + +BOOL __section("SectionForFlashOperations")Flash_Driver::Read(void* context, ByteAddress startSector, UINT32 numBytes, BYTE * pSectorBuff) +{ + NATIVE_PROFILE_HAL_DRIVERS_FLASH(); + + if (pSectorBuff == NULL) return FALSE; + + UINT16* address = (UINT16 *)startSector; + UINT16* endAddress = (UINT16 *)(startSector + numBytes); + UINT16 *pBuf = (UINT16 *)pSectorBuff; + + while(address < endAddress) + { + *pBuf++ = *address++; + } + + return TRUE; +} + +BOOL __section("SectionForFlashOperations")Flash_Driver::Write(void* context, ByteAddress address, UINT32 numBytes, BYTE * dataBuffer, BOOL readModifyWrite) +{ + NATIVE_PROFILE_PAL_FLASH(); + + // Read-modify-write is used for FAT filesystems only + if (readModifyWrite) return FALSE; + + __IO uint32_t programAddress = address; + UINT16* bufferPointer = (UINT16*)dataBuffer; + + while(programAddress < (address + numBytes)) + { + if(HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, programAddress, *bufferPointer) != HAL_OK) + { + debug_printf( "Flash_WriteToSector failure @ 0x%08x\r\n", (UINT32)programAddress); + return FALSE; + } + + programAddress++; + bufferPointer++; + } + + return TRUE; +} + +BOOL __section("SectionForFlashOperations")Flash_Driver::Memset(void* context, ByteAddress Address, UINT8 Data, UINT32 NumBytes) +{ + NATIVE_PROFILE_PAL_FLASH(); + + // used for FAT filesystems only + return FALSE; +} + + +BOOL __section("SectionForFlashOperations")Flash_Driver::GetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata) +{ + // no metadata + return FALSE; +} + +BOOL __section("SectionForFlashOperations")Flash_Driver::SetSectorMetadata(void* context, ByteAddress SectorStart, SectorMetadata* pSectorMetadata) +{ + // no metadata + return FALSE; +} + +BOOL __section("SectionForFlashOperations")Flash_Driver::IsBlockErased(void* context, ByteAddress blockStart, UINT32 blockLength) +{ + NATIVE_PROFILE_HAL_DRIVERS_FLASH(); + + UINT16* address = (UINT16 *) blockStart; + UINT16* endAddress = (UINT16 *)(blockStart + blockLength); + + while(address < endAddress) + { + if(*address != (UINT16)-1) + { + return FALSE; + } + address++; + } + + return TRUE; +} + +BOOL __section("SectionForFlashOperations")Flash_Driver::EraseBlock(void* context, ByteAddress sector) +{ + NATIVE_PROFILE_HAL_DRIVERS_FLASH(); + + FLASH_EraseInitTypeDef FLASH_EraseInitStruct; + uint32_t sectorError = 0; + + // NETMF PAL 'block' designation is the equivalent to Cortex-M 'sector' so it's OK to use the address directly into the FLASH erase init struct + + // init FLASH erase structure with following configs + // erase a single sector in flash bank 1 (NETMF doesn't have the concept of multiple FLASH banks) + // sector to erase + FLASH_EraseInitStruct.TypeErase = FLASH_TYPEERASE_SECTORS; + FLASH_EraseInitStruct.Sector = (UINT32)sector; + FLASH_EraseInitStruct.NbSectors = 1; + FLASH_EraseInitStruct.Banks = FLASH_BANK_1; + + // set voltage range according to VDD_VALUE + // FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V + #if ((VDD_VALUE >= 1800U) && (VDD_VALUE < 2100U)) + FLASH_EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_1; + // FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V + #elif ((VDD_VALUE >= 2100U) && (VDD_VALUE < 2700U)) + FLASH_EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_2; + // FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V, + #elif ((VDD_VALUE >= 2700U) && (VDD_VALUE < 3600U)) + FLASH_EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_3; + // FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp + #elif (VDD_VALUE >= 3600U) + FLASH_EraseInitStruct.VoltageRange = FLASH_VOLTAGE_RANGE_4; + #else + #error CONFIGURATION ERROR: missing or invalid value for VDD_VALUE (check xxxxxxxxx_hal_conf.h in solution folder) + #endif + + // perform erase operation + if(HAL_FLASHEx_Erase(&FLASH_EraseInitStruct, §orError) != HAL_OK) + { + debug_printf( "Flash_EraseBlock failure @ sector %08x\r\n", (UINT32)sectorError); + return FALSE; + } + + return TRUE; +} + +void __section("SectionForFlashOperations")Flash_Driver::SetPowerState(void* context, UINT32 state) +{ +} + + +//--// --------------------------------------------------- + +#pragma arm section code = "SectionForFlashOperations" + +UINT32 __section("SectionForFlashOperations")Flash_Driver::MaxSectorWrite_uSec(void* context) +{ + NATIVE_PROFILE_PAL_FLASH(); + + MEMORY_MAPPED_NOR_BLOCK_CONFIG* config = (MEMORY_MAPPED_NOR_BLOCK_CONFIG*)context; + + return config->BlockConfig.BlockDeviceInformation->MaxSectorWrite_uSec; +} + + +UINT32 __section("SectionForFlashOperations")Flash_Driver::MaxBlockErase_uSec(void* context) +{ + NATIVE_PROFILE_PAL_FLASH(); + + MEMORY_MAPPED_NOR_BLOCK_CONFIG* config = (MEMORY_MAPPED_NOR_BLOCK_CONFIG*)context; + + return config->BlockConfig.BlockDeviceInformation->MaxBlockErase_uSec; +} + +#if defined(ADS_LINKER_BUG__NOT_ALL_UNUSED_VARIABLES_ARE_REMOVED) +#pragma arm section rodata = "g_CMSIS_Flash_DeviceTable" +#endif + +struct IBlockStorageDevice g_CMSIS_Flash_DeviceTable = +{ + &Flash_Driver::ChipInitialize, + &Flash_Driver::ChipUnInitialize, + &Flash_Driver::GetDeviceInfo, + &Flash_Driver::Read, + &Flash_Driver::Write, + &Flash_Driver::Memset, + &Flash_Driver::GetSectorMetadata, + &Flash_Driver::SetSectorMetadata, + &Flash_Driver::IsBlockErased, + &Flash_Driver::EraseBlock, + &Flash_Driver::SetPowerState, + &Flash_Driver::MaxSectorWrite_uSec, + &Flash_Driver::MaxBlockErase_uSec, +}; + +#if defined(ADS_LINKER_BUG__NOT_ALL_UNUSED_VARIABLES_ARE_REMOVED) +#pragma arm section rodata +#endif diff --git a/DeviceCode/Targets/Native/STM32F4xx/Flash/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/Flash/dotNetMF.proj new file mode 100644 index 000000000..2fc1b37c3 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Flash/dotNetMF.proj @@ -0,0 +1,38 @@ + + + + CMSIS_Flash + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\Flash\dotNetMF.proj + {00650055-00D3-008E-9D45-3758F085F71F} + + + CMSIS internal flash block storage driver + HAL + CMSIS_Flash.$(LIB_EXT) + CMSIS_Flash.$(LIB_EXT).manifest + BlockStorage + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\Flash + Library + false + 4.0.0.0 + + + + + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/GPIO/GPIO_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/GPIO/GPIO_functions.cpp new file mode 100644 index 000000000..d0f8ee5f6 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/GPIO/GPIO_functions.cpp @@ -0,0 +1,781 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions Lda. Based in original code from Oberon microsystems, Inc. +// +// *** GPIO Driver *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include + +// struct for pair GPIO and PIN +struct GPIOPortPin +{ + GPIO_TypeDef* port; + uint16_t pin; +} ; + +const GPIOPortPin gpioPortPin[] = GPIO_PORT_PINS; +#define GPIO_PIN_COUNT ARRAYSIZE_CONST_EXPR(gpioPortPin) + +struct Int_State +{ + HAL_COMPLETION completion; // debounce completion + BYTE pin; // gpio port pin index + BYTE mode; // edge mode + BYTE debounce; // debounce flag + BYTE expected; // expected pin state + GPIO_INTERRUPT_SERVICE_ROUTINE ISR; // interrupt handler + void* param; // interrupt handler parameter + UINT32 debounceTicks; +}; + +static Int_State g_int_state[GPIO_PIN_COUNT]; // interrupt state + +static UINT32 g_debounceTicks; +static UINT16 g_pinReserved[GPIO_PIN_COUNT]; // 1 bit per pin + +/* + * Debounce Completion Handler + */ +void GPIO_DebounceHandler(void* arg) +{ + Int_State* state = (Int_State*)arg; + if(state->ISR) + { + UINT32 actual = CPU_GPIO_GetPinState(state->pin); // get actual pin state + if(actual == state->expected) + { + state->ISR(state->pin, actual, state->param); + if(state->mode == GPIO_INT_EDGE_BOTH) + { // both edges + state->expected ^= 1; // update expected state + } + } + } +} + +/* + * Interrupt Handler + */ +void GlobalGPIOHandler(int pin) // 0 <= num <= 15 +{ + Int_State* state = &g_int_state[pin]; + state->completion.Abort(); + UINT32 actual; + + HAL_GPIO_EXTI_IRQHandler(gpioPortPin[pin].pin); + + actual = CPU_GPIO_GetPinState(state->pin); // get actual pin state + + if(state->ISR) + { + if(state->debounce) + { + // debounce enabled + // for back compat treat state.debounceTicks == 0 as indication to use global debounce setting + UINT32 debounceDeltaTicks = state->debounceTicks == 0 ? g_debounceTicks : state->debounceTicks; + state->completion.EnqueueTicks(HAL_Time_CurrentTicks() + debounceDeltaTicks); + } + else + { + state->ISR(state->pin, state->expected, state->param); + if(state->mode == GPIO_INT_EDGE_BOTH) + { + // both edges + if(actual != state->expected) + { // fire another isr to keep in synch + state->ISR(state->pin, actual, state->param); + } + else + { + state->expected ^= 1; // update expected state + } + } + } + } + +} + +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void EXTI0_IRQHandler(void) // EXTI0 +{ + GlobalGPIOHandler(0); +} + +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void EXTI1_IRQHandler(void) // EXTI1 +{ + GlobalGPIOHandler(1); +} + +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void EXTI2_IRQHandler(void) // EXTI2 +{ + GlobalGPIOHandler(2); +} + +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void EXTI3_IRQHandler(void) // EXTI3 +{ + GlobalGPIOHandler(3); +} + +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void EXTI4_IRQHandler(void) // EXTI4 +{ + GlobalGPIOHandler(4); +} + +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void EXTI9_5_IRQHandler(void) // EXTI5 - EXTI9 +{ + UINT32 pending = EXTI->PR & EXTI->IMR & 0x03E0; // pending bits 5..9 + int num = 5; + pending >>= 5; + do + { + if(pending & 1) + { + GlobalGPIOHandler(num); + } + num++; + pending >>= 1; + } + while(pending); +} + +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void EXTI15_10_IRQHandler(void) // EXTI10 - EXTI15 +{ + UINT32 pending = EXTI->PR & EXTI->IMR & 0xFC00; // pending bits 10..15 + int num = 10; + pending >>= 10; + do + { + if(pending & 1) + { + GlobalGPIOHandler(num); + } + num++; + pending >>= 1; + } + while(pending); +} + +void EnableIRQ(uint16_t gpio_pin) +{ + if(gpio_pin == GPIO_PIN_0) + { + HAL_NVIC_EnableIRQ(EXTI0_IRQn); + } + else if(gpio_pin == GPIO_PIN_1) + { + HAL_NVIC_EnableIRQ(EXTI1_IRQn); + } + else if(gpio_pin == GPIO_PIN_2) + { + HAL_NVIC_EnableIRQ(EXTI2_IRQn); + } + else if(gpio_pin == GPIO_PIN_3) + { + HAL_NVIC_EnableIRQ(EXTI3_IRQn); + } + else if(gpio_pin == GPIO_PIN_4) + { + HAL_NVIC_EnableIRQ(EXTI4_IRQn); + } + else if(gpio_pin == GPIO_PIN_5) + { + HAL_NVIC_EnableIRQ(EXTI9_5_IRQn); + } + else if(gpio_pin == GPIO_PIN_6) + { + HAL_NVIC_EnableIRQ(EXTI9_5_IRQn); + } + else if(gpio_pin == GPIO_PIN_7) + { + HAL_NVIC_EnableIRQ(EXTI9_5_IRQn); + } + else if(gpio_pin == GPIO_PIN_8) + { + HAL_NVIC_EnableIRQ(EXTI9_5_IRQn); + } + else if(gpio_pin == GPIO_PIN_9) + { + HAL_NVIC_EnableIRQ(EXTI9_5_IRQn); + } + else if(gpio_pin == GPIO_PIN_10) + { + HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); + } + else if(gpio_pin == GPIO_PIN_11) + { + HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); + } + else if(gpio_pin == GPIO_PIN_12) + { + HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); + } + else if(gpio_pin == GPIO_PIN_13) + { + HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); + } + else if(gpio_pin == GPIO_PIN_14) + { + HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); + } + else if(gpio_pin == GPIO_PIN_15) + { + HAL_NVIC_EnableIRQ(EXTI15_10_IRQn); + } +} + +void GPIO_Pin_Config(GPIO_PIN pin + , UINT32 mode + , GPIO_RESISTOR resistor + , GPIO_INT_EDGE edge + , GPIO_INTERRUPT_SERVICE_ROUTINE ISR) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + GPIO_InitStructure.Pin = gpioPortPin[pin].pin; + + // Configure pin mode + GPIO_InitStructure.Mode = mode; + + // interrupt is defined? + if(ISR != NULL) + { + if(edge == GPIO_INT_EDGE_BOTH) + { + GPIO_InitStructure.Mode |= GPIO_MODE_IT_RISING_FALLING; + } + // falling edge or both + else if(edge == GPIO_INT_EDGE_LOW || edge == GPIO_INT_LEVEL_LOW) + { + GPIO_InitStructure.Mode |= GPIO_MODE_IT_FALLING; + } + // rising or both + else if(edge == GPIO_INT_EDGE_HIGH || edge == GPIO_INT_LEVEL_HIGH) + { + GPIO_InitStructure.Mode |= GPIO_MODE_IT_RISING; + } + } + + if(resistor == RESISTOR_PULLUP) + { + GPIO_InitStructure.Pull = GPIO_PUPDR_PUPDR0_0; + } + else if(resistor == RESISTOR_PULLDOWN) + { + GPIO_InitStructure.Pull = GPIO_PUPDR_PUPDR0_1; + } + + // Init GPIO + HAL_GPIO_Init(gpioPortPin[pin].port, &GPIO_InitStructure); +} + +BOOL CPU_GPIO_Initialize() +{ + GPIO_InitTypeDef GPIO_InitStruct; + + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + CPU_GPIO_SetDebounce(20); // ??? + + // Configure all GPIO as analog to reduce current consumption on non used IOs + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Pin = GPIO_PIN_All; + + #if defined (RCC_AHB1ENR_GPIOAEN) + + #if !defined(BUILD_RTM) + // don't change PA13 and PA14 as they maybe used in JTAG + GPIO_InitStruct.Pin = GPIO_PIN_All & (~GPIO_PIN_13) & (~GPIO_PIN_14); + #endif + + __HAL_RCC_GPIOA_CLK_ENABLE(); + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + // disable Port A clock only if this not RTM, otherwise keep it active for JTAG and debug + #if defined(BUILD_RTM) + __HAL_RCC_GPIOA_CLK_DISABLE(); + #endif + + #endif + + #if !defined(BUILD_RTM) && (TOTAL_GENERIC_PORTS == 1) + // don't change PB3 if it's being used as ITM port for SWO + GPIO_InitStruct.Pin = GPIO_PIN_All & (~GPIO_PIN_3); + #else + // reset pin structure to ALL + GPIO_InitStruct.Pin = GPIO_PIN_All & (~GPIO_PIN_13) & (~GPIO_PIN_14); + #endif + + #if defined (RCC_AHB1ENR_GPIOBEN) + __HAL_RCC_GPIOB_CLK_ENABLE(); + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + // turn off clock only for Port B only if ITM port for SWO it's not being used + #if !(TOTAL_GENERIC_PORTS == 1) + __HAL_RCC_GPIOB_CLK_DISABLE(); + #endif + + #endif + + #if !defined(BUILD_RTM) + // reset pin structure to ALL + GPIO_InitStruct.Pin = GPIO_PIN_All & (~GPIO_PIN_13) & (~GPIO_PIN_14); + #endif + + #if defined (RCC_AHB1ENR_GPIOCEN) + __HAL_RCC_GPIOC_CLK_ENABLE(); + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + __HAL_RCC_GPIOC_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIODEN) + __HAL_RCC_GPIOD_CLK_ENABLE(); + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + __HAL_RCC_GPIOD_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOEEN) + __HAL_RCC_GPIOE_CLK_ENABLE(); + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + __HAL_RCC_GPIOE_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOFEN) + __HAL_RCC_GPIOF_CLK_ENABLE(); + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + __HAL_RCC_GPIOF_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOGEN) + __HAL_RCC_GPIOG_CLK_ENABLE(); + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + __HAL_RCC_GPIOG_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOHEN) + __HAL_RCC_GPIOH_CLK_ENABLE(); + HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); + __HAL_RCC_GPIOH_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOIEN) + __HAL_RCC_GPIOI_CLK_ENABLE(); + HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); + __HAL_RCC_GPIOI_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOJEN) + __HAL_RCC_GPIOJ_CLK_ENABLE(); + HAL_GPIO_Init(GPIOJ, &GPIO_InitStruct); + __HAL_RCC_GPIOJ_CLK_DISABLE(); + #endif + + for(int i = 0; i < GPIO_PIN_COUNT; i++) + { + g_pinReserved[i] = FALSE; + g_int_state[i].completion.InitializeForISR(&GPIO_DebounceHandler); + + // Enable GPIO clock + if(gpioPortPin[i].port == GPIOA) + { + __HAL_RCC_GPIOA_CLK_ENABLE(); + } + #if defined (RCC_AHB1ENR_GPIOBEN) + else if(gpioPortPin[i].port == GPIOB) + { + __HAL_RCC_GPIOB_CLK_ENABLE(); + } + #endif + #if defined (RCC_AHB1ENR_GPIOCEN) + else if(gpioPortPin[i].port == GPIOC) + { + __HAL_RCC_GPIOC_CLK_ENABLE(); + } + #endif + #if defined (RCC_AHB1ENR_GPIODEN) + else if(gpioPortPin[i].port == GPIOD) + { + __HAL_RCC_GPIOD_CLK_ENABLE(); + } + #endif + #if defined (RCC_AHB1ENR_GPIOEEN) + else if(gpioPortPin[i].port == GPIOE) + { + __HAL_RCC_GPIOE_CLK_ENABLE(); + } + #endif + #if defined (RCC_AHB1ENR_GPIOFEN) + else if(gpioPortPin[i].port == GPIOF) + { + __HAL_RCC_GPIOF_CLK_ENABLE(); + } + #endif + #if defined (RCC_AHB1ENR_GPIOGEN) + else if(gpioPortPin[i].port == GPIOG) + { + __HAL_RCC_GPIOG_CLK_ENABLE(); + } + #endif + #if defined (RCC_AHB1ENR_GPIOHEN) + else if(gpioPortPin[i].port == GPIOH) + { + __HAL_RCC_GPIOH_CLK_ENABLE(); + } + #endif + #if defined (RCC_AHB1ENR_GPIOIEN) + else if(gpioPortPin[i].port == GPIOI) + { + __HAL_RCC_GPIOI_CLK_ENABLE(); + } + #endif + #if defined (RCC_AHB1ENR_GPIOJEN) + else if(gpioPortPin[i].port == GPIOJ) + { + __HAL_RCC_GPIOJ_CLK_ENABLE(); + } + #endif + } + + return TRUE; +} + +BOOL CPU_GPIO_Uninitialize() +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + for(int i = 0; i < GPIO_PIN_COUNT; i++) + { + g_int_state[i].completion.Abort(); + } + + // disable all GPIO external interrups and clock; + #if defined (RCC_AHB1ENR_GPIOAEN) + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_All); + __HAL_RCC_GPIOA_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOBEN) + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_All); + __HAL_RCC_GPIOB_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOCEN) + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_All); + __HAL_RCC_GPIOC_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIODEN) + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_All); + __HAL_RCC_GPIOD_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOEEN) + HAL_GPIO_DeInit(GPIOE, GPIO_PIN_All); + __HAL_RCC_GPIOE_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOFEN) + HAL_GPIO_DeInit(GPIOF, GPIO_PIN_All); + __HAL_RCC_GPIOF_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOGEN) + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_All); + __HAL_RCC_GPIOG_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOHEN) + HAL_GPIO_DeInit(GPIOH, GPIO_PIN_All); + __HAL_RCC_GPIOH_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOIEN) + HAL_GPIO_DeInit(GPIOI, GPIO_PIN_All); + __HAL_RCC_GPIOI_CLK_DISABLE(); + #endif + #if defined (RCC_AHB1ENR_GPIOJEN) + HAL_GPIO_DeInit(GPIOJ, GPIO_PIN_All); + __HAL_RCC_GPIOJ_CLK_DISABLE(); + #endif + + return TRUE; +} + +UINT32 CPU_GPIO_Attributes(GPIO_PIN pin) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(pin < GPIO_PIN_COUNT) + { + return GPIO_ATTRIBUTE_INPUT | GPIO_ATTRIBUTE_OUTPUT; + } + return GPIO_ATTRIBUTE_NONE; +} + +/* + * alternate: + * GPIO_ALT_PRIMARY: GPIO + * GPIO_ALT_MODE_1: Analog + * GPIO_ALT_MODE_2 | AF << 4 | speed << 8: Alternate Function + * GPIO_ALT_MODE_3 | AF << 4 | speed << 8: Alternate Function with open drain + * speed: 0: 2MHZ, 1: 25MHz, 2: 50MHz, 3: 100MHz + */ +void CPU_GPIO_DisablePin(GPIO_PIN pin, GPIO_RESISTOR resistor, UINT32 output, GPIO_ALT_MODE alternate) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(pin < GPIO_PIN_COUNT) + { + // disable INT state for this pin + Int_State* state = &g_int_state[pin]; + + state->ISR = NULL; + state->completion.Abort(); + + // release pin + g_pinReserved[pin] = FALSE; + + // de-init this pin and configure GPIOit as analog to reduce current consumption on non used IOs + GPIO_InitTypeDef GPIO_InitStruct; + + GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Pin = gpioPortPin[pin].pin; + + HAL_GPIO_Init(gpioPortPin[pin].port, &GPIO_InitStruct); + } +} + +void CPU_GPIO_EnableOutputPin(GPIO_PIN pin, BOOL initialState) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(pin < GPIO_PIN_COUNT) + { + // general purpose output, any edge, does matter + GPIO_Pin_Config(pin, GPIO_MODE_OUTPUT_PP, RESISTOR_DISABLED, GPIO_INT_EDGE_BOTH, NULL); + + CPU_GPIO_SetPinState(pin, initialState); + + // disable INT state for this pin + Int_State* state = &g_int_state[pin]; + + state->ISR = NULL; + state->completion.Abort(); + } +} + +BOOL CPU_GPIO_EnableInputPin(GPIO_PIN pin + , BOOL GlitchFilterEnable + , GPIO_INTERRUPT_SERVICE_ROUTINE ISR + , GPIO_INT_EDGE edge + , GPIO_RESISTOR resistor + ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + return CPU_GPIO_EnableInputPin2(pin, GlitchFilterEnable, ISR, 0, edge, resistor); +} + +BOOL CPU_GPIO_EnableInputPin2(GPIO_PIN pin + , BOOL GlitchFilterEnable + , GPIO_INTERRUPT_SERVICE_ROUTINE ISR + , void* ISR_Param + , GPIO_INT_EDGE edge + , GPIO_RESISTOR resistor + ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(pin >= GPIO_PIN_COUNT) + return FALSE; + + GPIO_Pin_Config(pin, GPIO_MODE_INPUT, resistor, edge, ISR); // input + + Int_State* state = &g_int_state[pin]; + + if(ISR) + { + state->pin = (BYTE)pin; + state->mode = (BYTE)edge; + state->debounce = (BYTE)GlitchFilterEnable; + state->param = ISR_Param; + state->ISR = ISR; + state->completion.Abort(); + state->completion.SetArgument(state); + + switch(edge) + { + case GPIO_INT_EDGE_LOW: + case GPIO_INT_LEVEL_LOW: + state->expected = FALSE; + break; + + case GPIO_INT_EDGE_HIGH: + case GPIO_INT_LEVEL_HIGH: + state->expected = TRUE; + break; + + case GPIO_INT_EDGE_BOTH: + UINT32 actual; + do + { + // clear pending interrupt + __HAL_GPIO_EXTI_CLEAR_FLAG(gpioPortPin[pin].pin); + actual = CPU_GPIO_GetPinState(pin); // get actual pin state + } while(__HAL_GPIO_EXTI_GET_IT(gpioPortPin[pin].pin)); // repeat if pending again + state->expected = (BYTE)(actual ^ 1); + } + + // Enable and set EXTI Line Interrupt + EnableIRQ(gpioPortPin[pin].pin); + + // check for level interrupts + if(edge == GPIO_INT_LEVEL_HIGH && CPU_GPIO_GetPinState(pin) + || edge == GPIO_INT_LEVEL_LOW && !CPU_GPIO_GetPinState(pin)) + { + // force interrupt + __HAL_GPIO_EXTI_GENERATE_SWIT(gpioPortPin[pin].pin); + } + } + else + { + // clear state, just in case + state->ISR = NULL; + state->completion.Abort(); + } + + return TRUE; +} + +BOOL CPU_GPIO_GetPinState(GPIO_PIN pin) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(pin >= GPIO_PIN_COUNT) + return FALSE; + + return (BOOL)HAL_GPIO_ReadPin(gpioPortPin[pin].port, gpioPortPin[pin].pin); +} + +void CPU_GPIO_SetPinState(GPIO_PIN pin, BOOL pinState) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(pin < GPIO_PIN_COUNT) + { + HAL_GPIO_WritePin(gpioPortPin[pin].port, gpioPortPin[pin].pin, (GPIO_PinState)pinState); + } +} + +BOOL CPU_GPIO_PinIsBusy(GPIO_PIN pin) // busy == reserved +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(pin >= GPIO_PIN_COUNT) + return FALSE; + + return g_pinReserved[pin]; +} + +BOOL CPU_GPIO_ReservePin(GPIO_PIN pin, BOOL fReserve) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(pin >= GPIO_PIN_COUNT) + return FALSE; + + GLOBAL_LOCK(irq); + if(fReserve) + { + if(g_pinReserved[pin]) + { + // already reserved + return FALSE; + } + else + { + // OK to reserve pin + g_pinReserved[pin] = TRUE; + } + } + else + { + // release pin + g_pinReserved[pin] = FALSE; + } + + return TRUE; +} + +UINT32 CPU_GPIO_GetDebounce() +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + return g_debounceTicks / (SLOW_CLOCKS_PER_SECOND / 1000); // ticks -> ms +} + +BOOL CPU_GPIO_SetDebounce(INT64 debounceTimeMilliseconds) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + if(debounceTimeMilliseconds > 0 && debounceTimeMilliseconds < 10000) + { + g_debounceTicks = CPU_MillisecondsToTicks((UINT32)debounceTimeMilliseconds); + return TRUE; + } + return FALSE; +} + +INT32 CPU_GPIO_GetPinCount() +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + return GPIO_PIN_COUNT; +} + +void CPU_GPIO_GetPinsMap(UINT8* pins, size_t size) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + for(int i = 0; i < size && i < GPIO_PIN_COUNT; i++) + { + pins[i] = GPIO_ATTRIBUTE_INPUT | GPIO_ATTRIBUTE_OUTPUT; + } +} + +UINT8 CPU_GPIO_GetSupportedResistorModes(GPIO_PIN pin) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + return (1 << RESISTOR_DISABLED) | (1 << RESISTOR_PULLUP) | (1 << RESISTOR_PULLDOWN); +} + +UINT8 CPU_GPIO_GetSupportedInterruptModes(GPIO_PIN pin) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + return (1 << GPIO_INT_EDGE_LOW) | (1 << GPIO_INT_EDGE_HIGH) | (1 << GPIO_INT_EDGE_BOTH) + | (1 << GPIO_INT_LEVEL_LOW) | (1 << GPIO_INT_LEVEL_HIGH); +} + +UINT32 CPU_GPIO_GetPinDebounce(GPIO_PIN pin) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + Int_State& state = g_int_state[gpioPortPin[pin].pin]; + + return state.debounceTicks / (SLOW_CLOCKS_PER_SECOND / 1000); // ticks -> ms +} + +BOOL CPU_GPIO_SetPinDebounce(GPIO_PIN pin, INT64 debounceTimeMilliseconds) +{ + NATIVE_PROFILE_HAL_PROCESSOR_GPIO(); + + Int_State& state = g_int_state[gpioPortPin[pin].pin]; + + if(debounceTimeMilliseconds > 0 && debounceTimeMilliseconds < 10000) + { + state.debounceTicks = CPU_MillisecondsToTicks((UINT32)debounceTimeMilliseconds); + return TRUE; + } + return FALSE; +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/GPIO/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/GPIO/dotNetMF.proj new file mode 100644 index 000000000..803cdf732 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/GPIO/dotNetMF.proj @@ -0,0 +1,33 @@ + + + CMSIS_GPIO + + + {463E3E9A-9C28-444A-B3C7-5EC97A9F9B59} + CMSIS GPIO driver + HAL + CMSIS_GPIO.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\GPIO\dotNetMF.proj + CMSIS_GPIO.$(LIB_EXT).manifest + + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\GPIO + Library + false + 4.0.0.0 + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/I2C/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/I2C/dotNetMF.proj new file mode 100644 index 000000000..35484d717 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/I2C/dotNetMF.proj @@ -0,0 +1,36 @@ + + + CMSIS_I2C + + + {1745D6CE-8C0D-4796-B9CC-70185FE7F192} + CMSIS I2C driver + HAL + CMSIS_I2C.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\I2C\dotNetMF.proj + CMSIS_I2C.$(LIB_EXT).manifest + + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\I2C + Library + false + 4.0.0.0 + + + true + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/I2C/i2c_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/I2C/i2c_functions.cpp new file mode 100644 index 000000000..82e28523f --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/I2C/i2c_functions.cpp @@ -0,0 +1,408 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions Lda. Based in original code from Oberon microsystems, Inc. +// +// *** I2C Driver *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include +////////////////////////////////////// +// to simplify, becasue NETMF only use a single I2C1 port +////////////////////////////////////// +// #if I2C_PORT == 2 +// #define I2Cx I2C2 +// #define I2Cx_EV_IRQn I2C2_EV_IRQn +// #define I2Cx_ER_IRQn I2C2_ER_IRQn +// #define RCC_APB1ENR_I2CxEN RCC_APB1ENR_I2C2EN +// #define RCC_APB1RSTR_I2CxRST RCC_APB1RSTR_I2C2RST +// #if !defined(I2C_SCL_PIN) +// #define I2C_SCL_PIN 26 // PB10 +// #endif +// #if !defined(I2C_SDA_PIN) +// #define I2C_SDA_PIN 27 // PB11 +// #endif +// #elif I2C_PORT == 3 +// #define I2Cx I2C3 +// #define I2Cx_EV_IRQn I2C3_EV_IRQn +// #define I2Cx_ER_IRQn I2C3_ER_IRQn +// #define RCC_APB1ENR_I2CxEN RCC_APB1ENR_I2C3EN +// #define RCC_APB1RSTR_I2CxRST RCC_APB1RSTR_I2C3RST +// #if !defined(I2C_SCL_PIN) +// #define I2C_SCL_PIN 8 // PA8 +// #endif +// #if !defined(I2C_SDA_PIN) +// #define I2C_SDA_PIN 41 // PC9 +// #endif +// #else // use I2C1 by default + #define I2Cx I2C1 + #define I2Cx_EV_IRQn I2C1_EV_IRQn + #define I2Cx_ER_IRQn I2C1_ER_IRQn + #define RCC_APB1ENR_I2CxEN RCC_APB1ENR_I2C1EN + #define RCC_APB1RSTR_I2CxRST RCC_APB1RSTR_I2C1RST + #if !defined(I2C_SCL_PIN) + #define I2C_SCL_PIN 22 // PB6 + #endif + #if !defined(I2C_SDA_PIN) + #define I2C_SDA_PIN 23 // PB7 + #endif +// #endif + +/* I2C handler declaration */ +I2C_HandleTypeDef I2cHandle; + +static I2C_HAL_XACTION* currentI2CXAction; +static I2C_HAL_XACTION_UNIT* currentI2CUnit; + +// prototypes +void Start_Master_Transmit(I2C_HAL_XACTION_UNIT* unit, uint16_t I2CAddress); +void Start_Master_Receive(I2C_HAL_XACTION_UNIT* unit, uint16_t I2CAddress); +void I2C_Tx_Rx_Completed(); + +// RX buffer pointer +uint8_t * rxBuffer = NULL; + +/** + * @brief This function handles I2C event interrupt request. + * @param None + * @retval None + * @Note This function is redefined in "main.h" and related to I2C data transmission + */ +void I2C1_EV_IRQHandler(void) +{ + HAL_I2C_EV_IRQHandler(&I2cHandle); +} + +/** + * @brief This function handles I2C error interrupt request. + * @param None + * @retval None + * @Note This function is redefined in "main.h" and related to I2C error + */ +void I2C1_ER_IRQHandler(void) +{ + HAL_I2C_ER_IRQHandler(&I2cHandle); +} + +/** + * @brief I2C error callbacks. + * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + * the configuration information for I2C module + * @retval None + */ +void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) +{ + // free rx buffer + if(rxBuffer != NULL) + { + free(rxBuffer); + rxBuffer = NULL; + } + + I2C_HAL_XACTION* xAction = currentI2CXAction; + xAction->Signal(I2C_HAL_XACTION::c_Status_Aborted); // calls XActionStop() +} + +/** + * @brief Master Tx Transfer completed callbacks. + * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + * the configuration information for I2C module + * @retval None + */ +void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) +{ + I2C_Tx_Rx_Completed(); +} + +/** + * @brief Master Rx Transfer completed callbacks. + * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + * the configuration information for I2C module + * @retval None + */ +void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) +{ + for(int i = 0; i < hi2c->XferSize; i++) + { + // save next data byte into queue + *(currentI2CUnit->m_dataQueue.Push()) = rxBuffer[i]; + } + // adjust counters + currentI2CUnit->m_bytesTransferred = hi2c->XferSize; + currentI2CUnit->m_bytesToTransfer -= hi2c->XferSize; + + // free rx buffer + free(rxBuffer); + rxBuffer = NULL; + + I2C_Tx_Rx_Completed(); +} + +void I2C_Tx_Rx_Completed() +{ + I2C_HAL_XACTION* xAction = currentI2CXAction; + + // all received or all sent + if (!xAction->ProcessingLastUnit()) + { + // get current unit + currentI2CUnit = xAction->m_xActionUnits[xAction->m_current++]; + + // start next unit + // what is the direction of the current I2C unit? + if (currentI2CUnit->IsReadXActionUnit()) + { + // read transaction + // get address from xAction + Start_Master_Receive(currentI2CUnit, xAction->m_address << 1); + } + else + { + // write transaction + // get address from xAction + Start_Master_Transmit(currentI2CUnit, xAction->m_address << 1); + } + } + else + { + xAction->Signal(I2C_HAL_XACTION::c_Status_Completed); // calls XActionStop() + } +} + +void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + __HAL_RCC_GPIOB_CLK_ENABLE(); + /* Enable I2C1 clock */ + __HAL_RCC_I2C1_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* I2C TX GPIO pin configuration */ + GPIO_InitStruct.Pin = I2C_SCL_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FAST; + GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* I2C RX GPIO pin configuration */ + GPIO_InitStruct.Pin = I2C_SDA_PIN; + GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; + + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*##-3- Configure the NVIC for I2C #########################################*/ + /* NVIC priority for I2C1 */ + HAL_NVIC_SetPriority(I2C1_ER_IRQn, 0, 1); + HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 2); +} + +void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) +{ + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_I2C1_FORCE_RESET(); + __HAL_RCC_I2C1_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Configure I2C Tx as alternate function */ + HAL_GPIO_DeInit(GPIOB, I2C_SCL_PIN); + /* Configure I2C Rx as alternate function */ + HAL_GPIO_DeInit(GPIOB, I2C_SDA_PIN); + + /*##-3- Disable the NVIC for I2C ###########################################*/ + HAL_NVIC_DisableIRQ(I2C1_ER_IRQn); + HAL_NVIC_DisableIRQ(I2C1_EV_IRQn); +} + +BOOL I2C_Internal_Initialize() +{ + // NATIVE_PROFILE_HAL_PROCESSOR_I2C(); + + // if (!(RCC->APB1ENR & RCC_APB1ENR_I2CxEN)) { // only once + // currentI2CXAction = NULL; + // currentI2CUnit = NULL; + + // // set pins to AF4 and open drain + // CPU_GPIO_DisablePin( I2C_SDA_PIN, RESISTOR_PULLUP, 0, (GPIO_ALT_MODE)0x43 ); + // CPU_GPIO_DisablePin( I2C_SCL_PIN, RESISTOR_PULLUP, 0, (GPIO_ALT_MODE)0x43 ); + + // RCC->APB1ENR |= RCC_APB1ENR_I2CxEN; // enable I2C clock + // RCC->APB1RSTR = RCC_APB1RSTR_I2CxRST; // reset I2C peripheral + // RCC->APB1RSTR = 0; + + // I2Cx->CR2 = SYSTEM_APB1_CLOCK_HZ / 1000000; // APB1 clock in MHz + // I2Cx->CCR = (SYSTEM_APB1_CLOCK_HZ / 1000 / 2 - 1) / 100 + 1; // 100KHz + // I2Cx->TRISE = SYSTEM_APB1_CLOCK_HZ / (1000 * 1000) + 1; // 1ns; + // I2Cx->OAR1 = 0x4000; // init address register + + // I2Cx->CR1 = I2C_CR1_PE; // enable peripheral + + // CPU_INTC_ActivateInterrupt(I2Cx_EV_IRQn, I2C_EV_Interrupt, 0); + // CPU_INTC_ActivateInterrupt(I2Cx_ER_IRQn, I2C_ER_Interrupt, 0); + // } + + return TRUE; +} + +BOOL I2C_Internal_Uninitialize() +{ + // NATIVE_PROFILE_HAL_PROCESSOR_I2C(); + + // CPU_INTC_DeactivateInterrupt(I2Cx_EV_IRQn); + // CPU_INTC_DeactivateInterrupt(I2Cx_ER_IRQn); + // I2Cx->CR1 = 0; // disable peripheral + // RCC->APB1ENR &= ~RCC_APB1ENR_I2CxEN; // disable I2C clock + + return TRUE; +} + +void I2C_Internal_XActionStart( I2C_HAL_XACTION* xAction, bool repeatedStart ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_I2C(); + + // I2C handler declaration + I2C_HandleTypeDef I2cHandle; + + /*##-1- Configure the I2C peripheral ######################################*/ + I2cHandle.Instance = I2Cx; + + I2cHandle.Init.AddressingMode = I2C_ADDRESSINGMODE_10BIT; + I2cHandle.Init.ClockSpeed = xAction->m_clockRate + (xAction->m_clockRate2 << 8);//400000; + I2cHandle.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; + I2cHandle.Init.DutyCycle = I2C_DUTYCYCLE_16_9; + I2cHandle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; + I2cHandle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; + I2cHandle.Init.OwnAddress1 = xAction->m_address << 1;//I2C_ADDRESS; + I2cHandle.Init.OwnAddress2 = 0xFE; + + if(HAL_I2C_Init(&I2cHandle) != HAL_OK) + { + // Initialization Error + return; + } + + // set vars for latter use + currentI2CXAction = xAction; + currentI2CUnit = xAction->m_xActionUnits[xAction->m_current++]; + + // enable interrupts + HAL_NVIC_EnableIRQ(I2C1_ER_IRQn); + HAL_NVIC_EnableIRQ(I2C1_EV_IRQn); + + // what is the direction of the current I2C unit? + if (currentI2CUnit->IsReadXActionUnit()) + { + // read transaction + // get address from xAction + Start_Master_Receive(currentI2CUnit, xAction->m_address << 1); + } + else + { + // write transaction + // get address from xAction + Start_Master_Transmit(currentI2CUnit, xAction->m_address << 1); + } +} + +void I2C_Internal_XActionStop() +{ + NATIVE_PROFILE_HAL_PROCESSOR_I2C(); + // disable interrupts + HAL_NVIC_DisableIRQ(I2C1_ER_IRQn); + HAL_NVIC_DisableIRQ(I2C1_EV_IRQn); + // null vars + currentI2CXAction = NULL; + currentI2CUnit = NULL; +} + +void I2C_Internal_GetClockRate( UINT32 rateKhz, UINT8& clockRate, UINT8& clockRate2) +{ + NATIVE_PROFILE_HAL_PROCESSOR_I2C(); + if (rateKhz > 400) rateKhz = 400; // upper limit + UINT32 ccr; + if (rateKhz <= 100) + { + // slow clock + ccr = (SYSTEM_APB1_CLOCK_HZ / 1000 / 2 - 1) / rateKhz + 1; // round up + if (ccr > 0xFFF) ccr = 0xFFF; // max divider + } + else + { + // fast clock + ccr = (SYSTEM_APB1_CLOCK_HZ / 1000 / 3 - 1) / rateKhz + 1; // round up + ccr |= 0x8000; // set fast mode (duty cycle 1:2) + } + clockRate = (UINT8)ccr; // low byte + clockRate2 = (UINT8)(ccr >> 8); // high byte +} + +void I2C_Internal_GetPins(GPIO_PIN& scl, GPIO_PIN& sda) +{ + scl = I2C_SCL_PIN; + sda = I2C_SDA_PIN; +} + +void Start_Master_Transmit(I2C_HAL_XACTION_UNIT* unit, uint16_t I2CAddress) +{ + // fill tx buffer + uint8_t aTxBuffer[unit->m_bytesToTransfer]; + uint8_t counter = unit->m_bytesToTransfer; + + for(int i = 0; i < counter; i++) + { + // get next data byte from queue + aTxBuffer[i] = *(unit->m_dataQueue.Pop()); + } + + while(HAL_I2C_Master_Transmit_IT(&I2cHandle, (uint16_t)I2CAddress, (uint8_t*)aTxBuffer, unit->m_bytesToTransfer) != HAL_OK) + { + /* When Acknowledge failure occurs (Slave don't acknowledge it's address) + Master restarts communication */ + if (HAL_I2C_GetError(&I2cHandle) != HAL_I2C_ERROR_AF) + { + // couldn't start the transmission because of a timeout error + // nothing else to do because the caller will handle the timeout error + + // done here + return; + } + } + + // transmission started correctly + // adjust counters + unit->m_bytesTransferred = unit->m_bytesToTransfer; + unit->m_bytesToTransfer = 0; +} + +void Start_Master_Receive(I2C_HAL_XACTION_UNIT* unit, uint16_t I2CAddress) +{ + // allocate rx buffer + rxBuffer = (uint8_t *) malloc(unit->m_bytesToTransfer); + + while(HAL_I2C_Master_Receive_IT(&I2cHandle, (uint16_t)I2CAddress, (uint8_t *)rxBuffer, unit->m_bytesToTransfer) != HAL_OK) + { + /* When Acknowledge failure occurs (Slave don't acknowledge it's address) + Master restarts communication */ + if (HAL_I2C_GetError(&I2cHandle) != HAL_I2C_ERROR_AF) + { + // couldn't start the receive because of a timeout error + // nothing else to do because the caller will handle the timeout error + + // free rx buffer + free(rxBuffer); + rxBuffer = NULL; + + // done here + return; + } + } +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/Int_Handlers.c b/DeviceCode/Targets/Native/STM32F4xx/Int_Handlers.c new file mode 100644 index 000000000..a0f567442 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Int_Handlers.c @@ -0,0 +1,160 @@ +/** + ****************************************************************************** + * @file stm32f4xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * + * COPYRIGHT(c) 2016 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* Includes ------------------------------------------------------------------*/ +#include "stm32f4xx_hal.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M4 Processor Interruption and Exception Handlers */ +/******************************************************************************/ + +/******************************************************************************/ +/* Cortex-M4 Processor Exceptions Handlers */ +/******************************************************************************/ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void DebugMon_Handler(void) +{ +} + +/** + * @brief This function handles PendSVC exception. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +// defined as weak so it can be overriden at the solution +__weak void SysTick_Handler(void) +{ + // required to provide accurate timming for HAL + // the following call ensures a milliseconds timming + HAL_IncTick(); + HAL_SYSTICK_IRQHandler(); +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/DeviceCode/Targets/Native/STM32F4xx/Int_Handlers.h b/DeviceCode/Targets/Native/STM32F4xx/Int_Handlers.h new file mode 100644 index 000000000..34c2a6790 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Int_Handlers.h @@ -0,0 +1,71 @@ +/** + ****************************************************************************** + * @file Int_Handlers.h + * @brief This file contains the headers for interrupt handlers. + ****************************************************************************** + * + * COPYRIGHT(c) 2016 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __Int_Handlers_H +#define __Int_Handlers_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "core_cm4.h" + +// /* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS +// standard names. */ +// #define vPortSVCHandler SVC_Handler +// #define xPortPendSVHandler PendSV_Handler +//#define mySysTick_Handler SysTick_Handler + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +// __weak void NMI_Handler(void); +// __weak void HardFault_Handler(void); +// __weak void MemManage_Handler(void); +// __weak void BusFault_Handler(void); +// __weak void UsageFault_Handler(void); +// __weak void SVC_Handler(void); +// __weak void DebugMon_Handler(void); +// __weak __weak __weak void PendSV_Handler(void); +// __weak void SysTick_Handler(void); +#ifdef __cplusplus +} +#endif + +#endif /* __Int_Handlers_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/DeviceCode/Targets/Native/STM32F4xx/NVIC_Priorities.h b/DeviceCode/Targets/Native/STM32F4xx/NVIC_Priorities.h new file mode 100644 index 000000000..b98b682b3 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/NVIC_Priorities.h @@ -0,0 +1,22 @@ +#ifndef __NVIC_Priorities_H +#define __NVIC_Priorities_H + +#ifdef __cplusplus + extern "C" { +#endif + +#define USB_PRIORITY 10 + +#define USART1_PRIORITY 12 +#define USART2_PRIORITY 13 +#define USART3_PRIORITY 14 +#define USART4_PRIORITY 15 +#define USART6_PRIORITY 16 +#define USART7_PRIORITY 17 +#define USART8_PRIORITY 18 + +#ifdef __cplusplus +} +#endif + +#endif /* __NVIC_Priorities_H */ \ No newline at end of file diff --git a/DeviceCode/Targets/Native/STM32F4xx/PWM/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/PWM/dotNetMF.proj new file mode 100644 index 000000000..848bdcd5f --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/PWM/dotNetMF.proj @@ -0,0 +1,33 @@ + + + CMSIS_PWM + + + {F8B057D8-D36B-4103-BDC3-A2D482DFA0C9} + CMSIS PWM driver + HAL + CMSIS_PWM.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\PWM\dotNetMF.proj + CMSIS_PWM.$(LIB_EXT).manifest + + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\PWM + Library + false + 4.0.0.0 + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/PWM/pwm_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/PWM/pwm_functions.cpp new file mode 100644 index 000000000..bc630d6b9 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/PWM/pwm_functions.cpp @@ -0,0 +1,238 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc. +// +// *** PWM Driver *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include + + +#if SYSTEM_APB1_CLOCK_HZ == SYSTEM_CYCLE_CLOCK_HZ + #define PWM1_CLK_HZ (SYSTEM_APB1_CLOCK_HZ) +#else + #define PWM1_CLK_HZ (SYSTEM_APB1_CLOCK_HZ * 2) +#endif +#define PWM1_CLK_MHZ (PWM1_CLK_HZ / ONE_MHZ) + +#if SYSTEM_APB2_CLOCK_HZ == SYSTEM_CYCLE_CLOCK_HZ + #define PWM2_CLK_HZ (SYSTEM_APB2_CLOCK_HZ) +#else + #define PWM2_CLK_HZ (SYSTEM_APB2_CLOCK_HZ * 2) +#endif +#define PWM2_CLK_MHZ (PWM2_CLK_HZ / ONE_MHZ) + +#if PWM2_CLK_MHZ > PWM1_CLK_MHZ + #define PWM_MAX_CLK_MHZ PWM2_CLK_MHZ +#else + #define PWM_MAX_CLK_MHZ PWM1_CLK_MHZ +#endif + + +typedef TIM_TypeDef* ptr_TIM_TypeDef; + +//Timers +static const BYTE g_PWM_Timer[] = PWM_TIMER; +static const BYTE g_PWM_Channel[] = PWM_CHNL; + +// Pins +static const BYTE g_PWM_Pins[] = PWM_PINS; +#define PWM_CHANNELS ARRAYSIZE_CONST_EXPR(g_PWM_Pins) // number of channels + +// IO addresses +static const ptr_TIM_TypeDef g_PWM_Ports[] = + {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10, TIM11, TIM12, TIM13, TIM14}; + +// Alternate Function Number +static const BYTE g_PWM_Alt[] = {0x12,0x12,0x22,0x22,0x22,0,0,0x32,0x32,0x32,0x32,0x92,0x92,0x92}; // AF1/2/3/9 + + +//--// + +void PWM_UnitializeAll() +{ + for (int c = 0; c < PWM_CHANNELS; c++) { + PWM_Stop((PWM_CHANNEL)c, PWM_GetPinForChannel((PWM_CHANNEL)c)); + PWM_Uninitialize((PWM_CHANNEL)c); + } +} + +BOOL PWM_Initialize(PWM_CHANNEL channel) +{ + if (channel >= PWM_CHANNELS) return FALSE; + int timer = g_PWM_Timer[channel]; + int tchnl = g_PWM_Channel[channel]; + ptr_TIM_TypeDef treg = g_PWM_Ports[timer - 1]; + + // relevant RCC register & bit + __IO uint32_t* enReg = &RCC->APB1ENR; + if ((UINT32)treg & 0x10000) enReg = &RCC->APB2ENR; + int enBit = 1 << (((UINT32)treg >> 10) & 0x1F); + + if (!(*enReg & enBit)) { // not yet initialized + *enReg |= enBit; // enable timer clock + treg->CR1 = TIM_CR1_URS | TIM_CR1_ARPE; // double buffered update + treg->EGR = TIM_EGR_UG; // enforce first update + if (timer == 1 || timer == 8) { + treg->BDTR |= TIM_BDTR_MOE; // main output enable (timer 1 & 8 only) + } + } + + *(__IO uint16_t*)&((uint32_t*)&treg->CCR1)[tchnl] = 0; // reset compare register + + // enable PWM channel + UINT32 mode = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1PE; // PWM1 mode, double buffered + if (tchnl & 1) mode <<= 8; // 1 or 3 + __IO uint16_t* reg = &treg->CCMR1; + if (tchnl & 2) reg = &treg->CCMR2; // 2 or 3 + *reg |= mode; + + // Ensure driver gets unitialized during soft reboot + HAL_AddSoftRebootHandler(PWM_UnitializeAll); + + return TRUE; +} + +BOOL PWM_Uninitialize(PWM_CHANNEL channel) +{ + int timer = g_PWM_Timer[channel]; + int tchnl = g_PWM_Channel[channel]; + ptr_TIM_TypeDef treg = g_PWM_Ports[timer - 1]; + + UINT32 mask = 0xFF; // disable PWM channel + if (tchnl & 1) mask = 0xFF00; // 1 or 3 + __IO uint16_t* reg = &treg->CCMR1; + if (tchnl & 2) reg = &treg->CCMR2; // 2 or 3 + *reg &= ~mask; + + if ((treg->CCMR1 | treg->CCMR2) == 0) { // no channel active + __IO uint32_t* enReg = &RCC->APB1ENR; + if ((UINT32)treg & 0x10000) enReg = &RCC->APB2ENR; + int enBit = 1 << (((UINT32)treg >> 10) & 0x1F); + *enReg &= ~enBit; // disable timer clock + } + + return TRUE; +} + +BOOL PWM_ApplyConfiguration(PWM_CHANNEL channel, GPIO_PIN pin, UINT32& period, UINT32& duration, PWM_SCALE_FACTOR& scale, BOOL invert) +{ + int timer = g_PWM_Timer[channel]; + int tchnl = g_PWM_Channel[channel]; + ptr_TIM_TypeDef treg = g_PWM_Ports[timer - 1]; + + UINT32 p = period, d = duration, s = scale; + if (d > p) d = p; + + // set pre, p, & d such that: + // pre * p = PWM_CLK * period / scale + // pre * d = PWM_CLK * duration / scale + + UINT32 clk = PWM1_CLK_HZ; + if ((UINT32)treg & 0x10000) clk = PWM2_CLK_HZ; // APB2 + + UINT32 pre = clk / s; // prescaler + if (pre == 0) { // s > PWM_CLK + UINT32 sm = s / ONE_MHZ; // scale in MHz + clk = PWM1_CLK_MHZ; // clock in MHz + if ((UINT32)treg & 0x10000) clk = PWM2_CLK_MHZ; // APB2 + if (p > 0xFFFFFFFF / PWM_MAX_CLK_MHZ) { // avoid overflow + pre = clk; + p /= sm; + d /= sm; + } else { + pre = 1; + p = p * clk / sm; + d = d * clk / sm; + } + } else { + while (pre > 0x10000) { // prescaler too large + if (p >= 0x80000000) return FALSE; + pre >>= 1; + p <<= 1; + d <<= 1; + } + } + if (timer != 2 && timer != 5) { // 16 bit timer + while (p >= 0x10000) { // period too large + if (pre > 0x8000) return FALSE; + pre <<= 1; + p >>= 1; + d >>= 1; + } + } + treg->PSC = pre - 1; + treg->ARR = p - 1; + *(__IO uint16_t*)&((uint32_t*)&treg->CCR1)[tchnl] = d; + UINT32 invBit = TIM_CCER_CC1P << (4 * tchnl); + if (invert) { + treg->CCER |= invBit; + } else { + treg->CCER &= ~invBit; + } + return TRUE; +} + +BOOL PWM_Start(PWM_CHANNEL channel, GPIO_PIN pin) +{ + int timer = g_PWM_Timer[channel]; + int tchnl = g_PWM_Channel[channel]; + ptr_TIM_TypeDef treg = g_PWM_Ports[timer - 1]; + + CPU_GPIO_DisablePin( pin, RESISTOR_DISABLED, 1, (GPIO_ALT_MODE)g_PWM_Alt[timer - 1] ); + UINT16 enBit = TIM_CCER_CC1E << (4 * tchnl); + treg->CCER |= enBit; // enable output + UINT16 cr1 = treg->CR1; + if ((cr1 & TIM_CR1_CEN) == 0) { // timer stopped + treg->EGR = TIM_EGR_UG; // enforce register update + treg->CR1 = cr1 | TIM_CR1_CEN; // start timer + } + return TRUE; +} + +void PWM_Stop(PWM_CHANNEL channel, GPIO_PIN pin) +{ + int timer = g_PWM_Timer[channel]; + int tchnl = g_PWM_Channel[channel]; + ptr_TIM_TypeDef treg = g_PWM_Ports[timer - 1]; + + UINT16 ccer = treg->CCER; + ccer &= ~(TIM_CCER_CC1E << (4 * tchnl)); + treg->CCER = ccer; // disable output + CPU_GPIO_DisablePin( pin, RESISTOR_DISABLED, 0, GPIO_ALT_PRIMARY ); + if ((ccer & (TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E)) == 0) { // idle + treg->CR1 &= ~TIM_CR1_CEN; // stop timer + } +} + +BOOL PWM_Start(PWM_CHANNEL* channel, GPIO_PIN* pin, UINT32 count) +{ + for (int i = 0; i < count; i++) { + if (!PWM_Start(channel[i], pin[i])) return FALSE; + } + return TRUE; +} + +void PWM_Stop(PWM_CHANNEL* channel, GPIO_PIN* pin, UINT32 count) +{ + for (int i = 0; i < count; i++) { + PWM_Stop(channel[i], pin[i]); + } +} + +UINT32 PWM_PWMChannels() +{ + return PWM_CHANNELS; +} + +GPIO_PIN PWM_GetPinForChannel( PWM_CHANNEL channel ) +{ + if ((UINT32)channel >= PWM_CHANNELS) return GPIO_PIN_NONE; + return g_PWM_Pins[channel]; +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/Power/Power_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/Power/Power_functions.cpp new file mode 100644 index 000000000..d296f0a67 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Power/Power_functions.cpp @@ -0,0 +1,145 @@ +////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Open Technologies. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions Lda +// +// *** CPU Power States *** +// +////////////////////////////////////////////////////////////////////////////////////////// + +#include + +//--// + +extern "C" void SystemClock_Config(void); + +void HAL_AssertEx() +{ + __BKPT(0); + while(true) { ; } +} + +/* + Cortex-M core features 3 low power modes: + SLEEP mode: Cortex-M core stopped, peripherals kept running. + STOP mode: all clocks are stopped, regulator running, regulator in low power mode + STANDBY mode: 1.2V domain powered off + + The NETMF SLEEP_LEVEL enum equivalence is: + SLEEP_LEVEL__SELECTIVE_OFF => Cortex-M SLEEP mode + SLEEP_LEVEL__SLEEP => Cortex-M SLEEP mode + SLEEP_LEVEL__DEEP_SLEEP => Cortex-M STOP mode + SLEEP_LEVEL__OFF => Cortex-M STANDBY mode + +*/ +void HAL_CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents) +{ + NATIVE_PROFILE_HAL_PROCESSOR_POWER(); + + switch(level) + { + ///////////////////////////// + case SLEEP_LEVEL__DEEP_SLEEP: + // Cortex-M STOP mode + + // power down flash before entering STOP mode + HAL_PWREx_EnableFlashPowerDown(); + + #ifdef FAST_WAKEUP_FROM_STOP + // enter STOP mode with main power regulator enabled + HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPENTRY_WFI); + #else + // enter STOP mode with low power regulator enabled + HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); + #endif + + // need to reconfigure system clock after wake-up from STOP mode + SystemClock_Config(); + + // power up flash after resuming from Stop mode + HAL_PWREx_DisableFlashPowerDown(); + + // done here + break; + + ////////////////////// + case SLEEP_LEVEL__OFF: + // Cortex-M STANDBY mode + + // First disable all used wakeup sources + // Disable wake-up pin + HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN1); + + // Clear PWR wake-up flag + __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU); + + // Enable wake-up pin (WKUP) + HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1); + + // actually enter STANDBY mode + HAL_PWR_EnterSTANDBYMode(); + + // never reachs here, but we need to keep the compiler happy... + break; + + /////////////////////////////// + default: + // all other modes revert to Cortex-M SLEEP mode + + // enter SLEEP mode + HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); + + // done here + break; + } +} + +//--// + +BOOL CPU_Initialize() +{ + // nothing to do here... + // CMSIS HAL_Init() should be called from main and it takes care of everything required to init the CPU and modules + return TRUE; +} + +void CPU_Reset() +{ + NVIC_SystemReset(); +} + +void CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents) +{ + HAL_CPU_Sleep(level, wakeEvents); +} + +void CPU_ChangePowerLevel(POWER_LEVEL level) +{ + switch(level) + { + case POWER_LEVEL__MID_POWER: + break; + + case POWER_LEVEL__LOW_POWER: + break; + + case POWER_LEVEL__HIGH_POWER: + default: + break; + } +} + +BOOL CPU_IsSoftRebootSupported () +{ + return FALSE; +} + +void CPU_Halt() +{ + NATIVE_PROFILE_HAL_PROCESSOR_POWER(); + while(1); +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/Power/Power_functions_loader.cpp b/DeviceCode/Targets/Native/STM32F4xx/Power/Power_functions_loader.cpp new file mode 100644 index 000000000..fca47ee59 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Power/Power_functions_loader.cpp @@ -0,0 +1,76 @@ +////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Open Technologies. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions Lda +// +// *** CPU Power States for bootloader (with only the minimal possible implementation *** +// +////////////////////////////////////////////////////////////////////////////////////////// + +#include + +//--// + +void HAL_AssertEx() +{ + __BKPT(0); + while(true) { ; } +} + +void HAL_CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents) +{ + NATIVE_PROFILE_HAL_PROCESSOR_POWER(); + + // enter SLEEP mode + HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI); +} + +//--// + +BOOL CPU_Initialize() +{ + // nothing to do here... + // CMSIS HAL_Init() should be called from main and it takes care of everything required to init the CPU and modules + return TRUE; +} + +void CPU_Reset() +{ + NVIC_SystemReset(); +} + +void CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents) +{ + HAL_CPU_Sleep(level, wakeEvents); +} + +void CPU_ChangePowerLevel(POWER_LEVEL level) +{ + switch(level) + { + case POWER_LEVEL__MID_POWER: + break; + + case POWER_LEVEL__LOW_POWER: + break; + + case POWER_LEVEL__HIGH_POWER: + default: + break; + } +} + +BOOL CPU_IsSoftRebootSupported () +{ + return FALSE; +} + +void CPU_Halt() +{ + NATIVE_PROFILE_HAL_PROCESSOR_POWER(); + while(1); +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/Power/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/Power/dotNetMF.proj new file mode 100644 index 000000000..0c49a4717 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Power/dotNetMF.proj @@ -0,0 +1,37 @@ + + + + CMSIS_power + {1FC7E0E0-C703-4571-8BF8-1398DD8B8821} + + + CMSIS CPU power library + HAL + CMSIS_power.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\Power\dotNetMF.proj + CMSIS_power.$(LIB_EXT).manifest + + + + False + + + False + False + True + DeviceCode\Targets\Native\STM32F4xx\Power + Library + false + 4.0.0.0 + + + + + + + + + + + + \ No newline at end of file diff --git a/DeviceCode/Targets/Native/STM32F4xx/Power/dotNetMF_loader.proj b/DeviceCode/Targets/Native/STM32F4xx/Power/dotNetMF_loader.proj new file mode 100644 index 000000000..5debfad49 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Power/dotNetMF_loader.proj @@ -0,0 +1,37 @@ + + + + CMSIS_power_loader + {F4BDE754-B128-4335-AE34-3FE2B253E026} + + + CMSIS CPU power library for bootloader + HAL + CMSIS_power_loader.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\Power\dotNetMF_loader.proj + CMSIS_power_loader.$(LIB_EXT).manifest + + + + False + + + False + False + True + DeviceCode\Targets\Native\STM32F4xx\Power + Library + false + 4.0.0.0 + + + + + + + + + + + + \ No newline at end of file diff --git a/DeviceCode/Targets/Native/STM32F4xx/SPI/SPI_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/SPI/SPI_functions.cpp new file mode 100644 index 000000000..c9749813c --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/SPI/SPI_functions.cpp @@ -0,0 +1,950 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions Lda. Based in original code from Oberon microsystems, Inc. +// +// *** SPI Driver *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include + +/* +struct SPI_CONFIGURATION +{ + GPIO_PIN DeviceCS; + BOOL CS_Active; // False = LOW active, TRUE = HIGH active + BOOL MSK_IDLE; // False = LOW during idle, TRUE = HIGH during idle + BOOL MSK_SampleEdge; // False = sample falling edge, TRUE = samples on rising + BOOL MD_16bits; + UINT32 Clock_RateKHz; + UINT32 CS_Setup_uSecs; + UINT32 CS_Hold_uSecs; + UINT32 SPI_mod; + GPIO_FLAG BusyPin; +}; +*/ + +typedef SPI_TypeDef* ptr_SPI_TypeDef; + +// IO addresses +// SPI channels availability according to STM32F4 variant + +// #if defined (STM32F401xC) || defined (STM32F401xE) || defined (STM32F446xx) +// static const ptr_SPI_TypeDef g_STM32_Spi_Port[] = {SPI1, SPI2, SPI3, SPI4}; + +// #elif defined (STM32F411xE) +// static const ptr_SPI_TypeDef g_STM32_Spi_Port[] = {SPI1, SPI2, SPI3, SPI4, SPI5}; + +// #elif defined (STM32F427xx) || defined (STM32F429xx) || defined (STM32F437xx) || \ +// defined (STM32F439xx) || defined (STM32F469xx) || defined (STM32F479xx) +// static const ptr_SPI_TypeDef g_STM32_Spi_Port[] = {SPI1, SPI2, SPI3, SPI4, SPI5, SPI6}; + +// #elif defined (STM32F405xx) || defined (STM32F407xx) || defined (STM32F415xx) || \ +// defined (STM32F417xx) +// static const ptr_SPI_TypeDef g_STM32_Spi_Port[] = {SPI1, SPI2, SPI3}; + +// #elif defined (STM32F410Cx) || defined (STM32F410Rx) +// static const ptr_SPI_TypeDef g_STM32_Spi_Port[] = {SPI1, SPI2, SPI5}; + +// #elif defined (STM32F410Tx) +// static const ptr_SPI_TypeDef g_STM32_Spi_Port[] = {SPI1}; + +// #endif + +#if !defined(SPI_PORTS) +#error "No SPI ports defined! Please go to platform_selector.h (in solution folder) and uncomment the define that matches the SPI ports available in the device datasheet" +#endif + +static const ptr_SPI_TypeDef g_STM32_Spi_Port[] = SPI_PORTS; + + +// Pins +// static const BYTE g_Spi_Sclk_Pins[] = SPI_SCLK_PINS; +// static const BYTE g_Spi_Miso_Pins[] = SPI_MISO_PINS; +// static const BYTE g_Spi_Mosi_Pins[] = SPI_MOSI_PINS; +static BYTE g_Spi_Sclk_Pins[ARRAYSIZE(g_STM32_Spi_Port)]; +static BYTE g_Spi_Miso_Pins[ARRAYSIZE(g_STM32_Spi_Port)]; +static BYTE g_Spi_Mosi_Pins[ARRAYSIZE(g_STM32_Spi_Port)]; + +#define SPI_MODS ARRAYSIZE_CONST_EXPR(g_Spi_Sclk_Pins) // number of modules + +void ComputeSPIPins() +{ + for (int i = 0; i < ARRAYSIZE(g_STM32_Spi_Port); i++) + { + #if defined (SPI1) + if(g_STM32_Spi_Port[i] == SPI1) + { + g_Spi_Sclk_Pins[i] = 5; // PA5 + g_Spi_Miso_Pins[i] = 6; // PA6 + g_Spi_Mosi_Pins[i] = 7; // PA7 + } + #endif + #if defined (SPI2) + else if(g_STM32_Spi_Port[i] == SPI2) + { + g_Spi_Sclk_Pins[i] = 29; // PB13 + g_Spi_Miso_Pins[i] = 30; // PB14 + g_Spi_Mosi_Pins[i] = 31; // PB15 + } + #endif + #if defined (SPI3) + else if(g_STM32_Spi_Port[i] == SPI3) + { + g_Spi_Sclk_Pins[i] = 42; // PC10 + g_Spi_Miso_Pins[i] = 43; // PC11 + g_Spi_Mosi_Pins[i] = 44; // PC12 + } + #endif + #if defined (SPI4) + else if(g_STM32_Spi_Port[i] == SPI4) + { + g_Spi_Sclk_Pins[i] = 76; // PE12 + g_Spi_Miso_Pins[i] = 77; // PE13 + g_Spi_Mosi_Pins[i] = 78; // PE14 + } + #endif + #if defined (SPI5) + else if(g_STM32_Spi_Port[i] == SPI5) + { + g_Spi_Sclk_Pins[i] = 87; // PF7 + g_Spi_Miso_Pins[i] = 88; // PF8 + g_Spi_Mosi_Pins[i] = 89; // PF9 + } + #endif + #if defined (SPI6) + else if(g_STM32_Spi_Port[i] == SPI6) + { + g_Spi_Sclk_Pins[i] = 109; // PG13 + g_Spi_Miso_Pins[i] = 108; // PG12 + g_Spi_Mosi_Pins[i] = 110; // PG14 + } + #endif + } +} + +void Configure_GPIOs() +{ + for (int i = 0; i < ARRAYSIZE(g_STM32_Spi_Port); i++) + { + GPIO_InitTypeDef GPIO_InitStruct; + + #if defined (SPI1) + if(g_STM32_Spi_Port[i] == SPI1) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + /* Enable SPI clock */ + __HAL_RCC_SPI1_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* SPI SCK GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FAST; + #if defined (GPIO_AF5_SPI1) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + #elif defined (GPIO_AF6_SPI1) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI1; + #endif + + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_6; + #if defined (GPIO_AF5_SPI1) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + #elif defined (GPIO_AF6_SPI1) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI1; + #endif + + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_7; + #if defined (GPIO_AF5_SPI1) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + #elif defined (GPIO_AF6_SPI1) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI1; + #endif + + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + } + #endif + #if defined (SPI2) + else if(g_STM32_Spi_Port[i] == SPI2) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + __HAL_RCC_GPIOB_CLK_ENABLE(); + /* Enable SPI clock */ + __HAL_RCC_SPI2_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* SPI SCK GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_13; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FAST; + #if defined (GPIO_AF5_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + #elif defined (GPIO_AF6_SPI2) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI2; + #elif defined (GPIO_AF7_SPI2) + GPIO_InitStruct.Alternate = GPIO_AF7_SPI2; + #endif + + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_14; + #if defined (GPIO_AF5_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + #elif defined (GPIO_AF6_SPI2) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI2; + #elif defined (GPIO_AF7_SPI2) + GPIO_InitStruct.Alternate = GPIO_AF7_SPI2; + #endif + + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_15; + #if defined (GPIO_AF5_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; + #elif defined (GPIO_AF6_SPI2) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI2; + #elif defined (GPIO_AF7_SPI2) + GPIO_InitStruct.Alternate = GPIO_AF7_SPI2; + #endif + + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + } + #endif + #if defined (SPI3) + else if(g_STM32_Spi_Port[i] == SPI3) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + __HAL_RCC_GPIOC_CLK_ENABLE(); + /* Enable SPI clock */ + __HAL_RCC_SPI3_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* SPI SCK GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FAST; + #if defined (GPIO_AF5_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI3; + #elif defined (GPIO_AF6_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; + #elif defined (GPIO_AF7_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF7_SPI3; + #endif + + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_11; + #if defined (GPIO_AF5_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI3; + #elif defined (GPIO_AF6_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; + #elif defined (GPIO_AF7_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF7_SPI3; + #endif + + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_12; + #if defined (GPIO_AF5_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI3; + #elif defined (GPIO_AF6_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; + #elif defined (GPIO_AF7_SPI3) + GPIO_InitStruct.Alternate = GPIO_AF7_SPI3; + #endif + + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + } + #endif + #if defined (SPI4) + else if(g_STM32_Spi_Port[i] == SPI4) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + /* Enable SPI clock */ + __HAL_RCC_SPI4_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* SPI SCK GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FAST; + #if defined (GPIO_AF5_SPI4) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI4; + #elif defined (GPIO_AF6_SPI4) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI4; + #endif + + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_13; + #if defined (GPIO_AF5_SPI4) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI4; + #elif defined (GPIO_AF6_SPI4) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI4; + #endif + + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_14; + #if defined (GPIO_AF5_SPI4) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI4; + #elif defined (GPIO_AF6_SPI4) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI4; + #endif + + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + } + #endif + #if defined (SPI5) + else if(g_STM32_Spi_Port[i] == SPI5) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + __HAL_RCC_GPIOF_CLK_ENABLE(); + /* Enable SPI clock */ + __HAL_RCC_SPI5_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* SPI SCK GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FAST; + #if defined (GPIO_AF5_SPI5) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI5; + #elif defined (GPIO_AF6_SPI5) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI5; + #endif + + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_8; + #if defined (GPIO_AF5_SPI5) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI5; + #elif defined (GPIO_AF6_SPI5) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI5; + #endif + + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_9; + #if defined (GPIO_AF5_SPI5) + GPIO_InitStruct.Alternate = GPIO_AF5_SPI5; + #elif defined (GPIO_AF6_SPI5) + GPIO_InitStruct.Alternate = GPIO_AF6_SPI5; + #endif + + HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); + } + #endif + #if defined (SPI6) + else if(g_STM32_Spi_Port[i] == SPI6) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + __HAL_RCC_GPIOG_CLK_ENABLE(); + /* Enable SPI clock */ + __HAL_RCC_SPI6_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* SPI SCK GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_13; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FAST; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI6; + + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_12; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI6; + + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = GPIO_PIN_14; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI6; + + HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); + } + #endif + } +} + +void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi) +{ + if(g_Spi_Sclk_Pins[0] == 0) + { + // need to fill SPI pin arrays + ComputeSPIPins(); + // configure and enable GPIO clocks + Configure_GPIOs(); + } +} + +void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi) +{ + for (int i = 0; i < ARRAYSIZE(g_STM32_Spi_Port); i++) + { + #if defined (SPI1) + if(g_STM32_Spi_Port[i] == SPI1) + { + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_SPI1_FORCE_RESET(); + __HAL_RCC_SPI1_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Configure SPI SCK as alternate function */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5); + /* Configure SPI MISO as alternate function */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_6); + /* Configure SPI MOSI as alternate function */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_7); + + /*##-3- Disable the NVIC for SPI ###########################################*/ + HAL_NVIC_DisableIRQ(SPI1_IRQn); + } + #endif + #if defined (SPI2) + else if(g_STM32_Spi_Port[i] == SPI2) + { + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_SPI2_FORCE_RESET(); + __HAL_RCC_SPI2_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Configure SPI SCK as alternate function */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13); + /* Configure SPI MISO as alternate function */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14); + /* Configure SPI MOSI as alternate function */ + HAL_GPIO_DeInit(GPIOB, GPIO_PIN_15); + + /*##-3- Disable the NVIC for SPI ###########################################*/ + HAL_NVIC_DisableIRQ(SPI2_IRQn); + } + #endif + #if defined (SPI3) + else if(g_STM32_Spi_Port[i] == SPI3) + { + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_SPI3_FORCE_RESET(); + __HAL_RCC_SPI3_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Configure SPI SCK as alternate function */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10); + /* Configure SPI MISO as alternate function */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_11); + /* Configure SPI MOSI as alternate function */ + HAL_GPIO_DeInit(GPIOC, GPIO_PIN_12); + + /*##-3- Disable the NVIC for SPI ###########################################*/ + HAL_NVIC_DisableIRQ(SPI3_IRQn); + } + #endif + #if defined (SPI4) + else if(g_STM32_Spi_Port[i] == SPI4) + { + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_SPI4_FORCE_RESET(); + __HAL_RCC_SPI4_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Configure SPI SCK as alternate function */ + HAL_GPIO_DeInit(GPIOE, GPIO_PIN_12); + /* Configure SPI MISO as alternate function */ + HAL_GPIO_DeInit(GPIOE, GPIO_PIN_13); + /* Configure SPI MOSI as alternate function */ + HAL_GPIO_DeInit(GPIOE, GPIO_PIN_14); + + /*##-3- Disable the NVIC for SPI ###########################################*/ + HAL_NVIC_DisableIRQ(SPI4_IRQn); + } + #endif + #if defined (SPI5) + else if(g_STM32_Spi_Port[i] == SPI5) + { + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_SPI5_FORCE_RESET(); + __HAL_RCC_SPI5_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Configure SPI SCK as alternate function */ + HAL_GPIO_DeInit(GPIOF, GPIO_PIN_7); + /* Configure SPI MISO as alternate function */ + HAL_GPIO_DeInit(GPIOF, GPIO_PIN_8); + /* Configure SPI MOSI as alternate function */ + HAL_GPIO_DeInit(GPIOF, GPIO_PIN_9); + + /*##-3- Disable the NVIC for SPI ###########################################*/ + HAL_NVIC_DisableIRQ(SPI5_IRQn); + } + #endif + #if defined (SPI6) + else if(g_STM32_Spi_Port[i] == SPI6) + { + /*##-1- Reset peripherals ##################################################*/ + __HAL_RCC_SPI6_FORCE_RESET(); + __HAL_RCC_SPI6_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Configure SPI SCK as alternate function */ + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_13); + /* Configure SPI MISO as alternate function */ + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_12); + /* Configure SPI MOSI as alternate function */ + HAL_GPIO_DeInit(GPIOG, GPIO_PIN_14); + + /*##-3- Disable the NVIC for SPI ###########################################*/ + HAL_NVIC_DisableIRQ(SPI6_IRQn); + } + #endif + } +} + +BOOL CPU_SPI_Initialize() +{ + return TRUE; +} + +void CPU_SPI_Uninitialize() +{ +} + +BOOL CPU_SPI_nWrite16_nRead16( const SPI_CONFIGURATION& Configuration, UINT16* Write16, INT32 WriteCount, UINT16* Read16, INT32 ReadCount, INT32 ReadStartOffset ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_SPI(); + if(!CPU_SPI_Xaction_Start( Configuration )) + { + return FALSE; + } + + SPI_XACTION_16 Transaction; + Transaction.Read16 = Read16; + Transaction.ReadCount = ReadCount; + Transaction.ReadStartOffset = ReadStartOffset; + Transaction.Write16 = Write16; + Transaction.WriteCount = WriteCount; + Transaction.SPI_mod = Configuration.SPI_mod; + if(!CPU_SPI_Xaction_nWrite16_nRead16( Transaction )) + { + return FALSE; + } + + return CPU_SPI_Xaction_Stop( Configuration ); +} + +BOOL CPU_SPI_nWrite8_nRead8( const SPI_CONFIGURATION& Configuration, UINT8* Write8, INT32 WriteCount, UINT8* Read8, INT32 ReadCount, INT32 ReadStartOffset ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_SPI(); + if(!CPU_SPI_Xaction_Start( Configuration )) + { + return FALSE; + } + + SPI_XACTION_8 Transaction; + Transaction.Read8 = Read8; + Transaction.ReadCount = ReadCount; + Transaction.ReadStartOffset = ReadStartOffset; + Transaction.Write8 = Write8; + Transaction.WriteCount = WriteCount; + Transaction.SPI_mod = Configuration.SPI_mod; + if(!CPU_SPI_Xaction_nWrite8_nRead8( Transaction )) + { + return FALSE; + } + + return CPU_SPI_Xaction_Stop( Configuration ); +} + +BOOL CPU_SPI_Xaction_Start( const SPI_CONFIGURATION& Configuration ) +{ + // SPI handler declaration + SPI_HandleTypeDef SpiHandle; + + NATIVE_PROFILE_HAL_PROCESSOR_SPI(); + if (Configuration.SPI_mod >= SPI_MODS) + return FALSE; + + // Configure the SPI peripheral + // Set the SPI parameters + switch (Configuration.SPI_mod) + { +#if defined (SPI1) + case 0: + SpiHandle.Instance = SPI1; + break; // set instance +#endif +#if defined (SPI2) + case 1: + SpiHandle.Instance = SPI2; + break; // set instance +#endif +#if defined (SPI3) + case 2: + SpiHandle.Instance = SPI3; + break; // set instance +#endif +#if defined (SPI4) + case 3: + SpiHandle.Instance = SPI4; + break; // set instance +#endif +#if defined (SPI5) + case 4: + SpiHandle.Instance = SPI5; + break; // set instance +#endif +#if defined (SPI6) + case 5: + SpiHandle.Instance = SPI6; + break; // set instance +#endif + } + + SpiHandle.Init.Mode = SPI_MODE_MASTER; + SpiHandle.Init.Direction = SPI_DIRECTION_2LINES; + SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + SpiHandle.Init.CRCPolynomial = 7; + SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB; + SpiHandle.Init.TIMode = SPI_TIMODE_DISABLE; + + //ptr_SPI_TypeDef spi = g_STM32_Spi_Port[Configuration.SPI_mod]; + + // set mode bits + //UINT32 cr1 = SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR | SPI_CR1_SPE; + SpiHandle.Init.NSS = SPI_NSS_SOFT; + + SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT; + if (Configuration.MD_16bits) + { + //cr1 |= SPI_CR1_DFF; + SpiHandle.Init.DataSize = SPI_DATASIZE_16BIT; + } + + if (Configuration.MSK_IDLE) + { + //cr1 |= SPI_CR1_CPOL | SPI_CR1_CPHA; + SpiHandle.Init.CLKPhase = SPI_PHASE_2EDGE; + SpiHandle.Init.CLKPolarity = SPI_POLARITY_HIGH; + } + + if (!Configuration.MSK_SampleEdge) + { + //cr1 ^= SPI_CR1_CPHA; // toggle phase + SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE; + } + + // set clock prescaler + SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + UINT32 clock = SYSTEM_APB2_CLOCK_HZ / 2000; // SPI1 on APB2 + if (Configuration.SPI_mod > 0 && Configuration.SPI_mod < 3) + { + clock = SYSTEM_APB1_CLOCK_HZ / 2000; // SPI2/3 on APB1 + } + + if (clock > Configuration.Clock_RateKHz << 3) + { + clock >>= 4; + // cr1 |= SPI_CR1_BR_2; + SpiHandle.Init.BaudRatePrescaler |= SPI_BAUDRATEPRESCALER_32; + } + + if (clock > Configuration.Clock_RateKHz << 1) + { + clock >>= 2; + // cr1 |= SPI_CR1_BR_1; + SpiHandle.Init.BaudRatePrescaler |= SPI_BAUDRATEPRESCALER_8; + } + + if (clock > Configuration.Clock_RateKHz) + { + // cr1 |= SPI_CR1_BR_0; + SpiHandle.Init.BaudRatePrescaler |= SPI_BAUDRATEPRESCALER_4; + } + //spi->CR1 = cr1; + + if(HAL_SPI_Init(&SpiHandle) != HAL_OK) + { + /* Initialization Error */ + return FALSE; + } + + // // I/O setup + // GPIO_PIN msk, miso, mosi; + // CPU_SPI_GetPins(Configuration.SPI_mod, msk, miso, mosi); + // UINT32 alternate = 0x252; // AF5, speed = 2 (50MHz) + // if (Configuration.SPI_mod == 2 && mosi != 54) + // { + // alternate = 0x262; // SPI3 on AF6 + // } + + // CPU_GPIO_DisablePin( msk, RESISTOR_DISABLED, 1, (GPIO_ALT_MODE)alternate); + // CPU_GPIO_DisablePin( miso, RESISTOR_DISABLED, 0, (GPIO_ALT_MODE)alternate); + // CPU_GPIO_DisablePin( mosi, RESISTOR_DISABLED, 1, (GPIO_ALT_MODE)alternate); + + // // CS setup + // CPU_GPIO_EnableOutputPin( Configuration.DeviceCS, Configuration.CS_Active ); + // if(Configuration.CS_Setup_uSecs) + // { + // HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Setup_uSecs ); + // } + + return TRUE; +} + +BOOL CPU_SPI_Xaction_Stop( const SPI_CONFIGURATION& Configuration ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_SPI(); + + ptr_SPI_TypeDef spi = g_STM32_Spi_Port[Configuration.SPI_mod]; + while (spi->SR & SPI_SR_BSY); // wait for completion + spi->CR1 = 0; // disable SPI + + if(Configuration.CS_Hold_uSecs) + { + HAL_Time_Sleep_MicroSeconds_InterruptEnabled( Configuration.CS_Hold_uSecs ); + } + + CPU_GPIO_SetPinState( Configuration.DeviceCS, !Configuration.CS_Active ); + GPIO_RESISTOR res = RESISTOR_PULLDOWN; + if (Configuration.MSK_IDLE) + { + res = RESISTOR_PULLUP; + } + + GPIO_PIN msk, miso, mosi; + CPU_SPI_GetPins(Configuration.SPI_mod, msk, miso, mosi); + CPU_GPIO_EnableInputPin( msk, FALSE, NULL, GPIO_INT_NONE, res ); + CPU_GPIO_EnableInputPin( miso, FALSE, NULL, GPIO_INT_NONE, RESISTOR_PULLDOWN ); + CPU_GPIO_EnableInputPin( mosi, FALSE, NULL, GPIO_INT_NONE, RESISTOR_PULLDOWN ); + + switch (Configuration.SPI_mod) + { +#if defined (SPI6) + case 0: + RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN; + break; // disable SPI1 clock +#endif +#if defined (SPI2) + case 1: + RCC->APB1ENR &= ~RCC_APB1ENR_SPI2EN; + break; // disable SPI2 clock +#endif +#if defined (SPI3) + case 2: + RCC->APB1ENR &= ~RCC_APB1ENR_SPI3EN; + break; // disable SPI3 clock +#endif +#if defined (SPI4) + case 3: + RCC->APB2ENR &= ~RCC_APB2ENR_SPI4EN; + break; // disable SPI4 clock +#endif +#if defined (SPI5) + case 4: + RCC->APB2ENR &= ~RCC_APB2ENR_SPI5EN; + break; // disable SPI5 clock +#endif +#if defined (SPI6) + case 5: + RCC->APB2ENR &= ~RCC_APB2ENR_SPI6EN; + break; // disable SPI6 clock +#endif + } + + return TRUE; +} + +BOOL CPU_SPI_Xaction_nWrite16_nRead16( SPI_XACTION_16& Transaction ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_SPI(); + + ptr_SPI_TypeDef spi = g_STM32_Spi_Port[Transaction.SPI_mod]; + + UINT16* outBuf = Transaction.Write16; + UINT16* inBuf = Transaction.Read16; + INT32 outLen = Transaction.WriteCount; + INT32 num, ii, i = 0; + + if (Transaction.ReadCount) + { // write & read + num = Transaction.ReadCount + Transaction.ReadStartOffset; + ii = -Transaction.ReadStartOffset; + } + else + { // write only + num = outLen; + ii = 0x80000000; // disable write to inBuf + } + + UINT16 out = outBuf[0]; + UINT16 in; + spi->DR = out; // write first word + while (++i < num) + { + if (i < outLen) + { + out = outBuf[i]; // get new output data + } + + while (!(spi->SR & SPI_SR_RXNE)) + { /* wait for Rx buffer full */ } + + in = spi->DR; // read input + spi->DR = out; // start output + if (ii >= 0) + inBuf[ii] = in; // save input data + ii++; + } + while (!(spi->SR & SPI_SR_RXNE)) + { /* wait for Rx buffer full */ } + + in = spi->DR; // read last input + if (ii >= 0) + inBuf[ii] = in; // save last input + + return TRUE; +} + +BOOL CPU_SPI_Xaction_nWrite8_nRead8( SPI_XACTION_8& Transaction ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_SPI(); + + ptr_SPI_TypeDef spi = g_STM32_Spi_Port[Transaction.SPI_mod]; + + UINT8* outBuf = Transaction.Write8; + UINT8* inBuf = Transaction.Read8; + INT32 outLen = Transaction.WriteCount; + INT32 num, ii, i = 0; + + if (Transaction.ReadCount) + { // write & read + num = Transaction.ReadCount + Transaction.ReadStartOffset; + ii = -Transaction.ReadStartOffset; + } + else + { // write only + num = outLen; + ii = 0x80000000; // disable write to inBuf + } + + UINT8 out = outBuf[0]; + UINT16 in; + spi->DR = out; // write first word + while (++i < num) + { + if (i < outLen) + { + out = outBuf[i]; // get new output data + } + + while (!(spi->SR & SPI_SR_RXNE)) + { /* wait for Rx buffer full */ } + + in = spi->DR; // read input + spi->DR = out; // start output + if (ii >= 0) + { + inBuf[ii] = (UINT8)in; // save input data + } + ii++; + } + while (!(spi->SR & SPI_SR_RXNE)) + { /* wait for Rx buffer full */ } + + in = spi->DR; // read last input + if (ii >= 0) + { + inBuf[ii] = (UINT8)in; // save last input + } + + return TRUE; +} + +UINT32 CPU_SPI_PortsCount() +{ + NATIVE_PROFILE_HAL_PROCESSOR_SPI(); + return SPI_MODS; +} + +void CPU_SPI_GetPins( UINT32 spi_mod, GPIO_PIN& msk, GPIO_PIN& miso, GPIO_PIN& mosi ) +{ + NATIVE_PROFILE_HAL_PROCESSOR_SPI(); + msk = miso = mosi = GPIO_PIN_NONE; + if (spi_mod >= SPI_MODS) + { + return; + } + + msk = g_Spi_Sclk_Pins[spi_mod]; + miso = g_Spi_Miso_Pins[spi_mod]; + mosi = g_Spi_Mosi_Pins[spi_mod]; +} + +UINT32 CPU_SPI_MinClockFrequency( UINT32 spi_mod ) +{ + // Theoretically this could read the Clock and PLL configurations + // to determine an actual realistic minimum, however there doesn't + // seem to be a lot of value in that since the CPU_SPI_Xaction_Start + // has to determine the applicability of the selected speed at the + // time a transaction is started anyway. + return 1; +} + +UINT32 CPU_SPI_MaxClockFrequency( UINT32 spi_mod ) +{ + // Theoretically this could read the Clock and PLL configurations + // to determine an actual realistic maximum, however there doesn't + // seem to be a lot of value in that since the CPU_SPI_Xaction_Start + // has to determine the applicability of the selected speed at the + // time a transaction is started anyway. + // Max supported (e.g. not overclocked) AHB speed / 2 + return 48000000; +} + +UINT32 CPU_SPI_ChipSelectLineCount( UINT32 spi_mod ) +{ + // This could maintain a map of the actual pins + // that are available for a particular port. + // (Not all pins can be mapped to all ports.) + // The value of doing that, however, is marginal + // since the count of possible chip selects doesn't + // really help in determining which chip select to + // use so just report the total count of all GPIO + // pins as possible so that the selected Chip select + // line coresponds to a GPIO pin number directly + // without needing any additional translation/mapping. + return TOTAL_GPIO_PINS; +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/SPI/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/SPI/dotNetMF.proj new file mode 100644 index 000000000..df445b8f5 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/SPI/dotNetMF.proj @@ -0,0 +1,36 @@ + + + CMSIS_SPI + + + {A6C6B6D5-2B03-497F-97DA-108BFBA2E8AC} + CMSIS SPI driver + HAL + CMSIS_SPI.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\SPI\dotNetMF.proj + CMSIS_SPI.$(LIB_EXT).manifest + + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\SPI + Library + false + 4.0.0.0 + + + true + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/STM32F4xx.settings b/DeviceCode/Targets/Native/STM32F4xx/STM32F4xx.settings new file mode 100644 index 000000000..74f1c5982 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/STM32F4xx.settings @@ -0,0 +1,50 @@ + + + + STM32F4xx + Cortex-M4 + THUMB2FP + {AA5A88E3-BA72-4B26-9603-72516BBABAE3} + + + + + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\STM32F4xx.settings + ARM + Cortex + THUMB2FP + Native + + + + + + + + + Cortex-M4.fp + {40DBF35F-0EBE-46A7-BC9E-AC26FC7F739A} + + + Cortex-M4.fp + {5C2FD367-F42C-4AF9-96F6-AAD40F45EFCD} + + + cortex-m4 + {64411CEA-8E47-452D-84C5-B980E16A953B} + + + + + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/SystemClock_Config.c b/DeviceCode/Targets/Native/STM32F4xx/SystemClock_Config.c new file mode 100644 index 000000000..86988a538 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/SystemClock_Config.c @@ -0,0 +1,83 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// This file is part of the Microsoft .NET Micro Framework Porting Kit Code Samples and is unsupported. +// Copyright (c) Microsoft Open Technologies, Inc. All rights reserved. +// +// Licensed under the Apache License, Version 2.0 (the "License"); you may not use these files except in compliance with the License. +// You may obtain a copy of the License at: +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing +// permissions and limitations under the License. +// +#include "stm32f4xx_hal.h" + +void SystemClock_Config(void) __attribute__((weak)); + +/** + * @brief System Clock Configuration + * The system Clock is configured as follow : + * System Clock source = PLL (HSE) + * SYSCLK(Hz) = 168000000 + * HCLK(Hz) = 168000000 + * AHB Prescaler = 1 + * APB1 Prescaler = 4 + * APB2 Prescaler = 2 + * HSE Frequency(Hz) = 8000000 + * PLL_M = 8 + * PLL_N = 336 + * PLL_P = 2 + * PLL_Q = 7 + * VDD(V) = 3.3 + * Main regulator output voltage = Scale1 mode + * Flash Latency(WS) = 5 + * @param None + * @retval None + */ +// defined as weak to allow it to be overriden by equivalent function at Solution level +void SystemClock_Config(void) +{ + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + HAL_StatusTypeDef ret = HAL_OK; + + /* Enable Power Control clock */ + __HAL_RCC_PWR_CLK_ENABLE(); + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 8; + RCC_OscInitStruct.PLL.PLLN = 336; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + RCC_OscInitStruct.PLL.PLLQ = 7; + + ret = HAL_RCC_OscConfig(&RCC_OscInitStruct); + if(ret != HAL_OK) + { + // RCC Osc config failed + while(1) { ; } + } + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + + ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); + if(ret != HAL_OK) + { + while(1) { ; } + } +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/Time/Time_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/Time/Time_functions.cpp new file mode 100644 index 000000000..a5c3bc6e6 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Time/Time_functions.cpp @@ -0,0 +1,309 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions Lda. +// +// *** System Timer Driver *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include + +static UINT64 g_nextEvent; // tick time of next event to be scheduled +TIM_HandleTypeDef masterTimerHandle; +TIM_HandleTypeDef slaveTimerHandle; + +//--// + +/* +NETMF time base requires a resolution of 100ns (1MHz). +That requires a timer with 48 bits resolution, which doesn't exist in the supported Cortex M platforms. +The solution is to synchronize 2 timers: + - MASTER with 32 bits resolution (lower bits) + - SLAVE with 16 bits resolution (upper bits) + (16+32=48, check!) + +In previous NETMF HAL implementations the developer could choose which timers would be synchronized to implement the HAL timer. +For the current HAL implementation (CMSIS based) we choose to go with a fixed configuration, for simplicity. + +TIM2 will be used as "master" timer synchronized with TIM3 "slave". + +*/ +BOOL HAL_Time_Initialize() +{ + g_nextEvent = 0xFFFFFFFFFFFF; // never + + TIM_MasterConfigTypeDef sMasterConfig; + TIM_SlaveConfigTypeDef sSlaveConfig; + RCC_ClkInitTypeDef clkconfig; + uint32_t uwTimclock, uwAPB1Prescaler = 0U; + uint32_t uwPrescalerValue = 0U; + uint32_t pFLatency; + + // master (32 bit) timer is Timer 2 + masterTimerHandle.Instance = TIM2; + // slave (16 bit) timer is Timer 3 + slaveTimerHandle.Instance = TIM3; + + // enable master clock + __TIM2_CLK_ENABLE(); + + // Configure the master timer IRQ priority one level above the HAL tick + HAL_NVIC_SetPriority(TIM2_IRQn, TICK_INT_PRIORITY + 1, 0U); + // enable master timer global Interrupt + HAL_NVIC_EnableIRQ(TIM2_IRQn); + + // enable slave clock + __TIM3_CLK_ENABLE(); + + /* Get clock configuration */ + HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); + + /* Get APB1 prescaler */ + uwAPB1Prescaler = clkconfig.APB1CLKDivider; + + /* Compute TIM clock */ + if (uwAPB1Prescaler == RCC_HCLK_DIV1) + { + uwTimclock = HAL_RCC_GetPCLK1Freq(); + } + else + { + uwTimclock = 2*HAL_RCC_GetPCLK1Freq(); + } + + /* Compute the prescaler value to have the timer counter clock equal to 1MHz */ + uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); + + /* master timer initialization as follows: + Period = [(TIM2CLK/1000) - 1]. to have a (1/1000) s time base. + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. + ClockDivision = 0 + Counter direction = Up + */ + masterTimerHandle.Init.Period = 0xFFFFFFFF; + masterTimerHandle.Init.Prescaler = uwPrescalerValue; + masterTimerHandle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + masterTimerHandle.Init.CounterMode = TIM_COUNTERMODE_UP; + + if(HAL_TIM_Base_Init(&masterTimerHandle) != HAL_OK) + { + // something went wrong + return FALSE; + } + + // master configration for the master timer + sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_ENABLE; + if(HAL_TIMEx_MasterConfigSynchronization(&masterTimerHandle, &sMasterConfig) != HAL_OK) + { + /* Configuration Error */ + // FIXME + //Error_Handler(); + } + + + // slave timer + slaveTimerHandle.Init.Period = 0xFFFF; + slaveTimerHandle.Init.Prescaler = 0; + slaveTimerHandle.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + slaveTimerHandle.Init.CounterMode = TIM_COUNTERMODE_UP; + + if(HAL_TIM_Base_Init(&slaveTimerHandle) != HAL_OK) + { + // something went wrong + return FALSE; + } + + // slave configuration for the slave timer + sSlaveConfig.SlaveMode = TIM_SLAVEMODE_GATED; + sSlaveConfig.InputTrigger = TIM_TS_ITR1; + if(HAL_TIM_SlaveConfigSynchronization(&slaveTimerHandle, &sSlaveConfig) != HAL_OK) + { + /* Configuration Error */ + // FIXME + //Error_Handler(); + } + + // Starts the 32 bits timer Input Capture measurement in interrupt mode for channel 1 + + if(HAL_TIM_Base_Start(&slaveTimerHandle) == HAL_OK) + { + // Starts the 32 bits timer Input Capture measurement in interrupt mode for channel 1 + if(HAL_TIM_IC_Start_IT(&masterTimerHandle, TIM_CHANNEL_1) == HAL_OK) + { + return TRUE; + } + } + + return FALSE; +} + +BOOL HAL_Time_Uninitialize() +{ + // disable master timer clock + __TIM2_CLK_DISABLE(); + // disable interrupt for master timer + HAL_NVIC_DisableIRQ(TIM2_IRQn); + // disable slave timer clock + __TIM3_CLK_DISABLE(); + + return TRUE; +} + +#pragma arm section code = "SectionForFlashOperations" +UINT64 __section("SectionForFlashOperations") HAL_Time_CurrentTicks() +{ + UINT64 ticks, lowerTicks; // cascaded timers + + // read counters from timers + ticks = (UINT64)__HAL_TIM_GET_COUNTER(&slaveTimerHandle); + lowerTicks = (UINT64)__HAL_TIM_GET_COUNTER(&masterTimerHandle); + + ticks = ticks << 32; + ticks = ticks | lowerTicks; + + return ticks; +} +#pragma arm section code + +INT64 HAL_Time_TicksToTime(UINT64 ticks) +{ + return CPU_TicksToTime(ticks); +} + +INT64 HAL_Time_CurrentTime() +{ + return CPU_TicksToTime(HAL_Time_CurrentTicks()); +} + +void HAL_Time_SetCompare(UINT64 compareValue) +{ + GLOBAL_LOCK(irq); + + g_nextEvent = compareValue; + + masterTimerHandle.Instance->CCR1 = (UINT32)compareValue; // compare to low bits + + if (HAL_Time_CurrentTicks() >= compareValue) + { + // missed event + // trigger immediate interrupt with event source being capture compare 1 + HAL_TIM_GenerateEvent(&masterTimerHandle, TIM_EVENTSOURCE_CC1); + } +} + +#pragma arm section code = "SectionForFlashOperations" +// +// To calibrate this constant, uncomment #define CALIBRATE_SLEEP_USEC in TinyHAL.c +// +#define STM32F4_SLEEP_USEC_FIXED_OVERHEAD_CLOCKS 3 + +void __section("SectionForFlashOperations") HAL_Time_Sleep_MicroSeconds(UINT32 uSec) +{ + GLOBAL_LOCK(irq); + + UINT32 current = HAL_Time_CurrentTicks(); + UINT32 maxDiff = CPU_MicrosecondsToTicks(uSec); + + if(maxDiff <= STM32F4_SLEEP_USEC_FIXED_OVERHEAD_CLOCKS) + { + maxDiff = 0; + } + else + { + maxDiff -= STM32F4_SLEEP_USEC_FIXED_OVERHEAD_CLOCKS; + } + + while(((INT32)(HAL_Time_CurrentTicks() - current)) <= maxDiff); +} + +void HAL_Time_Sleep_MicroSeconds_InterruptEnabled(UINT32 uSec) +{ + // iterations must be signed so that negative iterations will result in the minimum delay + uSec *= (HAL_RCC_GetHCLKFreq() / 1000000); + + // iterations is equal to the number of CPU instruction cycles in the required time minus + // overhead cycles required to call this subroutine. + int iterations = (int)uSec - 5; // Subtract off call & calculation overhead + + CYCLE_DELAY_LOOP(iterations); +} +#pragma arm section code + +void HAL_Time_GetDriftParameters(INT32* a, INT32* b, INT64* c) +{ + *a = 1; + *b = 1; + *c = 0; +} + +UINT32 CPU_SystemClock() +{ + return HAL_RCC_GetHCLKFreq(); +} + +UINT32 CPU_TicksPerSecond() +{ + // this is always 1MHz because of the configuration of the base timer used for the NETMF HAL + return 1000000; +} + +UINT64 CPU_MillisecondsToTicks(UINT64 ticks) +{ + return ticks; +} + +UINT64 CPU_MillisecondsToTicks(UINT32 ticks32) +{ + return (UINT64)ticks32; +} + +#pragma arm section code = "SectionForFlashOperations" +UINT64 __section("SectionForFlashOperations") CPU_MicrosecondsToTicks(UINT64 uSec) +{ + return uSec; +} + +UINT32 __section("SectionForFlashOperations") CPU_MicrosecondsToTicks(UINT32 uSec) +{ + return uSec; +} +#pragma arm section code + +UINT32 CPU_MicrosecondsToSystemClocks(UINT32 uSec) +{ + return uSec * (HAL_RCC_GetHCLKFreq() / 1000000); +} + +UINT64 CPU_TicksToTime(UINT64 ticks) +{ + return ticks * 10; +} + +UINT64 CPU_TicksToTime(UINT32 ticks32) +{ + return (UINT64)ticks32 * 10; +} + +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void TIM2_IRQHandler(void) +{ + HAL_TIM_IRQHandler(&masterTimerHandle); +} + +void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) +{ + if (htim->Channel == HAL_TIM_ACTIVE_CHANNEL_1) + { + if (HAL_Time_CurrentTicks() >= g_nextEvent) + { + // handle event + HAL_COMPLETION::DequeueAndExec(); // this also schedules the next one, if there is one + } + } +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/Time/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/Time/dotNetMF.proj new file mode 100644 index 000000000..1e0b08c14 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/Time/dotNetMF.proj @@ -0,0 +1,35 @@ + + + + CMSIS_time + + + {21D7B547-C341-4DAC-8F5D-3CA47C2AF70F} + CMSIS time driver + HAL + CMSIS_time.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\Time\dotNetMF.proj + CMSIS_time.$(LIB_EXT).manifest + + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\Time + Library + false + 4.0.0.0 + + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/USART/USART_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/USART/USART_functions.cpp new file mode 100644 index 000000000..fdaee9226 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USART/USART_functions.cpp @@ -0,0 +1,1084 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for CMSIS: Copyright (c) Oberon microsystems, Inc. +// +// *** Serial Driver *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include + +#if (!defined(USART_PORTS) || !defined(USART_PORTS_TX_RX)) +#error "No USART ports defined! Please go to platform_selector.h (in solution folder) and uncomment the define that matches the USART ports available in the device datasheet" +#endif + +// IO addresses +static const USART_TypeDef* g_Uart_Ports[] = USART_PORTS; +static const GPIO_TypeDef* g_Uart_Ports_Tx_Rx[] = USART_PORTS_TX_RX; + +// Pins +static BYTE g_Uart_RxD_Pins[ARRAYSIZE(g_Uart_Ports)]; +static BYTE g_Uart_TxD_Pins[ARRAYSIZE(g_Uart_Ports)]; +#ifdef USART_PORTS_FLOW_CONTROL + static const GPIO_TypeDef* g_Uart_Ports_Flow_Control[] = USART_PORTS_FLOW_CONTROL; + static BYTE g_Uart_CTS_Pins[ARRAYSIZE(g_Uart_Ports)]; + static BYTE g_Uart_RTS_Pins[ARRAYSIZE(g_Uart_Ports)]; +#endif + +static UART_HandleTypeDef * uartHandlers[ARRAYSIZE(g_Uart_Ports)]; + +#define CHECK_ARRAY_SIZE(condition) ((void)sizeof(char[(-1) + 1*!!(condition)])) + +void DummyToPerformArrayCheck() +{ + // g_Uart_Ports and g_Uart_Ports_Tx_Rx (and g_Uart_Ports_Flow_Control, if defined) arrays size must match + // Please go to platform_selector.h (in solution folder) and check related arrays + CHECK_ARRAY_SIZE(sizeof(g_Uart_Ports) == sizeof(g_Uart_Ports_Tx_Rx)); + #ifdef USART_PORTS_FLOW_CONTROL + CHECK_ARRAY_SIZE(sizeof(g_Uart_Ports) == sizeof(g_Uart_Ports_Flow_Control)); + #endif +} + +/** + * @brief Get USART/UART Index + * This function goes throw g_Uart_Ports to find uart index + * @param uart: UART + * @retval uart index in g_Uart_Ports array + */ +int GetUsartIndex(USART_TypeDef* uart) +{ + for(int i = 0; i < ARRAYSIZE(g_Uart_Ports); i++) + { + if(g_Uart_Ports[i] == uart) + { + return i; + } + } + // need a default + return 0; +} + +void USART_Handle_RX_IRQ (int comPortNum, USART_TypeDef* uart) +{ + INTERRUPT_START; + + char c = (char)(uart->DR); // read RX data + USART_AddCharToRxBuffer(comPortNum, c); + Events_Set(SYSTEM_EVENT_FLAG_COM_IN); + + INTERRUPT_END; +} + +void USART_Handle_TX_IRQ (int comPortNum, USART_TypeDef* uart) +{ + INTERRUPT_START; + + char c; + if (USART_RemoveCharFromTxBuffer(comPortNum, c)) { + uart->DR = c; // write TX data + } else { + uart->CR1 &= ~USART_CR1_TXEIE; // TX int disable + } + Events_Set(SYSTEM_EVENT_FLAG_COM_OUT); + + INTERRUPT_END; +} + +BOOL ComputeUSARTPins() +{ + // fill arrays with user USART ports definitions + for(int i = 0; i < ARRAYSIZE(g_Uart_Ports); i++) + { + if(g_Uart_Ports[i] == USART1) + { + if(g_Uart_Ports_Tx_Rx[i] == GPIOA) + { + g_Uart_RxD_Pins[i] = 10; // PA10 + g_Uart_TxD_Pins[i] = 9; // PA9 + } + else if(g_Uart_Ports_Tx_Rx[i] == GPIOB) + { + g_Uart_RxD_Pins[i] = 23; // PB7 + g_Uart_TxD_Pins[i] = 22; // PB6 + } + else + { + // invalid port selection + return FALSE; + } + + #ifdef USART_PORTS_FLOW_CONTROL + if(g_Uart_Ports_Flow_Control[i] != GPIO_NO_PORT && g_Uart_Ports_Flow_Control[i] == GPIOA) + { + g_Uart_CTS_Pins[i] = 11; // PA11 + g_Uart_RTS_Pins[i] = 12; // PA12 + } + else if(g_Uart_Ports_Flow_Control[i] != GPIO_NO_PORT) + { + // invalid port selection + return FALSE; + } + #endif + } + #ifdef USART2 + else if(g_Uart_Ports[i] == USART2) + { + if(g_Uart_Ports_Tx_Rx[i] == GPIOA) + { + g_Uart_RxD_Pins[i] = 3; // PA3 + g_Uart_TxD_Pins[i] = 2; // PA2 + } + else if(g_Uart_Ports_Tx_Rx[i] == GPIOD) + { + g_Uart_RxD_Pins[i] = 54; // PD6 + g_Uart_TxD_Pins[i] = 53; // PD5 + } + else + { + // invalid port selection + return FALSE; + } + + #ifdef USART_PORTS_FLOW_CONTROL + if(g_Uart_Ports_Flow_Control[i] != GPIO_NO_PORT) + { + if(g_Uart_Ports_Flow_Control[i] == GPIOA) + { + g_Uart_CTS_Pins[i] = 1; // PA1 + g_Uart_RTS_Pins[i] = 0; // PA0 + } + else if(g_Uart_Ports_Flow_Control[i] == GPIOA) + { + g_Uart_CTS_Pins[i] = 52; // PD4 + g_Uart_RTS_Pins[i] = 51; // PD3 + } + else + { + // invalid port selection + return FALSE; + } + } + #endif + } + #endif + #ifdef USART3 + else if(g_Uart_Ports[i] == USART3) + { + if(g_Uart_Ports_Tx_Rx[i] == GPIOB) + { + g_Uart_RxD_Pins[i] = 27; // PB11 + g_Uart_TxD_Pins[i] = 26; // PB10 + } + else if(g_Uart_Ports_Tx_Rx[i] == GPIOC) + { + g_Uart_RxD_Pins[i] = 43; // PC11 + g_Uart_TxD_Pins[i] = 42; // PC10 + } + else if(g_Uart_Ports_Tx_Rx[i] == GPIOD) + { + g_Uart_RxD_Pins[i] = 57; // PD9 + g_Uart_TxD_Pins[i] = 56; // PD8 + } + else + // shouldn't get here! + return FALSE; + + #ifdef USART_PORTS_FLOW_CONTROL + if(g_Uart_Ports_Flow_Control[i] != GPIO_NO_PORT) + { + if(g_Uart_Ports_Flow_Control[i] == GPIOB) + { + g_Uart_CTS_Pins[i] = 30; // PB14 + g_Uart_RTS_Pins[i] = 29; // PB13 + } + else if(g_Uart_Ports_Flow_Control[i] == GPIOD) + { + g_Uart_CTS_Pins[i] = 60; // PD12 + g_Uart_RTS_Pins[i] = 59; // PD11 + } + else + { + // invalid port selection + return FALSE; + } + } + #endif + } + #endif + #ifdef UART4 + else if(g_Uart_Ports[i] == UART4) + { + if(g_Uart_Ports_Tx_Rx[i] == GPIOA) + { + g_Uart_RxD_Pins[i] = 1; // PA1 + g_Uart_TxD_Pins[i] = 0; // PA0 + } + else if(g_Uart_Ports_Tx_Rx[i] == GPIOC) + { + g_Uart_RxD_Pins[i] = 43; // PC11 + g_Uart_TxD_Pins[i] = 42; // PC10 + } + else + { + // invalid port selection + return FALSE; + } + } + #endif + #ifdef USART6 + else if(g_Uart_Ports[i] == USART6) + { + if(g_Uart_Ports_Tx_Rx[i] == GPIOC) + { + g_Uart_RxD_Pins[i] = 39; // PC7 + g_Uart_TxD_Pins[i] = 38; // PC6 + } + else if(g_Uart_Ports_Tx_Rx[i] == GPIOG) + { + g_Uart_RxD_Pins[i] = 105; // PG9 + g_Uart_TxD_Pins[i] = 110; // PG14 + } + else + { + // invalid port selection + return FALSE; + } + #ifdef USART_PORTS_FLOW_CONTROL + if(g_Uart_Ports_Flow_Control[i] != GPIO_NO_PORT && g_Uart_Ports_Flow_Control[i] == GPIOG) + { + g_Uart_CTS_Pins[i] = 109; // PG13 + g_Uart_RTS_Pins[i] = 108; // PG12 + } + else if(g_Uart_Ports_Flow_Control[i] != GPIO_NO_PORT) + { + // invalid port selection + return FALSE; + } + #endif + } + #endif + #ifdef UART7 + else if(g_Uart_Ports[i] == UART7) + { + if(g_Uart_Ports_Tx_Rx[i] == GPIOE) + { + g_Uart_RxD_Pins[i] = 71; // PE7 + g_Uart_TxD_Pins[i] = 72; // PE8 + } + else if(g_Uart_Ports_Tx_Rx[i] == GPIOF) + { + g_Uart_RxD_Pins[i] = 86; // PF6 + g_Uart_TxD_Pins[i] = 87; // PF7 + } + else + { + // invalid port selection + return FALSE; + } + } + #endif + #ifdef UART8 + else if(g_Uart_Ports[i] == UART8) + { + if(g_Uart_Ports_Tx_Rx[i] == GPIOE) + { + g_Uart_RxD_Pins[i] = 64; // PE0 + g_Uart_TxD_Pins[i] = 65; // PE1 + } + else + { + // invalid port selection + return FALSE; + } + } + #endif + } +} + +void EnableUSARTGPIOClocks(int comPortNum) +{ + // Enable GPIO TX/RX clock + if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOA) + { + __HAL_RCC_GPIOA_CLK_ENABLE(); + } + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOB) + { + __HAL_RCC_GPIOB_CLK_ENABLE(); + } + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOC) + { + __HAL_RCC_GPIOC_CLK_ENABLE(); + } + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOD) + { + __HAL_RCC_GPIOD_CLK_ENABLE(); + } + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOE) + { + __HAL_RCC_GPIOE_CLK_ENABLE(); + } + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOF) + { + __HAL_RCC_GPIOF_CLK_ENABLE(); + } + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOG) + { + __HAL_RCC_GPIOG_CLK_ENABLE(); + } + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOH) + { + __HAL_RCC_GPIOH_CLK_ENABLE(); + } + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOI) + { + __HAL_RCC_GPIOI_CLK_ENABLE(); + } + #ifdef GPIOJ + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOJ) + { + __HAL_RCC_GPIOJ_CLK_ENABLE(); + } + #endif + #ifdef GPIOK + else if(g_Uart_Ports_Tx_Rx[comPortNum] == GPIOK) + { + __HAL_RCC_GPIOK_CLK_ENABLE(); + } + #endif + + // Enable USART1 clock + if(g_Uart_Ports[comPortNum] == USART1) + { + __HAL_RCC_USART1_CLK_ENABLE(); + } + #ifdef USART2 + else if(g_Uart_Ports[comPortNum] == USART2) + { + __HAL_RCC_USART2_CLK_ENABLE(); + } + #endif + #ifdef USART3 + else if(g_Uart_Ports[comPortNum] == USART3) + { + __HAL_RCC_USART3_CLK_ENABLE(); + } + #endif + #ifdef UART4 + else if(g_Uart_Ports[comPortNum] == UART4) + { + __HAL_RCC_UART4_CLK_ENABLE(); + } + #endif + #ifdef USART6 + else if(g_Uart_Ports[comPortNum] == USART6) + { + __HAL_RCC_USART6_CLK_ENABLE(); + } + #endif + #ifdef UART7 + else if(g_Uart_Ports[comPortNum] == UART7) + { + __HAL_RCC_UART7_CLK_ENABLE(); + } + #endif + #ifdef UART8 + else if(g_Uart_Ports[comPortNum] == UART8) + { + __HAL_RCC_UART8_CLK_ENABLE(); + } + #endif +} + +void ConfigureUSARTGPIOPin(int comPortNum) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + // USART/UART alternate function + if(g_Uart_Ports[comPortNum] == USART1) + { + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + } + #ifdef USART2 + else if(g_Uart_Ports[comPortNum] == USART2) + { + GPIO_InitStruct.Alternate = GPIO_AF7_USART2; + } + #endif + #ifdef USART3 + else if(g_Uart_Ports[comPortNum] == USART3) + { + GPIO_InitStruct.Alternate = GPIO_AF7_USART3; + } + #endif + #ifdef UART4 + else if(g_Uart_Ports[comPortNum] == UART4) + { + GPIO_InitStruct.Alternate = GPIO_AF8_UART4; + } + #endif + #ifdef USART6 + else if(g_Uart_Ports[comPortNum] == USART6) + { + GPIO_InitStruct.Alternate = GPIO_AF8_USART6; + } + #endif + #ifdef UART7 + else if(g_Uart_Ports[comPortNum] == UART7) + { + GPIO_InitStruct.Alternate = GPIO_AF8_UART7; + } + #endif + #ifdef UART8 + else if(g_Uart_Ports[comPortNum] == UART8) + { + GPIO_InitStruct.Alternate = GPIO_AF8_UART8; + } + #endif + + // UART TX GPIO pin configuration + GPIO_InitStruct.Pin = g_Uart_TxD_Pins[comPortNum]; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FAST; + + HAL_GPIO_Init((GPIO_TypeDef*)g_Uart_Ports_Tx_Rx[comPortNum], &GPIO_InitStruct); + + // UART RX GPIO pin configuration + GPIO_InitStruct.Pin = g_Uart_RxD_Pins[comPortNum]; + + HAL_GPIO_Init((GPIO_TypeDef*)g_Uart_Ports_Tx_Rx[comPortNum], &GPIO_InitStruct); +} + +void SetUSARTPriority(int comPortNum) +{ + // USART/UART alternate function + if(g_Uart_Ports[comPortNum] == USART1) + { + HAL_NVIC_SetPriority(USART1_IRQn, USART1_PRIORITY, 1); + } + #ifdef USART2 + else if(g_Uart_Ports[comPortNum] == USART2) + { + HAL_NVIC_SetPriority(USART2_IRQn, USART2_PRIORITY, 1); + } + #endif + #ifdef USART3 + else if(g_Uart_Ports[comPortNum] == USART3) + { + HAL_NVIC_SetPriority(USART3_IRQn, USART3_PRIORITY, 1); + } + #endif + #ifdef UART4 + else if(g_Uart_Ports[comPortNum] == UART4) + { + HAL_NVIC_SetPriority(UART4_IRQn, USART4_PRIORITY, 1); + } + #endif + #ifdef USART6 + else if(g_Uart_Ports[comPortNum] == USART6) + { + HAL_NVIC_SetPriority(USART6_IRQn, USART6_PRIORITY, 1); + } + #endif + #ifdef UART7 + else if(g_Uart_Ports[comPortNum] == UART7) + { + HAL_NVIC_SetPriority(UART7_IRQn, USART7_PRIORITY, 1); + } + #endif + #ifdef UART8 + else if(g_Uart_Ports[comPortNum] == UART8) + { + HAL_NVIC_SetPriority(UART8_IRQn, USART8_PRIORITY, 1); + } + #endif +} + +void EnableUSARTInt(int comPortNum) +{ + if(g_Uart_Ports[comPortNum] == USART1) + { + HAL_NVIC_EnableIRQ(USART1_IRQn); + } + #ifdef USART2 + else if(g_Uart_Ports[comPortNum] == USART2) + { + HAL_NVIC_EnableIRQ(USART2_IRQn); + } + #endif + #ifdef USART3 + else if(g_Uart_Ports[comPortNum] == USART3) + { + HAL_NVIC_EnableIRQ(USART3_IRQn); + } + #endif + #ifdef UART4 + else if(g_Uart_Ports[comPortNum] == UART4) + { + HAL_NVIC_EnableIRQ(UART4_IRQn); + } + #endif + #ifdef USART6 + else if(g_Uart_Ports[comPortNum] == USART6) + { + HAL_NVIC_EnableIRQ(USART6_IRQn); + } + #endif + #ifdef UART7 + else if(g_Uart_Ports[comPortNum] == UART7) + { + HAL_NVIC_EnableIRQ(UART7_IRQn); + } + #endif + #ifdef UART8 + else if(g_Uart_Ports[comPortNum] == UART8) + { + HAL_NVIC_EnableIRQ(UART8_IRQn); + } + #endif +} + +void DisableUSARTInt(int comPortNum) +{ + if(g_Uart_Ports[comPortNum] == USART1) + { + HAL_NVIC_DisableIRQ(USART1_IRQn); + } + #ifdef USART2 + else if(g_Uart_Ports[comPortNum] == USART2) + { + HAL_NVIC_DisableIRQ(USART2_IRQn); + } + #endif + #ifdef USART3 + else if(g_Uart_Ports[comPortNum] == USART3) + { + HAL_NVIC_DisableIRQ(USART3_IRQn); + } + #endif + #ifdef UART4 + else if(g_Uart_Ports[comPortNum] == UART4) + { + HAL_NVIC_DisableIRQ(UART4_IRQn); + } + #endif + #ifdef USART6 + else if(g_Uart_Ports[comPortNum] == USART6) + { + HAL_NVIC_DisableIRQ(USART6_IRQn); + } + #endif + #ifdef UART7 + else if(g_Uart_Ports[comPortNum] == UART7) + { + HAL_NVIC_DisableIRQ(UART7_IRQn); + } + #endif + #ifdef UART8 + else if(g_Uart_Ports[comPortNum] == UART8) + { + HAL_NVIC_DisableIRQ(UART8_IRQn); + } + #endif +} + +uint32_t GetUSARTInterruptEnableState(int comPortNum) +{ + if(g_Uart_Ports[comPortNum] == USART1) + { + return HAL_NVIC_GetActive(USART1_IRQn); + } + #ifdef USART2 + else if(g_Uart_Ports[comPortNum] == USART2) + { + return HAL_NVIC_GetActive(USART2_IRQn); + } + #endif + #ifdef USART3 + else if(g_Uart_Ports[comPortNum] == USART3) + { + return HAL_NVIC_GetActive(USART3_IRQn); + } + #endif + #ifdef UART4 + else if(g_Uart_Ports[comPortNum] == UART4) + { + return HAL_NVIC_GetActive(UART4_IRQn); + } + #endif + #ifdef USART6 + else if(g_Uart_Ports[comPortNum] == USART6) + { + return HAL_NVIC_GetActive(USART6_IRQn); + } + #endif + #ifdef UART7 + else if(g_Uart_Ports[comPortNum] == UART7) + { + return HAL_NVIC_GetActive(UART7_IRQn); + } + #endif + #ifdef UART8 + else if(g_Uart_Ports[comPortNum] == UART8) + { + return HAL_NVIC_GetActive(UART8_IRQn); + } + #endif + + // shouldn't reach here + return -1; +} + +/** + * @brief UART MSP Initialization + * This function configures the hardware resources used: + * - Compute peripherals pin arrays (only once) + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * @param huart: UART handle pointer + * @retval None + */ +void HAL_UART_MspInit(UART_HandleTypeDef *huart) +{ + // get usart index + int index = GetUsartIndex(huart->Instance); + + if(g_Uart_RxD_Pins[0] == 0) + { + // need to fill USART pin arrays + ComputeUSARTPins(); + } + + // Enable GPIO TX/RX clock and USART clock + EnableUSARTGPIOClocks(index); + // UART TX/RX GPIO pin configuration + ConfigureUSARTGPIOPin(index); + // Set USARTx priority + SetUSARTPriority(index); +} + +/** + * @brief UART MSP De-Initialization + * This function frees the hardware resources used in this example: + * - Disable the Peripheral's clock + * - Revert GPIO configuration to their default state + * @param huart: UART handle pointer + * @retval None + */ +void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) +{ + // get usart index + int index = GetUsartIndex(huart->Instance); + /*##-1- Reset peripherals ##################################################*/ + if(huart->Instance == USART1) + { + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); + } + #ifdef USART2 + else if(huart->Instance == USART2) + { + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); + } + #endif + #ifdef USART3 + else if(huart->Instance == USART3) + { + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); + } + #endif + #ifdef UART4 + else if(huart->Instance == UART4) + { + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); + } + #endif + #ifdef USART6 + else if(huart->Instance == USART6) + { + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); + } + #endif + #ifdef UART7 + else if(huart->Instance == UART7) + { + __HAL_RCC_UART7_FORCE_RESET(); + __HAL_RCC_UART7_RELEASE_RESET(); + } + #endif + #ifdef UART8 + else if(huart->Instance == UART8) + { + __HAL_RCC_UART8_FORCE_RESET(); + __HAL_RCC_UART8_RELEASE_RESET(); + } + #endif + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Configure UART Tx as alternate function */ + HAL_GPIO_DeInit((GPIO_TypeDef*)g_Uart_Ports_Tx_Rx[index], g_Uart_TxD_Pins[index]); + /* Configure UART Rx as alternate function */ + HAL_GPIO_DeInit((GPIO_TypeDef*)g_Uart_Ports_Tx_Rx[index], g_Uart_RxD_Pins[index]); +} + +BOOL CPU_USART_Initialize(int comPortNum, int baudRate, int parity, int dataBits, int stopBits, int flowValue) +{ + UART_HandleTypeDef UartHandle; + + + uartHandlers[comPortNum]; + + if (comPortNum >= TOTAL_USART_PORT) + return FALSE; + + if (parity >= USART_PARITY_MARK) + return FALSE; + + GLOBAL_LOCK(irq); + + UartHandle.Instance = (USART_TypeDef*)g_Uart_Ports[comPortNum]; + UartHandle.Init.BaudRate = baudRate; + // UART Number of Stop Bits + if (stopBits == USART_STOP_BITS_TWO) + { + UartHandle.Init.StopBits = USART_CR2_STOP_1; + } + else + { + UartHandle.Init.StopBits = 0; + } + // UART Parity + if(parity == UART_PARITY_ODD) + { + UartHandle.Init.Parity = USART_CR1_PCE | USART_CR1_PS; + } + else if(parity == UART_PARITY_EVEN) + { + UartHandle.Init.Parity = USART_CR1_PCE; + dataBits++; + } + else + { + UartHandle.Init.Parity = 0; + } + // UART Word Length + if (dataBits == 9) + UartHandle.Init.WordLength = USART_CR1_M; + else + { + if (dataBits != 8) + return FALSE; + UartHandle.Init.WordLength = 0; + } + // UART Hardware Flow Control + if (flowValue & USART_FLOW_NONE) + { + UartHandle.Init.HwFlowCtl |= 0; + } + if (flowValue & USART_FLOW_HW_OUT_EN) + { + UartHandle.Init.HwFlowCtl |= USART_CR3_CTSE; + } + if (flowValue & USART_FLOW_HW_IN_EN) + { + UartHandle.Init.HwFlowCtl |= USART_CR3_RTSE; + } + + UartHandle.Init.Mode = UART_MODE_TX_RX; + UartHandle.Init.OverSampling = UART_OVERSAMPLING_16; + + // // control + // UINT16 ctrl = USART_CR1_TE | USART_CR1_RE; + // if (Parity) { + // ctrl |= USART_CR1_PCE; + // DataBits++; + // } + + // if (Parity == USART_PARITY_ODD) + // ctrl |= USART_CR1_PS; + + // if (DataBits == 9) + // ctrl |= USART_CR1_M; + // else + // { + // if (DataBits != 8) + // return FALSE; + // } + // uart->CR1 = ctrl; + + // if (StopBits == USART_STOP_BITS_ONE) + // StopBits = 0; + + // uart->CR2 = (UINT16)(StopBits << 12); + + // ctrl = 0; + // if (FlowValue & USART_FLOW_HW_OUT_EN) + // ctrl |= USART_CR3_CTSE; + + // if (FlowValue & USART_FLOW_HW_IN_EN) + // ctrl |= USART_CR3_RTSE; + + // uart->CR3 = ctrl; + + // GPIO_PIN rxPin, txPin, ctsPin, rtsPin; + // CPU_USART_GetPins(comPortNum, rxPin, txPin, ctsPin, rtsPin); + // UINT32 alternate = 0x72; // AF7 = USART1-3 + // if (comPortNum >= 3) + // alternate = 0x82; // AF8 = UART4-8 + + // CPU_GPIO_DisablePin(rxPin, RESISTOR_PULLUP, 0, (GPIO_ALT_MODE)alternate); + // CPU_GPIO_DisablePin(txPin, RESISTOR_DISABLED, 1, (GPIO_ALT_MODE)alternate); + // if (FlowValue & USART_FLOW_HW_OUT_EN) + // { + // if (ctsPin == GPIO_PIN_NONE) + // return FALSE; + + // CPU_GPIO_DisablePin(ctsPin, RESISTOR_DISABLED, 0, (GPIO_ALT_MODE)alternate); + // } + + // if (FlowValue & USART_FLOW_HW_IN_EN) + // { + // if (rtsPin == GPIO_PIN_NONE) + // return FALSE; + + // CPU_GPIO_DisablePin(rtsPin, RESISTOR_DISABLED, 1, (GPIO_ALT_MODE)alternate); + // } + + // CPU_USART_ProtectPins(comPortNum, FALSE); + + if(HAL_UART_Init(&UartHandle) != HAL_OK) + { + return FALSE; + } + + // Enable the NVIC for UART + EnableUSARTInt(comPortNum); + + return TRUE; +} + +BOOL CPU_USART_Uninitialize(int comPortNum) +{ + GLOBAL_LOCK(irq); + + ((USART_TypeDef*)g_Uart_Ports[comPortNum])->CR1 = 0; // stop uart + + // Disable the NVIC for UART + DisableUSARTInt(comPortNum); + + return TRUE; +} + +BOOL CPU_USART_TxBufferEmpty(int comPortNum) +{ + if (g_Uart_Ports[comPortNum]->SR & USART_SR_TXE) + return TRUE; + + return FALSE; +} + +BOOL CPU_USART_TxShiftRegisterEmpty(int comPortNum) +{ + if (g_Uart_Ports[comPortNum]->SR & USART_SR_TC) + return TRUE; + + return FALSE; +} + +void CPU_USART_WriteCharToTxBuffer(int comPortNum, UINT8 c) +{ +#ifdef DEBUG + ASSERT(CPU_USART_TxBufferEmpty(comPortNum)); +#endif + ((USART_TypeDef*)g_Uart_Ports[comPortNum])->DR = c; +} + +void CPU_USART_TxBufferEmptyInterruptEnable(int comPortNum, BOOL enable) +{ + USART_TypeDef* uart = (USART_TypeDef*)g_Uart_Ports[comPortNum]; + if (enable) + { + uart->CR1 |= USART_CR1_TXEIE; // tx int enable + } + else + { + uart->CR1 &= ~USART_CR1_TXEIE; // tx int disable + } +} + +BOOL CPU_USART_TxBufferEmptyInterruptState(int comPortNum) +{ + if (g_Uart_Ports[comPortNum]->CR1 & USART_CR1_TXEIE) + return TRUE; + + return FALSE; +} + +void CPU_USART_RxBufferFullInterruptEnable(int comPortNum, BOOL enable) +{ + USART_TypeDef* uart = (USART_TypeDef*)g_Uart_Ports[comPortNum]; + if (enable) + { + uart->CR1 |= USART_CR1_RXNEIE; // rx int enable + } + else + { + uart->CR1 &= ~USART_CR1_RXNEIE; // rx int disable + } +} + +BOOL CPU_USART_RxBufferFullInterruptState(int comPortNum) +{ + if (g_Uart_Ports[comPortNum]->CR1 & USART_CR1_RXNEIE) + return TRUE; + + return FALSE; +} + +BOOL CPU_USART_TxHandshakeEnabledState(int comPortNum) +{ + // The state of the CTS input only matters if Flow Control is enabled +#ifdef USART_PORTS_FLOW_CONTROL + if( (UINT32)comPortNum < ARRAYSIZE_CONST_EXPR(g_Uart_CTS_Pins) + && g_Uart_Ports[comPortNum]->CR3 & USART_CR3_CTSE + ) + { + return !CPU_GPIO_GetPinState(g_Uart_CTS_Pins[comPortNum]); // CTS active + } +#endif + + return TRUE; // If this handshake input is not being used, it is assumed to be good +} + +void CPU_USART_ProtectPins(int comPortNum, BOOL on) // idempotent +{ + if (on) + { + CPU_USART_RxBufferFullInterruptEnable(comPortNum, FALSE); + CPU_USART_TxBufferEmptyInterruptEnable(comPortNum, FALSE); + } + else + { + CPU_USART_TxBufferEmptyInterruptEnable(comPortNum, TRUE); + CPU_USART_RxBufferFullInterruptEnable(comPortNum, TRUE); + } +} + +UINT32 CPU_USART_PortsCount() +{ + return TOTAL_USART_PORT; +} + +void CPU_USART_GetPins(int comPortNum, GPIO_PIN& rxPin, GPIO_PIN& txPin,GPIO_PIN& ctsPin, GPIO_PIN& rtsPin) +{ + rxPin = txPin = ctsPin = rtsPin = GPIO_PIN_NONE; + if ((UINT32)comPortNum >= ARRAYSIZE_CONST_EXPR(g_Uart_RxD_Pins)) + return; + + rxPin = g_Uart_RxD_Pins[comPortNum]; + txPin = g_Uart_TxD_Pins[comPortNum]; + +#if defined(UART_CTS_PINS) && defined(UART_RTS_PINS) + if ((UINT32)comPortNum >= ARRAYSIZE_CONST_EXPR(g_Uart_CTS_Pins)) + return; // no CTS/RTS + + ctsPin = g_Uart_CTS_Pins[comPortNum]; + rtsPin = g_Uart_RTS_Pins[comPortNum]; +#endif +} + +void CPU_USART_GetBaudrateBoundary(int comPortNum, UINT32 & maxBaudrateHz, UINT32 & minBaudrateHz) +{ + UINT32 clk = SYSTEM_APB2_CLOCK_HZ; + if (comPortNum && comPortNum != 5) + clk = SYSTEM_APB1_CLOCK_HZ; + + maxBaudrateHz = clk >> 4; + minBaudrateHz = clk >> 16; +} + +BOOL CPU_USART_SupportNonStandardBaudRate(int comPortNum) +{ + return TRUE; +} + +BOOL CPU_USART_IsBaudrateSupported(int comPortNum, UINT32& baudrateHz) +{ + UINT32 max = SYSTEM_APB2_CLOCK_HZ >> 4; + if (comPortNum && comPortNum != 5) + max = SYSTEM_APB1_CLOCK_HZ >> 4; + + if (baudrateHz <= max) + return TRUE; + + baudrateHz = max; + return FALSE; +} + +void GlobalUsartHandler(USART_TypeDef* uart) +{ + UINT16 sr = uart->SR; + if (sr & USART_SR_RXNE) USART_Handle_RX_IRQ(GetUsartIndex(uart), uart); + if (sr & USART_SR_TXE) USART_Handle_TX_IRQ(GetUsartIndex(uart), uart); +} + +#ifdef USART1 +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void USART1_IRQHandler(void) +{ + GlobalUsartHandler(USART1); +} +#endif +#ifdef USART2 +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void USART2_IRQHandler(void) +{ + GlobalUsartHandler(USART2); +} +#endif +#ifdef USART3 +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void USART3_IRQHandler(void) +{ + GlobalUsartHandler(USART3); +} +#endif +#ifdef UART4 +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void UART4_IRQHandler(void) +{ + GlobalUsartHandler(UART4); +} +#endif +#ifdef USART6 +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void USART6_IRQHandler(void) +{ + GlobalUsartHandler(USART6); +} +#endif +#ifdef UART7 +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void UART7_IRQHandler(void) +{ + GlobalUsartHandler(UART7); +} +#endif +#ifdef UART8 +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void UART8_IRQHandler(void) +{ + GlobalUsartHandler(UART8); +} +#endif + diff --git a/DeviceCode/Targets/Native/STM32F4xx/USART/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/USART/dotNetMF.proj new file mode 100644 index 000000000..de8f33894 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USART/dotNetMF.proj @@ -0,0 +1,33 @@ + + + CMSIS_USART + + + {54531FA9-DF5E-4FA5-A0D7-0D5129EEC321} + CMSIS USART driver + HAL + CMSIS_USART.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\USART\dotNetMF.proj + CMSIS_USART.$(LIB_EXT).manifest + + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\USART + Library + false + 4.0.0.0 + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/USB/USB_functions.cpp b/DeviceCode/Targets/Native/STM32F4xx/USB/USB_functions.cpp new file mode 100644 index 000000000..c2f6f033f --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USB/USB_functions.cpp @@ -0,0 +1,183 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for CMSIS: Copyright (c) Eclo Solutions Lda. +// +// *** USB WinUSB device for debug *** +// +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include +#include + + +#include "usbd_desc.h" +#include "usbd_conf.h" +#include "usbd_core.h" +#include "usbd_winusb.h" + +//--// +USB_CONTROLLER_STATE usbControlerState; +static UINT16 endpointStatus[USB_MAX_QUEUES]; +static UINT16 EP_Type; +UINT8 previousDeviceState; + +/* Queues for all data endpoints */ +Hal_Queue_KnownSize QueueBuffers[4]; + +USBD_HandleTypeDef USBD_Device; +extern PCD_HandleTypeDef hpcd; +extern uint8_t txBuffer[80]; + +USB_CONTROLLER_STATE *CPU_USB_GetState(int Controller) +{ + return &usbControlerState; +} + +HRESULT CPU_USB_Initialize(int Controller) +{ + // setup usb state variables + usbControlerState.EndpointStatus = endpointStatus; + + // FIXME + usbControlerState.EndpointCount = 4; + + // FIXME + // get max ep0 packet size from actual configuration + //const USB_DEVICE_DESCRIPTOR* desc = ( USB_DEVICE_DESCRIPTOR* )USB_FindRecord( &usbControlerState, USB_DEVICE_DESCRIPTOR_MARKER, 0 ); + //usbControlerState.PacketSize = desc ? desc->bMaxPacketSize0 : 8; + usbControlerState.PacketSize = WINUSB_MAX_FS_PACKET; + + // config endpoints + // EP1 + // IN direction + usbControlerState.IsTxQueue[1] = TRUE; + // max packet size + usbControlerState.MaxPacketSize[1] = WINUSB_MAX_FS_PACKET; + // assign queues + // clear queue before use + QueueBuffers[1].Initialize(); + // Attach queue to endpoint + usbControlerState.Queues[1] = &QueueBuffers[1]; + + // EP2 + // OUT direction + usbControlerState.IsTxQueue[2] = FALSE; + // max packet size + usbControlerState.MaxPacketSize[2] = WINUSB_MAX_FS_PACKET; + // assign queues + // clear queue before use + QueueBuffers[2].Initialize(); + // Attach queue to endpoint + usbControlerState.Queues[2] = &QueueBuffers[2]; + + // ????????????? + EP_Type = 0xE0; + + USBD_Device.pUserData = &usbControlerState; + + // Init Device Library + USBD_Init(&USBD_Device, &WINUSB_Desc, 0); + + // Add Supported Class + USBD_RegisterClass(&USBD_Device, USBD_WINUSB_CLASS); + + /* Add WinUSB callbacks */ + //USBD_WINUSB_RegisterInterface(&USBD_Device, &USBD_WINUSB_fops); + + // Start Device Process + USBD_Start(&USBD_Device); + + // controller is now initialized + usbControlerState.Initialized = TRUE; + + usbControlerState.DeviceState = USB_DEVICE_STATE_CONFIGURED; + + return S_OK; +} + +HRESULT CPU_USB_Uninitialize(int Controller) +{ + USBD_Stop(&USBD_Device); + USBD_DeInit(&USBD_Device); + + return S_OK; +} + +BOOL CPU_USB_StartOutput(USB_CONTROLLER_STATE* state, int endpoint) +{ + if(state == NULL || endpoint >= state->EndpointCount) + { + return FALSE; + } + + // endpoint is not an output + if(state->Queues[endpoint] == NULL || !state->IsTxQueue[endpoint]) + { + return FALSE; + } + + /* if the halt feature for this endpoint is set, then just clear all the characters */ + if(state->EndpointStatus[endpoint] & USB_STATUS_ENDPOINT_HALT) + { + while(USB_TxDequeue(state, endpoint, TRUE) != NULL) + { + } // clear TX queue + + return TRUE; + } + + // need to wait here for while to allow the USB IN operation to complete + // this seems to occurr only with MFDeploy + HAL_Time_Sleep_MicroSeconds_InterruptEnabled(250); + + // best way to start outputing data is to call the INT handler as if a DataIn interrupt occurred + USBD_Device.pClass->DataIn(&USBD_Device, endpoint); + + return TRUE; +} + +BOOL CPU_USB_RxEnable(USB_CONTROLLER_STATE* state, int endpoint) +{ + // If this is not a legal Rx queue + if(state == NULL || state->Queues[endpoint] == NULL || state->IsTxQueue[endpoint]) + { + return FALSE; + } + + GLOBAL_LOCK(irq); + + // enable Rx + // if( !( OTG->DOEP[ endpoint ].CTL & OTG_DOEPCTL_EPENA ) ) + // { + // OTG->DOEP[ endpoint ].TSIZ = OTG_DOEPTSIZ_PKTCNT_1 | State->MaxPacketSize[ endpoint ]; + // OTG->DOEP[ endpoint ].CTL |= OTG_DOEPCTL_EPENA | OTG_DOEPCTL_CNAK; // enable endpoint + // } + + return TRUE; +} + +BOOL CPU_USB_GetInterruptState() +{ + return FALSE; +} + +BOOL CPU_USB_ProtectPins(int controller, BOOL On) +{ + return TRUE; +} + +/** + * @brief This function handles USB-On-The-Go FS/HS global interrupt request. + * @param None + * @retval None + */ +// must declare this as extern C funtion otherwise it won't be recognized by the linker as a valid interrupt handler +extern "C" void OTG_FS_IRQHandler(void) +{ + HAL_PCD_IRQHandler(&hpcd); +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/USB/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/USB/dotNetMF.proj new file mode 100644 index 000000000..21bae342f --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USB/dotNetMF.proj @@ -0,0 +1,58 @@ + + + + CMSIS_USB_DEBUG + + {4BA06E07-3576-4A8F-8DE6-DB2CFD370967} + CMSIS USB debug with WinUSB driver + HAL + CMSIS_USB_DEBUG.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\USB\dotNetMF.proj + CMSIS_USB_DEBUG.$(LIB_EXT).manifest + + + False + + False + False + False + DeviceCode\Targets\Native\STM32F4xx\USB + Library + false + 4.0.0.0 + + + + + + True + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/USB/usb_conf.cpp b/DeviceCode/Targets/Native/STM32F4xx/USB/usb_conf.cpp new file mode 100644 index 000000000..c696b7a70 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USB/usb_conf.cpp @@ -0,0 +1,518 @@ +/** + ****************************************************************************** + * @file USB_Device/CustomHID_Standalone/Src/usbd_conf.c + * @author MCD Application Team + * @version V1.4.3 + * @date 29-January-2016 + * @brief This file implements the USB Device library callbacks and MSP + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include +#include + +#include "usbd_conf.h" +#include "usbd_core.h" +#include "usbd_winusb.h" + +extern USB_CONTROLLER_STATE usbControlerState; +extern void USB_StateCallback(USB_CONTROLLER_STATE* State); +extern UINT8 previousDeviceState; + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +PCD_HandleTypeDef hpcd; + +// int USB_TRACE_STATE = 0; +// #define USB_Debug(s) USB_TRACE_STATE = s//ITM_SendChar( s ) + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* + PCD BSP Routines +*******************************************************************************/ + +/** + * @brief Initializes the PCD MSP. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(hpcd->Instance == USB_OTG_FS) + { + /* Configure USB FS GPIOs */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + + /* Configure DM DP Pins */ + GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Configure VBUS Pin */ + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Configure ID pin */ + GPIO_InitStruct.Pin = GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* Enable USB FS Clocks */ + __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); + + /* Set USBFS Interrupt to the lowest priority */ + HAL_NVIC_SetPriority(OTG_FS_IRQn, USB_PRIORITY, 0); + + /* Enable USBFS Interrupt */ + HAL_NVIC_EnableIRQ(OTG_FS_IRQn); + } +} + +/** + * @brief De-Initializes the PCD MSP. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) +{ + if(hpcd->Instance == USB_OTG_FS) + { + /* Disable USB FS Clocks */ + __HAL_RCC_USB_OTG_FS_CLK_DISABLE(); + __HAL_RCC_SYSCFG_CLK_DISABLE(); + } +} + +/******************************************************************************* + LL Driver Callbacks (PCD -> USB Device Library) +*******************************************************************************/ + +/** + * @brief SOF callback. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) +{ + USBD_StatusTypeDef ret = USBD_OK; + USBD_HandleTypeDef *pdev = (USBD_HandleTypeDef*)hpcd->pData; + + USBD_ParseSetupRequest(&pdev->request, (uint8_t *)hpcd->Setup); + + if ( ( USB_REQ_TYPE_VENDOR == (pdev->request.bmRequest & USB_REQ_TYPE_MASK) ) && ( OS_DESCRIPTOR_STRING_VENDOR_CODE == pdev->request.bRequest ) ) + { + pdev->ep0_state = USBD_EP0_SETUP; + pdev->ep0_data_len = pdev->request.wLength; + + ret = (USBD_StatusTypeDef)pdev->pClass->Setup((USBD_HandleTypeDef*)pdev, &pdev->request); + + if( (pdev->request.wLength == 0) && (ret == USBD_OK) ) + { + USBD_CtlSendStatus(pdev); + } + return; + } + + USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); +} + +/** + * @brief Data out callback. + * @param hpcd: PCD handle + * @param epnum: Endpoint Number + * @retval None + */ +void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); +} + +/** + * @brief Data in callback. + * @param hpcd: PCD handle + * @param epnum: Endpoint Number + * @retval None + */ +void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); +} + +/** + * @brief SOF callback. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) +{ + USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); +} + +/** + * @brief Reset callback. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) +{ + USBD_SpeedTypeDef speed = USBD_SPEED_FULL; + + /* Set USB Current Speed */ + switch(hpcd->Init.speed) + { + case PCD_SPEED_HIGH: + speed = USBD_SPEED_HIGH; + break; + + case PCD_SPEED_FULL: + speed = USBD_SPEED_FULL; + break; + + default: + speed = USBD_SPEED_FULL; + break; + } + USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); + + /* Reset Device */ + USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); +} + +/** + * @brief Suspend callback. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) +{ + USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); + + previousDeviceState = usbControlerState.DeviceState; + usbControlerState.DeviceState = USB_DEVICE_STATE_SUSPENDED; + USB_StateCallback(&usbControlerState); +} + +/** + * @brief SOF callback. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) +{ + USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); + + usbControlerState.DeviceState = previousDeviceState; + USB_StateCallback(&usbControlerState); +} + +/** + * @brief SOF callback. + * @param hpcd: PCD handle + * @param epnum: Endpoint Number + * @retval None + */ +void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); +} + +/** + * @brief SOF callback. + * @param hpcd: PCD handle + * @param epnum: Endpoint Number + * @retval None + */ +void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); +} + +/** + * @brief SOF callback. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) +{ + USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData); +} + +/** + * @brief SOF callback. + * @param hpcd: PCD handle + * @retval None + */ +void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) +{ + USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData); +} + +/******************************************************************************* + LL Driver Interface (USB Device Library --> PCD) +*******************************************************************************/ + +/** + * @brief Initializes the Low Level portion of the Device driver. + * @param pdev: Device handle + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) +{ + + /* Set LL Driver parameters */ + hpcd.Instance = USB_OTG_FS; + hpcd.Init.dev_endpoints = 4; + hpcd.Init.use_dedicated_ep1 = 0; + hpcd.Init.ep0_mps = 0x40; + hpcd.Init.dma_enable = 0; + hpcd.Init.low_power_enable = 0; + hpcd.Init.phy_itface = PCD_PHY_EMBEDDED; + hpcd.Init.Sof_enable = 0; + hpcd.Init.speed = PCD_SPEED_FULL; + hpcd.Init.vbus_sensing_enable = 1; + /* Link The driver to the stack */ + hpcd.pData = pdev; + pdev->pData = &hpcd; + /* Initialize LL Driver */ + HAL_PCD_Init(&hpcd); + + HAL_PCDEx_SetRxFiFo(&hpcd, 0x80); + HAL_PCDEx_SetTxFiFo(&hpcd, 0, 0x40); + HAL_PCDEx_SetTxFiFo(&hpcd, 1, 0x80); + + return USBD_OK; +} + +/** + * @brief De-Initializes the Low Level portion of the Device driver. + * @param pdev: Device handle + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev) +{ + HAL_PCD_DeInit((PCD_HandleTypeDef*)pdev->pData); + return USBD_OK; +} + +/** + * @brief Starts the Low Level portion of the Device driver. + * @param pdev: Device handle + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) +{ + HAL_PCD_Start((PCD_HandleTypeDef*)pdev->pData); + return USBD_OK; +} + +/** + * @brief Stops the Low Level portion of the Device driver. + * @param pdev: Device handle + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev) +{ + HAL_PCD_Stop((PCD_HandleTypeDef*)pdev->pData); + return USBD_OK; +} + +/** + * @brief Opens an endpoint of the Low Level Driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @param ep_type: Endpoint Type + * @param ep_mps: Endpoint Max Packet Size + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, + uint8_t ep_addr, + uint8_t ep_type, + uint16_t ep_mps) +{ + HAL_PCD_EP_Open((PCD_HandleTypeDef*)pdev->pData, + ep_addr, + ep_mps, + ep_type); + + return USBD_OK; +} + +/** + * @brief Closes an endpoint of the Low Level Driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + HAL_PCD_EP_Close((PCD_HandleTypeDef*)pdev->pData, ep_addr); + return USBD_OK; +} + +/** + * @brief Flushes an endpoint of the Low Level Driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + HAL_PCD_EP_Flush((PCD_HandleTypeDef*)pdev->pData, ep_addr); + return USBD_OK; +} + +/** + * @brief Sets a Stall condition on an endpoint of the Low Level Driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + HAL_PCD_EP_SetStall((PCD_HandleTypeDef*)pdev->pData, ep_addr); + + /* set the halt feature */ + USB_CONTROLLER_STATE* state; + state = (USB_CONTROLLER_STATE*)pdev->pUserData; + state->EndpointStatus[ep_addr & 0xFC] |= USB_STATUS_ENDPOINT_HALT; + + return USBD_OK; +} + +/** + * @brief Clears a Stall condition on an endpoint of the Low Level Driver. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + HAL_PCD_EP_ClrStall((PCD_HandleTypeDef*)pdev->pData, ep_addr); + + /* clear the halt feature */ + USB_CONTROLLER_STATE* state; + state = (USB_CONTROLLER_STATE*)pdev->pUserData; + state->EndpointStatus[ep_addr & 0xFC] &= ~USB_STATUS_ENDPOINT_HALT; + + return USBD_OK; +} + +/** + * @brief Returns Stall condition. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @retval Stall (1: Yes, 0: No) + */ +uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*)pdev->pData; + + if((ep_addr & 0x80) == 0x80) + { + return hpcd->IN_ep[ep_addr & 0x7F].is_stall; + } + else + { + return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; + } +} + +/** + * @brief Assigns a USB address to the device. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) +{ + HAL_PCD_SetAddress((PCD_HandleTypeDef*)pdev->pData, dev_addr); + return USBD_OK; +} + +/** + * @brief Transmits data over an endpoint. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @param pbuf: Pointer to data to be sent + * @param size: Data size + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, + uint8_t ep_addr, + uint8_t *pbuf, + uint16_t size) +{ + HAL_PCD_EP_Transmit((PCD_HandleTypeDef*)pdev->pData, ep_addr, pbuf, size); + return USBD_OK; +} + +/** + * @brief Prepares an endpoint for reception. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @param pbuf: Pointer to data to be received + * @param size: Data size + * @retval USBD Status + */ +USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, + uint8_t ep_addr, + uint8_t *pbuf, + uint16_t size) +{ + HAL_PCD_EP_Receive((PCD_HandleTypeDef*)pdev->pData, ep_addr, pbuf, size); + return USBD_OK; +} + +/** + * @brief Returns the last transfered packet size. + * @param pdev: Device handle + * @param ep_addr: Endpoint Number + * @retval Recived Data Size + */ +uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) +{ + return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*)pdev->pData, ep_addr); +} + +/** + * @brief Delays routine for the USB Device Library. + * @param Delay: Delay in ms + * @retval None + */ +void USBD_LL_Delay(uint32_t Delay) +{ + HAL_Delay(Delay); +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_conf.h b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_conf.h new file mode 100644 index 000000000..c9db0b2da --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_conf.h @@ -0,0 +1,101 @@ +/** + ****************************************************************************** + * @file USB_Device/CustomHID_Standalone/Inc/usbd_conf.h + * @author MCD Application Team + * @version V1.4.3 + * @date 29-January-2016 + * @brief General low level driver configuration + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USBD_CONF_H +#define __USBD_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include +#include +#include + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Common Config */ +#define USBD_MAX_NUM_INTERFACES 1 +#define USBD_MAX_NUM_CONFIGURATION 1 +#define USBD_MAX_STR_DESC_SIZ 0x100 +#define USBD_SUPPORT_USER_STRING 1 +#define USBD_SELF_POWERED 1 +#define USBD_DEBUG_LEVEL 0 + + +/* Exported macro ------------------------------------------------------------*/ +/* Memory management macros */ +#define USBD_malloc malloc +#define USBD_free free +#define USBD_memset memset +#define USBD_memcpy memcpy + +/* DEBUG macros */ +#if (USBD_DEBUG_LEVEL > 0) +#define USBD_UsrLog(...) printf(__VA_ARGS__);\ + printf("\n"); +#else +#define USBD_UsrLog(...) +#endif + +#if (USBD_DEBUG_LEVEL > 1) + +#define USBD_ErrLog(...) printf("ERROR: ") ;\ + printf(__VA_ARGS__);\ + printf("\n"); +#else +#define USBD_ErrLog(...) +#endif + +#if (USBD_DEBUG_LEVEL > 2) +#define USBD_DbgLog(...) printf("DEBUG : ") ;\ + printf(__VA_ARGS__);\ + printf("\n"); +#else +#define USBD_DbgLog(...) +#endif + + + +#ifdef DEBUG +#define _ASSERT(x) ASSERT(x) +#else +#define _ASSERT(x) +#endif + + +/* Exported functions ------------------------------------------------------- */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USBD_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_desc.cpp b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_desc.cpp new file mode 100644 index 000000000..16fd271bd --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_desc.cpp @@ -0,0 +1,265 @@ +/** + ****************************************************************************** + * @file USB_Device/CustomHID_Standalone/Src/usbd_desc.c + * @author MCD Application Team + * @version V1.4.3 + * @date 29-January-2016 + * @brief This file provides the USBD descriptors and string formating method. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include + +#include "usbd_core.h" +#include "usbd_desc.h" +#include "usbd_conf.h" +#include "usbd_winusb.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ + +/* Private macro -------------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +uint8_t *USBD_WINUSB_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t *USBD_WINUSB_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t *USBD_WINUSB_ManufacturerStrDescriptor (USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t *USBD_WINUSB_ProductStrDescriptor (USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t *USBD_WINUSB_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t *USBD_WINUSB_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t *USBD_WINUSB_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); +uint8_t *USBD_WINUSB_USRStringDesc (USBD_SpeedTypeDef speed, uint8_t idx, uint16_t *length); + + +/* Private variables ---------------------------------------------------------*/ +USBD_DescriptorsTypeDef WINUSB_Desc = { + USBD_WINUSB_DeviceDescriptor, + USBD_WINUSB_LangIDStrDescriptor, + USBD_WINUSB_ManufacturerStrDescriptor, + USBD_WINUSB_ProductStrDescriptor, + USBD_WINUSB_SerialStrDescriptor, + NULL, // don't need support for configuration descriptor + NULL // don't need support for interface descriptor +}; + +/* USB Standard Device Descriptor */ +const uint8_t USBD_DeviceDesc[USB_LEN_DEV_DESC] = { + 0x12, /* bLength */ + USB_DESC_TYPE_DEVICE, /* bDescriptorType */ + 0x00, /* bcdUSB */ + 0x02, + 0x00, /* bDeviceClass */ + 0x00, /* bDeviceSubClass */ + 0x00, /* bDeviceProtocol */ + USB_MAX_EP0_SIZE, /* bMaxPacketSize */ + LOBYTE(USBD_VID), /* idVendor */ + HIBYTE(USBD_VID), /* idVendor */ + LOBYTE(USBD_PID), /* idVendor */ + HIBYTE(USBD_PID), /* idVendor */ + 0x00, /* bcdDevice rel. 1.00 */ + 0x03, + USBD_IDX_MFC_STR, /* Index of manufacturer string */ + USBD_IDX_PRODUCT_STR, /* Index of product string */ + 0x00, /* Index of serial number string */ + USBD_MAX_NUM_CONFIGURATION /* bNumConfigurations */ +}; /* USB_DeviceDescriptor */ + +/* USB Standard Device Descriptor */ +const uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] = { + USB_LEN_LANGID_STR_DESC, + USB_DESC_TYPE_STRING, + LOBYTE(USBD_LANGID_STRING), + HIBYTE(USBD_LANGID_STRING), +}; + +uint8_t USBD_StringSerial[USB_SIZ_STRING_SERIAL] = +{ + USB_SIZ_STRING_SERIAL, + USB_DESC_TYPE_STRING, +}; + +#if defined ( __ICCARM__ ) /*!< IAR Compiler */ + #pragma data_alignment=4 +#endif +__ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; + + +/* Private functions ---------------------------------------------------------*/ +static void IntToUnicode (uint32_t value , uint8_t *pbuf , uint8_t len); +static void Get_SerialNum(void); + +/** + * @brief Returns the device descriptor. + * @param speed: Current device speed + * @param length: Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t *USBD_WINUSB_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + *length = sizeof(USBD_DeviceDesc); + return (uint8_t*)USBD_DeviceDesc; +} + +/** + * @brief Returns the LangID string descriptor. + * @param speed: Current device speed + * @param length: Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t *USBD_WINUSB_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + *length = sizeof(USBD_LangIDDesc); + return (uint8_t*)USBD_LangIDDesc; +} + +/** + * @brief Returns the product string descriptor. + * @param speed: Current device speed + * @param length: Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t *USBD_WINUSB_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + if(speed == 0) + { + USBD_GetString((uint8_t *)(uint8_t *)USBD_PRODUCT_HS_STRING, USBD_StrDesc, length); + } + else + { + USBD_GetString((uint8_t *)(uint8_t *)USBD_PRODUCT_FS_STRING, USBD_StrDesc, length); + } + return USBD_StrDesc; +} + +/** + * @brief Returns the manufacturer string descriptor. + * @param speed: Current device speed + * @param length: Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t *USBD_WINUSB_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + USBD_GetString((uint8_t *)(uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); + return USBD_StrDesc; +} + +/** + * @brief Returns the serial number string descriptor. + * @param speed: Current device speed + * @param length: Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t *USBD_WINUSB_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + *length = USB_SIZ_STRING_SERIAL; + + /* Update the serial number string descriptor with the data from the unique ID*/ + Get_SerialNum(); + + return (uint8_t*)USBD_StringSerial; +} + +/** + * @brief Returns the configuration string descriptor. + * @param speed: Current device speed + * @param length: Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t *USBD_WINUSB_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + if(speed == USBD_SPEED_HIGH) + { + USBD_GetString((uint8_t *)(uint8_t *)USBD_CONFIGURATION_HS_STRING, USBD_StrDesc, length); + } + else + { + USBD_GetString((uint8_t *)(uint8_t *)USBD_CONFIGURATION_FS_STRING, USBD_StrDesc, length); + } + return USBD_StrDesc; +} + +/** + * @brief Returns the interface string descriptor. + * @param speed: Current device speed + * @param length: Pointer to data length variable + * @retval Pointer to descriptor buffer + */ +uint8_t *USBD_WINUSB_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) +{ + if(speed == 0) + { + USBD_GetString((uint8_t *)(uint8_t *)USBD_INTERFACE_HS_STRING, USBD_StrDesc, length); + } + else + { + USBD_GetString((uint8_t *)(uint8_t *)USBD_INTERFACE_FS_STRING, USBD_StrDesc, length); + } + return USBD_StrDesc; +} + +/** + * @brief Create the serial number string descriptor + * @param None + * @retval None + */ +static void Get_SerialNum(void) +{ + uint32_t deviceserial0, deviceserial1, deviceserial2; + + deviceserial0 = *(uint32_t*)DEVICE_ID1; + deviceserial1 = *(uint32_t*)DEVICE_ID2; + deviceserial2 = *(uint32_t*)DEVICE_ID3; + + deviceserial0 += deviceserial2; + + if (deviceserial0 != 0) + { + IntToUnicode (deviceserial0, &USBD_StringSerial[2] ,8); + IntToUnicode (deviceserial1, &USBD_StringSerial[18] ,4); + } +} + +/** + * @brief Convert Hex 32Bits value into char + * @param value: value to convert + * @param pbuf: pointer to the buffer + * @param len: buffer length + * @retval None + */ +static void IntToUnicode (uint32_t value , uint8_t *pbuf , uint8_t len) +{ + uint8_t idx = 0; + + for( idx = 0; idx < len; idx ++) + { + if( ((value >> 28)) < 0xA ) + { + pbuf[ 2* idx] = (value >> 28) + '0'; + } + else + { + pbuf[2* idx] = (value >> 28) + 'A' - 10; + } + + value = value << 4; + + pbuf[ 2* idx + 1] = 0; + } +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_desc.h b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_desc.h new file mode 100644 index 000000000..08758707a --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_desc.h @@ -0,0 +1,75 @@ +/** + ****************************************************************************** + * @file USB_Device/HID_Standalone/Inc/usbd_desc.h + * @author MCD Application Team + * @version V1.4.3 + * @date 29-January-2016 + * @brief Header for usbd_desc.c module + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USBD_DESC_H +#define __USBD_DESC_H + +/* Includes ------------------------------------------------------------------*/ +#include "usbd_def.h" +#include "usbd_winusb.h" + +// definition @ 'solution'.settings +//#define USBD_VID 0x0483 +// definition @ 'solution'.settings +//#define USBD_PID 0xA08F +// definition @ 'solution'.settings +//#define USBD_MANUFACTURER_STRING "Microsoft OpenTech" +// definition @ 'solution'.settings +//#define USBD_PRODUCT_HS_STRING "STM32F4DISCOVERY" +// definition @ 'solution'.settings +//#define USBD_PRODUCT_FS_STRING "STM32F4DISCOVERY" + +#define USBD_LANGID_STRING 0x409 + +// not used +#define USBD_CONFIGURATION_HS_STRING "STM32F4DISCOVERY" +#define USBD_INTERFACE_HS_STRING "a7e70ea2" + +// not used +#define USBD_CONFIGURATION_FS_STRING "STM32F4DISCOVERY" +#define USBD_INTERFACE_FS_STRING "a7e70ea2" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +#define DEVICE_ID1 (0x1FFF7A10) +#define DEVICE_ID2 (0x1FFF7A14) +#define DEVICE_ID3 (0x1FFF7A18) + +#define USB_SIZ_STRING_SERIAL 0x1A +#define USB_DESCRIPTOR_MAX_PACKET_SIZE +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +extern USBD_DescriptorsTypeDef WINUSB_Desc; + +uint8_t *USBD_WINUSB_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + +#endif /* __USBD_DESC_H */ + + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_winusb.cpp b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_winusb.cpp new file mode 100644 index 000000000..4174adaf1 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_winusb.cpp @@ -0,0 +1,665 @@ + /** + ****************************************************************************** + * @file usbd_winusb.c + * @author MCD Application Team + * @version V2.4.2 + * @date 11-December-2015 + * @brief This file provides the HID core functions. + * + * @verbatim + * + * =================================================================== + * WINUSB Class Description + * =================================================================== + * + * + * + * + * + * + * @note In HS mode and when the DMA is used, all variables and data structures + * dealing with the DMA during the transaction process should be 32-bit aligned. + * + * + * @endverbatim + * + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2015 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + // https://msdn.microsoft.com/en-us/library/windows/hardware/hh450799(v=vs.85).aspx + + +/* Includes ------------------------------------------------------------------*/ +#include +#include + +#include "usbd_winusb.h" +#include "usbd_desc.h" +#include "usbd_ctlreq.h" + +uint8_t rxBuffer[80]; +uint8_t txBuffer[80]; + + +static uint8_t USBD_WINUSB_Init (USBD_HandleTypeDef *pdev, + uint8_t cfgidx); + +static uint8_t USBD_WINUSB_DeInit (USBD_HandleTypeDef *pdev, + uint8_t cfgidx); + +static uint8_t USBD_WINUSB_Setup (USBD_HandleTypeDef *pdev, + USBD_SetupReqTypedef *req); + +static uint8_t *USBD_WINUSB_GetCfgDesc (uint16_t *length); + +static uint8_t *USBD_WINUSB_GetDeviceQualifierDesc (uint16_t *length); + +static uint8_t USBD_WINUSB_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum); + +static uint8_t USBD_WINUSB_DataOut (USBD_HandleTypeDef *pdev, uint8_t epnum); + +static uint8_t USBD_WINUSB_EP0_RxReady (USBD_HandleTypeDef *pdev); + +static uint8_t USBD_WINUSB_EP0_TxReady (USBD_HandleTypeDef *pdev); + +static uint8_t USBD_WINUSB_SOF (USBD_HandleTypeDef *pdev); + +static uint8_t USBD_WINUSB_IsoINIncomplete (USBD_HandleTypeDef *pdev, uint8_t epnum); + +static uint8_t USBD_WINUSB_IsoOutIncomplete (USBD_HandleTypeDef *pdev, uint8_t epnum); + +static uint8_t *USBD_WINUSB_GetUsrStrDescriptor(struct _USBD_HandleTypeDef *pdev, uint8_t index, uint16_t *length); + +static uint8_t *USBD_WINUSB_OSStringDescriptor(USBD_SpeedTypeDef speed , uint16_t *length); +static uint8_t *USBD_WINUSB_ExtendedPropertiesOSFeatureDescriptor(USBD_SpeedTypeDef speed , uint16_t *length); +static uint8_t *USBD_WINUSB_ExtendedCompatIDOSDescriptor(USBD_SpeedTypeDef speed , uint16_t *length); +static uint8_t USBD_WINUSB_StandardRequest(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); +static uint8_t USBD_WINUSB_VendorRequest(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); +static uint8_t USBD_WINUSB_GetMSExtendedCompatIDOSDescriptor (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); +static uint8_t USBD_WINUSB_GetMSExtendedPropertiesOSDescriptor (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); +static uint8_t USBD_WINUSB_VendorRequestDevice(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); +static uint8_t USBD_WINUSB_VendorRequestInterface(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req); + +USBD_ClassTypeDef USBD_WINUSB = +{ + USBD_WINUSB_Init, + USBD_WINUSB_DeInit, + USBD_WINUSB_Setup, + USBD_WINUSB_EP0_TxReady, + USBD_WINUSB_EP0_RxReady, + USBD_WINUSB_DataIn, + USBD_WINUSB_DataOut, + NULL, // was USBD_WINUSB_SOF, + NULL, // was USBD_WINUSB_IsoINIncomplete, + NULL, // was USBD_WINUSB_IsoOutIncomplete, + USBD_WINUSB_GetCfgDesc, + USBD_WINUSB_GetCfgDesc, + USBD_WINUSB_GetCfgDesc, + USBD_WINUSB_GetDeviceQualifierDesc, + USBD_WINUSB_GetUsrStrDescriptor, +}; + +/* USB WINUSB device Configuration Descriptor */ +const uint8_t USBD_WINUSB_CfgDesc[USB_WINUSB_CONFIG_DESC_SIZ]= +{ + 0x09, /* bLength: Configuation Descriptor size */ + USB_DESC_TYPE_CONFIGURATION, /* bDescriptorType: Configuration */ + USB_WINUSB_CONFIG_DESC_SIZ, /* wTotalLength: Bytes returned */ + 0x00, + 0x01, /*bNumInterfaces: 1 interface*/ + 0x01, /*bConfigurationValue: Configuration value*/ + 0x00, /*iConfiguration: Index of string descriptor describing the configuration*/ + 0xE0, /*bmAttributes: bus powered and Supports Remote Wakeup */ + 0x32, /*MaxPower 100 mA: this current is used for detecting Vbus*/ + + // Interface 0 descriptor + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x00, /* bAlternateSetting: Alternate setting */ + 0x02, /* bNumEndpoints*/ + 0xFF, /* bInterfaceClass: Vendor Class */ + 0x01, /* bInterfaceSubClass : none*/ + 0x01, /* nInterfaceProtocol */ + 0x00, /* iInterface: */ + + // Endpoint 1 descriptor + 0x07, /*Endpoint descriptor length = 7*/ + 0x05, /*Endpoint descriptor type */ + WINUSB_EPIN_ADDR, /*Endpoint address (IN, address 1) */ + 0x02, /*Bulk endpoint type */ + LOBYTE(WINUSB_MAX_FS_PACKET), + HIBYTE(WINUSB_MAX_FS_PACKET), + 0x00, /*Polling interval in milliseconds */ + + // Endpoint 2 descriptor + 0x07, /*Endpoint descriptor length = 7*/ + 0x05, /*Endpoint descriptor type */ + WINUSB_EPOUT_ADDR, /*Endpoint address (OUT, address 1) */ + 0x02, /*Bulk endpoint type */ + LOBYTE(WINUSB_MAX_FS_PACKET), + HIBYTE(WINUSB_MAX_FS_PACKET), + 0x00, /*Polling interval in milliseconds */ +}; + +/* USB Standard Device Descriptor */ +const uint8_t USBD_WINUSB_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC]= +{ + USB_LEN_DEV_QUALIFIER_DESC, + USB_DESC_TYPE_DEVICE_QUALIFIER, + 0x00, + 0x02, + 0x00, + 0x00, + 0x00, + 0x40, + 0x01, + 0x00, +}; + +// Microsoft OS descriptor +const WINUSB_OSStringDescStruct USBD_WINUSB_OS_String_Descriptor= +{ + sizeof(USBD_WINUSB_OS_String_Descriptor), + USB_DESC_TYPE_STRING, + // this is the Unicode representation of "MSFT100" which can't be used here as a string because it would include the terminator thus overflowing the expected 14 bytes lenght + {0x4D, 0x00, 0x53, 0x00, 0x46, 0x00, 0x54, 0x00, 0x31, 0x00, 0x30, 0x00, 0x30, 0x00}, + OS_DESCRIPTOR_STRING_VENDOR_CODE, + 0 +}; + +const WINUSB_ExtendedCompatIDOSDescStruct USBD_WINUSB_Extended_Compat_ID_OS_Descriptor= +{ + // Header + sizeof(USBD_WINUSB_Extended_Compat_ID_OS_Descriptor), + OS_DESCRIPTOR_EX_VERSION, + USB_XCOMPATIBLE_OS_REQUEST, + 0x01, + {0}, + + // Section 1 + { + 0, + 0, + "WINUSB", + {0}, + {0}, + }, +}; + +// Extended properties descriptior +const WINUSB_ExtendedPropertiesDescStruct USBD_WINUSB_Extended_Properties_OS_Feature_Descriptor = +{ + // Header + sizeof(USBD_WINUSB_Extended_Properties_OS_Feature_Descriptor), + OS_DESCRIPTOR_EX_VERSION, + USB_XPROPERTY_OS_REQUEST, + 0x1, + + // Section 1 + { + sizeof(USBD_WINUSB_Extended_Properties_OS_Feature_Descriptor.propertySection1), //0x84, + EX_PROPERTY_DATA_TYPE__REG_SZ, + sizeof(USBD_WINUSB_Extended_Properties_OS_Feature_Descriptor.propertySection1.bPropertyName), //0x28, + L"DeviceInterfaceGuid", + sizeof(USBD_WINUSB_Extended_Properties_OS_Feature_Descriptor.propertySection1.bPropertyData), //0x4E, + WINUSB_DEVICE_INTERFACE_GUID, + }, +}; + +/** + * @brief USBD_WINUSB_Init + * Initialize the WINUSB interface + * @param pdev: device instance + * @param cfgidx: Configuration index + * @retval status + */ +static uint8_t USBD_WINUSB_Init (USBD_HandleTypeDef *pdev, + uint8_t cfgidx) +{ + uint8_t ret = 0; + + USBD_LL_FlushEP(pdev, WINUSB_EPOUT_ADDR); + USBD_LL_FlushEP(pdev, WINUSB_EPIN_ADDR); + + /* Open EP OUT */ + USBD_LL_OpenEP(pdev, + WINUSB_EPOUT_ADDR, + USBD_EP_TYPE_BULK, + WINUSB_MAX_FS_PACKET); + + /* Open EP IN */ + USBD_LL_OpenEP(pdev, + WINUSB_EPIN_ADDR, + USBD_EP_TYPE_BULK, + WINUSB_MAX_FS_PACKET); + + /* Prepare Out endpoint to receive next packet */ + USBD_LL_PrepareReceive(pdev, + WINUSB_EPOUT_ADDR, + &rxBuffer[0], + WINUSB_MAX_FS_PACKET); + + return ret; +} + +/** + * @brief USBD_WINUSB_Init + * DeInitialize the WINUSB layer + * @param pdev: device instance + * @param cfgidx: Configuration index + * @retval status + */ +static uint8_t USBD_WINUSB_DeInit (USBD_HandleTypeDef *pdev, + uint8_t cfgidx) +{ + // close end points/ + USBD_LL_CloseEP(pdev, WINUSB_EPOUT_ADDR); + USBD_LL_CloseEP(pdev, WINUSB_EPIN_ADDR); + + // free class + pdev->pClassData = NULL; + + return USBD_OK; +} + +/** + * @brief USBD_WINUSB_Setup + * Handle the WINUSB specific requests + * @param pdev: instance + * @param req: usb requests + * @retval status + */ +static uint8_t USBD_WINUSB_Setup (USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) +{ + switch (req->bmRequest & USB_REQ_TYPE_MASK) + { + case USB_REQ_TYPE_CLASS : + break; + + case USB_REQ_TYPE_STANDARD: + return USBD_WINUSB_StandardRequest(pdev, req); + + case USB_REQ_TYPE_VENDOR: + return USBD_WINUSB_VendorRequest(pdev, req); + + default: + USBD_CtlError (pdev, req); + return USBD_FAIL; + } + + return USBD_OK; +} + + +/** + * @brief USBD_WINUSB_GetCfgDesc + * return configuration descriptor + * @param length : pointer data length + * @retval pointer to descriptor buffer + */ +static uint8_t *USBD_WINUSB_GetCfgDesc (uint16_t *length) +{ + *length = sizeof (USBD_WINUSB_CfgDesc); + return (uint8_t*)USBD_WINUSB_CfgDesc; +} + +/** +* @brief DeviceQualifierDescriptor +* return Device Qualifier descriptor +* @param length : pointer data length +* @retval pointer to descriptor buffer +*/ +uint8_t *USBD_WINUSB_DeviceQualifierDescriptor (uint16_t *length) +{ + *length = sizeof (USBD_WINUSB_DeviceQualifierDesc); + return (uint8_t*)USBD_WINUSB_DeviceQualifierDesc; +} + + +/** + * @brief USBD_WINUSB_DataIn + * handle data IN Stage + * @param pdev: device instance + * @param epnum: endpoint index + * @retval status + */ +static uint8_t USBD_WINUSB_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum) +{ + USB_CONTROLLER_STATE* state = (USB_CONTROLLER_STATE*)pdev->pUserData; + + if(epnum == 1) + { + // Tx data endpoint + USB_PACKET64* usbPacket = USB_TxDequeue(state, epnum, TRUE); + + if(usbPacket) + { + // data to send + // Transmit next packet + + // copy data to be transmitted from USB packet struct to tx buffer + memcpy(&txBuffer[0], usbPacket->Buffer, usbPacket->Size); + + USBD_LL_Transmit(pdev, WINUSB_EPIN_ADDR, &txBuffer[0], usbPacket->Size); + // USB_Debug( 's' ); + } + + } + + return USBD_OK; +} + +/** + * @brief USBD_WINUSB_EP0_RxReady + * handle EP0 Rx Ready event + * @param pdev: device instance + * @retval status + */ +static uint8_t USBD_WINUSB_EP0_RxReady (USBD_HandleTypeDef *pdev) +{ + return USBD_OK; +} + +/** + * @brief USBD_WINUSB_EP0_TxReady + * handle EP0 TRx Ready event + * @param pdev: device instance + * @retval status + */ +static uint8_t USBD_WINUSB_EP0_TxReady(USBD_HandleTypeDef *pdev) +{ + return USBD_OK; +} +/** + * @brief USBD_WINUSB_SOF + * handle SOF event + * @param pdev: device instance + * @retval status + */ +static uint8_t USBD_WINUSB_SOF (USBD_HandleTypeDef *pdev) +{ + + return USBD_OK; +} +/** + * @brief USBD_WINUSB_IsoINIncomplete + * handle data ISO IN Incomplete event + * @param pdev: device instance + * @param epnum: endpoint index + * @retval status + */ +static uint8_t USBD_WINUSB_IsoINIncomplete (USBD_HandleTypeDef *pdev, uint8_t epnum) +{ + + return USBD_OK; +} +/** + * @brief USBD_WINUSB_IsoOutIncomplete + * handle data ISO OUT Incomplete event + * @param pdev: device instance + * @param epnum: endpoint index + * @retval status + */ +static uint8_t USBD_WINUSB_IsoOutIncomplete (USBD_HandleTypeDef *pdev, uint8_t epnum) +{ + + return USBD_OK; +} +/** + * @brief USBD_WINUSB_DataOut + * handle data OUT Stage + * @param pdev: device instance + * @param epnum: endpoint index + * @retval status + */ +static uint8_t USBD_WINUSB_DataOut (USBD_HandleTypeDef *pdev, uint8_t epnum) +{ + USB_PACKET64* usbPacket; + USB_CONTROLLER_STATE* state; + state = (USB_CONTROLLER_STATE*)pdev->pUserData; + + if(epnum == 2) + { + // EP2 + + BOOL bufferIsFull; + usbPacket = USB_RxEnqueue(state, epnum, bufferIsFull); + + if(usbPacket == NULL) + { + // should not happen + //USB_Debug( '?' ); + //_ASSERT( 0 ); + } + + // get how many bytes are available in the buffer... + // ... and set USB packet size + usbPacket->Size = USBD_LL_GetRxDataSize (pdev , epnum); + + // copy received data to USB packet struct + memcpy(usbPacket->Buffer, &rxBuffer[0], usbPacket->Size); + + // prepare WINUSB_EPOUT_ADDR endpoint to receive next packet + USBD_LL_PrepareReceive(pdev, epnum, &rxBuffer[0], WINUSB_MAX_FS_PACKET); + } + + return USBD_OK; +} + +/** +* @brief DeviceQualifierDescriptor +* return Device Qualifier descriptor +* @param length : pointer data length +* @retval pointer to descriptor buffer +*/ +static uint8_t *USBD_WINUSB_GetDeviceQualifierDesc (uint16_t *length) +{ + *length = sizeof (USBD_WINUSB_DeviceQualifierDesc); + return (uint8_t*)USBD_WINUSB_DeviceQualifierDesc; +} + +/** +* @brief GetUsrStrDescriptor +* return non standard string descriptor +* @param pdev: device instance +* @param index : descriptor index +* @param length : pointer data length +* @retval pointer to descriptor buffer +*/ +static uint8_t * USBD_WINUSB_GetUsrStrDescriptor(struct _USBD_HandleTypeDef *pdev, uint8_t index, uint16_t *length) +{ + *length = 0; + + // MS OS String Descriptor is in index 0xEE + if (index == 0xEE) + { + *length = sizeof(USBD_WINUSB_OS_String_Descriptor); + return (uint8_t*)&USBD_WINUSB_OS_String_Descriptor; + } + return NULL; +} + + +static uint8_t *USBD_WINUSB_ExtendedPropertiesOSFeatureDescriptor(USBD_SpeedTypeDef speed , uint16_t *length) +{ + *length = sizeof(USBD_WINUSB_Extended_Properties_OS_Feature_Descriptor); + return (uint8_t*)&USBD_WINUSB_Extended_Properties_OS_Feature_Descriptor; +} + +static uint8_t *USBD_WINUSB_ExtendedCompatIDOSDescriptor(USBD_SpeedTypeDef speed , uint16_t *length) +{ + *length = sizeof(USBD_WINUSB_Extended_Compat_ID_OS_Descriptor); + return (uint8_t*)&USBD_WINUSB_Extended_Compat_ID_OS_Descriptor; +} + +static uint8_t USBD_WINUSB_StandardRequest(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) +{ + switch (req->bRequest) + { + case USB_REQ_GET_INTERFACE : + break; + + case USB_REQ_SET_INTERFACE : + break; + + case USB_REQ_CLEAR_FEATURE: + + /* Flush the FIFO and Clear the stall status */ + USBD_LL_FlushEP(pdev, (uint8_t)req->wIndex); + + /* Re-activate the EP */ + USBD_LL_CloseEP (pdev , (uint8_t)req->wIndex); + if((((uint8_t)req->wIndex) & 0x80) == 0x80) + { + /* Open EP IN */ + USBD_LL_OpenEP(pdev, WINUSB_EPIN_ADDR, USBD_EP_TYPE_BULK, WINUSB_MAX_FS_PACKET); + } + else + { + /* Open EP OUT */ + USBD_LL_OpenEP(pdev, WINUSB_EPOUT_ADDR, USBD_EP_TYPE_BULK, WINUSB_MAX_FS_PACKET); + } + break; + + default: + USBD_CtlError(pdev , req); + return USBD_FAIL; + } + + return USBD_OK; +} + +static uint8_t USBD_WINUSB_VendorRequest(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) +{ + uint16_t len; + uint8_t *pbuf; + + switch ( req->bmRequest & USB_REQ_RECIPIENT_MASK ) + { + case USB_REQ_RECIPIENT_DEVICE: + if(req->bRequest == OS_DESCRIPTOR_STRING_VENDOR_CODE) + { + return USBD_WINUSB_GetMSExtendedCompatIDOSDescriptor(pdev, req); + } + else + { + return USBD_WINUSB_VendorRequestDevice(pdev, req); + } + break; + + case USB_REQ_RECIPIENT_INTERFACE: + if(req->bRequest == OS_DESCRIPTOR_STRING_VENDOR_CODE) + { + return USBD_WINUSB_GetMSExtendedPropertiesOSDescriptor(pdev, req); + } + else if(req->bRequest == USB_REQ_GET_DESCRIPTOR) + { + switch ((uint8_t)(req->wValue)) + { + case USBD_IDX_CONFIG_STR: + // NETMF specific + // sending the product string descriptor here + pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); + break; + + case USBD_IDX_INTERFACE_STR: + // NETMF specific + // sending the device serial number to have an unique ID for each connected device in MFDeploy and VStudio + pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); + break; + } + + if((len != 0)&& (req->wLength != 0)) + { + + len = MIN(len , req->wLength); + + USBD_CtlSendData (pdev, + pbuf, + len); + } + + return USBD_OK; + } + else + { + return USBD_WINUSB_VendorRequestInterface(pdev, req); + } + + case USB_REQ_RECIPIENT_ENDPOINT: + default: + break; + } + + USBD_CtlError(pdev , req); + return USBD_FAIL; +} + +static uint8_t USBD_WINUSB_VendorRequestDevice(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) +{ + USBD_CtlError(pdev , req); + return USBD_FAIL; +} + +static uint8_t USBD_WINUSB_VendorRequestInterface(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) +{ + return USBD_OK; +} + +static uint8_t USBD_WINUSB_GetMSExtendedCompatIDOSDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) +{ + switch (req->wIndex) + { + case 0x04: + USBD_CtlSendData (pdev, (uint8_t*)&USBD_WINUSB_Extended_Compat_ID_OS_Descriptor, req->wLength); + break; + default: + USBD_CtlError(pdev , req); + return USBD_FAIL; + } + return USBD_OK; +} + +static uint8_t USBD_WINUSB_GetMSExtendedPropertiesOSDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) +{ + uint8_t byInterfaceIndex = (uint8_t)req->wValue; + uint16_t len; + uint8_t *pbuf; + + if ( req->wIndex != 0x05 ) + { + USBD_CtlError(pdev , req); + return USBD_FAIL; + } + + switch ( byInterfaceIndex ) + { + case 0: + case 1: + USBD_CtlSendData (pdev, (uint8_t*)&USBD_WINUSB_Extended_Properties_OS_Feature_Descriptor, req->wLength); + break; + + default: + USBD_CtlError(pdev , req); + return USBD_FAIL; + } + + return USBD_OK; +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_winusb.h b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_winusb.h new file mode 100644 index 000000000..12a39927d --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/USB/usbd_winusb.h @@ -0,0 +1,222 @@ +/** + ****************************************************************************** + * @file usbd_WINUSB_core.h + * @author MCD Application Team + * @version V2.4.2 + * @date 11-December-2015 + * @brief Header file for the usbd_WINUSB_core.c file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2015 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_WINUSB_CORE_H +#define __USB_WINUSB_CORE_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "usbd_ioreq.h" + +/** @addtogroup STM32_USB_DEVICE_LIBRARY + * @{ + */ + +/** @defgroup USBD_WINUSB + * @brief This file is the header file for usbd_WINUSB_core.c + * @{ + */ + + +/** @defgroup USBD_WINUSB_Exported_Defines + * @{ + */ +#define WINUSB_EPIN_ADDR 0x81 +//#define WINUSB_EPIN_SIZE 0x10 + +#define WINUSB_EPOUT_ADDR 0x02 +//#define WINUSB_EPOUT_SIZE 0x10 + +#define USB_WINUSB_CONFIG_DESC_SIZ (9 + 9 + 7 + 7) + +#define WINUSB_MAX_FS_PACKET 0x40 +#define WINUSB_MAX_HS_PACKET 0x40 + +// interface GUID supported by this device +#define WINUSB_DEVICE_INTERFACE_GUID L"{D32D1D64-963D-463E-874A-8EC8C8082CBF}" + +// dwPropertyDataType +#define EX_PROPERTY_DATA_TYPE__RESERVED 0 +#define EX_PROPERTY_DATA_TYPE__REG_SZ 1 +#define EX_PROPERTY_DATA_TYPE__REG_SZ_ENV 2 +#define EX_PROPERTY_DATA_TYPE__REG_BINARY 3 +#define EX_PROPERTY_DATA_TYPE__REG_DWORD_LITTLE_ENDIAN 4 +#define EX_PROPERTY_DATA_TYPE__REG_DWORD_BIG_ENDIAN 5 +#define EX_PROPERTY_DATA_TYPE__REG_LINK 6 +#define EX_PROPERTY_DATA_TYPE__REG_MULTI_SZ 7 + + +#define OS_DESCRIPTOR_STRING_VENDOR_CODE 0xA5 +#define OS_DESCRIPTOR_EX_VERSION 0x0100 +#define USB_XPROPERTY_OS_REQUEST 0x05 +#define USB_XCOMPATIBLE_OS_REQUEST 0x04 + +// these defines should be in usbd_def.h +//#define USB_REQ_GET_OS_FEATURE_DESCRIPTOR 0x20 + + +/** + * @} + */ + + +/** @defgroup USBD_CORE_Exported_TypesDefinitions + * @{ + */ + +//////////////////////////////////////////////////////////////////////////////////////////// +/* need to add pack pragma to the following structs with 1 byte width to force the compiler +to line up data without padding otherwise the USB descriptors won't be properly formed */ +//////////////////////////////////////////////////////////////////////////////////////////// + +// OS String Descriptor structure +// see https://msdn.microsoft.com/en-us/windows/hardware/gg463179.aspx +#pragma pack(push, 1) +typedef struct +{ + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t qwSignature[2*7]; + uint8_t bMS_VendorCode; + const uint8_t bPad; +} WINUSB_OSStringDescStruct; +#pragma pack (pop) + +// Extended Properties OS Feature Descriptor +// see https://msdn.microsoft.com/en-us/windows/hardware/gg463179.aspx +// see https://msdn.microsoft.com/en-us/library/windows/hardware/hh450799(v=vs.85).aspx +#pragma pack(push, 1) +typedef struct +{ + uint32_t dwSize; + uint32_t dwPropertyDataType; + uint16_t wPropertyNameLength; + // despite the spec calls for a variable lenght we can have a fixed size here + // because we need to set this to 'DeviceInterfaceGUID' + wchar_t bPropertyName[sizeof("DeviceInterfaceGUID")]; + uint32_t dwPropertyDataLength; + // despite the spec calls for a variable lenght we can have a fixed size here + // because we need to set this to a GUID such as '{8FE6D4D7-49DD-41E7-9486-49AFC6BFE475}' + wchar_t bPropertyData[sizeof("{8FE6D4D7-49DD-41E7-9486-49AFC6BFE475}")]; + +} WINUSB_CustomPropertySectionStruct; +#pragma pack (pop) + +#pragma pack(push, 1) +typedef struct +{ + // Header + uint32_t dwLength; + uint16_t bcdVersion; + uint16_t wIndex; + uint16_t wCount; + + // Custom Property Sections + // Section 1 + WINUSB_CustomPropertySectionStruct propertySection1; + +} WINUSB_ExtendedPropertiesDescStruct; +#pragma pack (pop) + +#pragma pack(push, 1) +typedef struct +{ + uint8_t bFirstInterfaceNumber; + uint8_t reserved1; + uint8_t compatibleID[8]; + uint8_t subCompatibleID[8]; + uint8_t reserved2[6]; + +} WINUSB_CompatIDFunctionStruct; + +#pragma pack(push, 1) +typedef struct +{ + // Header + uint32_t dwLength; + uint16_t bcdVersion; + uint16_t wIndex; + uint8_t bCount; + uint8_t bReserved[7]; + + // Funcion sections + // Section 1 + WINUSB_CompatIDFunctionStruct section1; + +} WINUSB_ExtendedCompatIDOSDescStruct; +#pragma pack (pop) + +/** + * @} + */ + + + +/** @defgroup USBD_CORE_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup USBD_CORE_Exported_Variables + * @{ + */ + +extern USBD_ClassTypeDef USBD_WINUSB; +#define USBD_WINUSB_CLASS &USBD_WINUSB +/** + * @} + */ + +/** @defgroup USB_CORE_Exported_Functions + * @{ + */ +/** + * @} + */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __USB_WINUSB_CORE_H */ +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/DeviceCode/Targets/Native/STM32F4xx/dotNetMF.proj b/DeviceCode/Targets/Native/STM32F4xx/dotNetMF.proj new file mode 100644 index 000000000..5ea33e1e8 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/dotNetMF.proj @@ -0,0 +1,221 @@ + + + + TinyHAL_STM32F4xx + {49A36823-B4BC-439C-9223-E5395314A422} + + + STM32F4xx HAL library + HAL + TinyHAL_STM32F4xx.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\dotNetMF.proj + TinyHAL_STM32F4xx.$(LIB_EXT).manifest + HAL + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx + false + 4.0.0.0 + + + + + + + Library + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/dotNetMF_loader.proj b/DeviceCode/Targets/Native/STM32F4xx/dotNetMF_loader.proj new file mode 100644 index 000000000..d96af7f34 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/dotNetMF_loader.proj @@ -0,0 +1,218 @@ + + + + TinyHal_loader_STM32F4xx + {004F0043-0024-0097-95A3-64C26394C72A} + + + STM32F4xx HAL library (for boot loaders) + HAL + TinyHAL_loader_STM32F4xx.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\Targets\Native\STM32F4xx\dotNetMF_loader.proj + TinyHAL_loader_STM32F4xx.$(LIB_EXT).manifest + HAL + + + False + + + False + False + False + DeviceCode\Targets\Native\STM32F4xx + true + false + 4.0.0.0 + + + + + Library + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DeviceCode/Targets/Native/STM32F4xx/processor_selector.h b/DeviceCode/Targets/Native/STM32F4xx/processor_selector.h new file mode 100644 index 000000000..a9de7c5a3 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/processor_selector.h @@ -0,0 +1,110 @@ +///////////////////////////////////////////////////////////////////////////////////////////// +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 +// +// Copyright (c) Microsoft Corporation. All rights reserved. +// Implementation for STM32F4: Copyright (c) Oberon microsystems, Inc. +// +// STM32F2/F4 specific definitions +// +///////////////////////////////////////////////////////////////////////////////////////////// + + +#ifndef _STM32F4_PROCESSOR_SELECTOR_H_ +#define _STM32F4_PROCESSOR_SELECTOR_H_ 1 + +#define PLATFORM_ARM_DEFINED + +// #if defined(PLATFORM_ARM_STM32F2) +// #define STM32F2XX +// #elif defined(PLATFORM_ARM_STM32F4) +// #define STM32F4XX +// #else +// ERROR - WE SHOULD NOT INCLUDE THIS HEADER IF NOT BUILDING AN STM32F2/F4 PLATFORM + +///////////////////////////////////////////////////////// +// +// macros +// + +#define GLOBAL_LOCK(x) SmartPtr_IRQ x +#define DISABLE_INTERRUPTS() SmartPtr_IRQ::ForceDisabled() +#define ENABLE_INTERRUPTS() SmartPtr_IRQ::ForceEnabled() +#define INTERRUPTS_ENABLED_STATE() SmartPtr_IRQ::GetState() +#define GLOBAL_LOCK_SOCKETS(x) SmartPtr_IRQ x + +#if defined(_DEBUG) +#define ASSERT_IRQ_MUST_BE_OFF() /*ASSERT(!SmartPtr_IRQ::GetState())*/ +#define ASSERT_IRQ_MUST_BE_ON() /*ASSERT( SmartPtr_IRQ::GetState())*/ +#else +#define ASSERT_IRQ_MUST_BE_OFF() +#define ASSERT_IRQ_MUST_BE_ON() +#endif + + +#define INTERRUPT_START SystemState_SetNoLock( SYSTEM_STATE_ISR ); \ + SystemState_SetNoLock( SYSTEM_STATE_NO_CONTINUATIONS ); +#define INTERRUPT_END SystemState_ClearNoLock( SYSTEM_STATE_NO_CONTINUATIONS ); \ + SystemState_ClearNoLock( SYSTEM_STATE_ISR ); + + +// +// macros +// +///////////////////////////////////////////////////////// + +///////////////////////////////////////////////////////// +// communicaiton facilities +// + +// Port definitions +#ifndef ITM_GENERIC_PORTNUM +#define ITM_GENERIC_PORTNUM 0 +#endif + +#define ITM0 ConvertCOM_GenericHandle( ITM_GENERIC_PORTNUM ) +#define COM1 ConvertCOM_ComHandle(0) +#define COM2 ConvertCOM_ComHandle(1) +#define COM3 ConvertCOM_ComHandle(2) +#define COM4 ConvertCOM_ComHandle(3) +#define COM5 ConvertCOM_ComHandle(4) +#define COM6 ConvertCOM_ComHandle(5) + +#define USB1 ConvertCOM_UsbHandle(0) +#define USB2 ConvertCOM_UsbHandle(1) + +#define TOTAL_DEBUG_PORT 1 +#define COM_DEBUG ConvertCOM_DebugHandle(0) + +#define COM_MESSAGING ConvertCOM_MessagingHandle(0) + +#define USART_TX_IRQ_INDEX(x) 6 // dummy index (EXTI0, always on) +#define USB_IRQ_INDEX 6 // dummy index (EXTI0, always on) + + +#define PLATFORM_DEPENDENT_TX_USART_BUFFER_SIZE 256 // there is one TX for each usart port +#define PLATFORM_DEPENDENT_RX_USART_BUFFER_SIZE 256 // there is one RX for each usart port +#define PLATFORM_DEPENDENT_USB_QUEUE_PACKET_COUNT 8 // there is one queue for each pipe of each endpoint and the size of a single packet is sizeof(USB_PACKET64) == 68 bytes + +// +// communicaiton facilities +///////////////////////////////////////////////////////// + +///////////////////////////////////////////////////////// +// NVIC priorities + +#define USB_PRIORITY 10 + +#define USART1_PRIORITY 12 +#define USART2_PRIORITY 13 +#define USART3_PRIORITY 14 +#define USART4_PRIORITY 15 +#define USART6_PRIORITY 16 +#define USART7_PRIORITY 17 +#define USART8_PRIORITY 18 + +///////////////////////////////////////////////////////// + +#endif \ No newline at end of file diff --git a/DeviceCode/Targets/Native/STM32F4xx/stm32f4xx_hal_msp.c b/DeviceCode/Targets/Native/STM32F4xx/stm32f4xx_hal_msp.c new file mode 100644 index 000000000..d310bf8d6 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/stm32f4xx_hal_msp.c @@ -0,0 +1,104 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_msp.c + * @brief This file contains the HAL System and Peripheral (PPP) MSP initialization + * and de-initialization functions. Based in stm32f4xx_hal_msp_template.c V1.4.4 + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f4xx_hal.h" + +/** @addtogroup STM32F4xx_HAL_Driver + * @{ + */ + +/** @defgroup HAL_MSP HAL MSP + * @brief HAL MSP module. + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/** @defgroup HAL_MSP_Private_Functions HAL MSP Private Functions + * @{ + */ + +/** + * @brief Initializes the Global MSP. + * @note This function is called from HAL_Init() function to perform system + * level initialization (GPIOs, clock, DMA, interrupt). + * @retval None + */ +// defined as weak to allow it to be overriden by equivalent function at Solution level +__weak void HAL_MspInit(void) +{ + +} + +/** + * @brief DeInitializes the Global MSP. + * @note This functiona is called from HAL_DeInit() function to perform system + * level de-initialization (GPIOs, clock, DMA, interrupt). + * @retval None + */ +// defined as weak to allow it to be overriden by equivalent function at Solution level +__weak void HAL_MspDeInit(void) +{ + +} + +/** + * @brief Initializes the PPP MSP. + * @note This functiona is called from HAL_PPP_Init() function to perform + * peripheral(PPP) system level initialization (GPIOs, clock, DMA, interrupt) + * @retval None + */ +__weak void HAL_PPP_MspInit(void) +{ + +} + +/** + * @brief DeInitializes the PPP MSP. + * @note This functiona is called from HAL_PPP_DeInit() function to perform + * peripheral(PPP) system level de-initialization (GPIOs, clock, DMA, interrupt) + * @retval None + */ +// defined as weak to allow it to be overriden by equivalent function at Solution level +__weak void HAL_PPP_MspDeInit(void) +{ + +} diff --git a/DeviceCode/Targets/Native/STM32F4xx/system_stm32f4xx.c b/DeviceCode/Targets/Native/STM32F4xx/system_stm32f4xx.c new file mode 100644 index 000000000..843cd75f9 --- /dev/null +++ b/DeviceCode/Targets/Native/STM32F4xx/system_stm32f4xx.c @@ -0,0 +1,761 @@ +/** + ****************************************************************************** + * @file system_stm32f4xx.c + * @author MCD Application Team + * @version V2.4.3 + * @date 22-January-2016 + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f4xx_system + * @{ + */ + +/** @addtogroup STM32F4xx_System_Private_Includes + * @{ + */ + + +#include "stm32f4xx.h" + +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory */ +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\ + || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) +/* #define DATA_IN_ExtSRAM */ +#endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx */ + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) +/* #define DATA_IN_ExtSDRAM */ +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\ + STM32F479xx */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/******************************************************************************/ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Variables + * @{ + */ + /* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 16000000; +const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes + * @{ + */ + +#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the FPU setting, vector table location and External memory + * configuration. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x24003010; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + +#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ + + /* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value + * depends on the application requirements), user has to ensure that HSE_VALUE + * is same as the real frequency of the crystal used. Otherwise, this function + * may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N + SYSCLK = PLL_VCO / PLL_P + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; + pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; + + if (pllsource != 0) + { + /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + else + { + /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); + } + + pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; + SystemCoreClock = pllvco/pllp; + break; + default: + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK frequency --------------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK frequency */ + SystemCoreClock >>= tmp; +} + +#if defined (DATA_IN_ExtSRAM) && defined (DATA_IN_ExtSDRAM) +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\ + defined(STM32F469xx) || defined(STM32F479xx) +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f4xx.s before jump to main. + * This function configures the external memories (SRAM/SDRAM) + * This SRAM/SDRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmp = 0x00; + + register uint32_t tmpreg = 0, timeout = 0xFFFF; + register uint32_t index; + + /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface clock */ + RCC->AHB1ENR |= 0x000001F8; + + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN); + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x00CCC0CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A8A; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xFFFF0FCF; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00CC0CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA828A; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xFFFFC3CF; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0xCCCCCCCC; + GPIOF->AFR[1] = 0xCCCCCCCC; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA800AAA; + /* Configure PFx pins speed to 50 MHz */ + GPIOF->OSPEEDR = 0xAA800AAA; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0xCCCCCCCC; + GPIOG->AFR[1] = 0xCCCCCCCC; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0xAAAAAAAA; + /* Configure PGx pins speed to 50 MHz */ + GPIOG->OSPEEDR = 0xAAAAAAAA; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + + /* Connect PHx pins to FMC Alternate function */ + GPIOH->AFR[0] = 0x00C0CC00; + GPIOH->AFR[1] = 0xCCCCCCCC; + /* Configure PHx pins in Alternate function mode */ + GPIOH->MODER = 0xAAAA08A0; + /* Configure PHx pins speed to 50 MHz */ + GPIOH->OSPEEDR = 0xAAAA08A0; + /* Configure PHx pins Output type to push-pull */ + GPIOH->OTYPER = 0x00000000; + /* No pull-up, pull-down for PHx pins */ + GPIOH->PUPDR = 0x00000000; + + /* Connect PIx pins to FMC Alternate function */ + GPIOI->AFR[0] = 0xCCCCCCCC; + GPIOI->AFR[1] = 0x00000CC0; + /* Configure PIx pins in Alternate function mode */ + GPIOI->MODER = 0x0028AAAA; + /* Configure PIx pins speed to 50 MHz */ + GPIOI->OSPEEDR = 0x0028AAAA; + /* Configure PIx pins Output type to push-pull */ + GPIOI->OTYPER = 0x00000000; + /* No pull-up, pull-down for PIx pins */ + GPIOI->PUPDR = 0x00000000; + +/*-- FMC Configuration -------------------------------------------------------*/ + /* Enable the FMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + + FMC_Bank5_6->SDCR[0] = 0x000019E4; + FMC_Bank5_6->SDTR[0] = 0x01115351; + + /* SDRAM initialization sequence */ + /* Clock enable command */ + FMC_Bank5_6->SDCMR = 0x00000011; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Delay */ + for (index = 0; index<1000; index++); + + /* PALL command */ + FMC_Bank5_6->SDCMR = 0x00000012; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Auto refresh command */ + FMC_Bank5_6->SDCMR = 0x00000073; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* MRD register program */ + FMC_Bank5_6->SDCMR = 0x00046014; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Set refresh count */ + tmpreg = FMC_Bank5_6->SDRTR; + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1)); + + /* Disable write protection */ + tmpreg = FMC_Bank5_6->SDCR[0]; + FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF); + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001011; + FMC_Bank1->BTCR[3] = 0x00000201; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ +#if defined(STM32F469xx) || defined(STM32F479xx) + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001091; + FMC_Bank1->BTCR[3] = 0x00110212; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F469xx || STM32F479xx */ + + (void)(tmp); +} +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ +#elif defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f4xx.s before jump to main. + * This function configures the external memories (SRAM/SDRAM) + * This SRAM/SDRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmp = 0x00; +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) +#if defined (DATA_IN_ExtSDRAM) + register uint32_t tmpreg = 0, timeout = 0xFFFF; + register uint32_t index; + +#if defined(STM32F446xx) + /* Enable GPIOA, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG interface + clock */ + RCC->AHB1ENR |= 0x0000007D; +#else + /* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface + clock */ + RCC->AHB1ENR |= 0x000001F8; +#endif /* STM32F446xx */ + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOCEN); + +#if defined(STM32F446xx) + /* Connect PAx pins to FMC Alternate function */ + GPIOA->AFR[0] |= 0xC0000000; + GPIOA->AFR[1] |= 0x00000000; + /* Configure PDx pins in Alternate function mode */ + GPIOA->MODER |= 0x00008000; + /* Configure PDx pins speed to 50 MHz */ + GPIOA->OSPEEDR |= 0x00008000; + /* Configure PDx pins Output type to push-pull */ + GPIOA->OTYPER |= 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOA->PUPDR |= 0x00000000; + + /* Connect PCx pins to FMC Alternate function */ + GPIOC->AFR[0] |= 0x00CC0000; + GPIOC->AFR[1] |= 0x00000000; + /* Configure PDx pins in Alternate function mode */ + GPIOC->MODER |= 0x00000A00; + /* Configure PDx pins speed to 50 MHz */ + GPIOC->OSPEEDR |= 0x00000A00; + /* Configure PDx pins Output type to push-pull */ + GPIOC->OTYPER |= 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOC->PUPDR |= 0x00000000; +#endif /* STM32F446xx */ + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x000000CC; + GPIOD->AFR[1] = 0xCC000CCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xA02A000A; + /* Configure PDx pins speed to 50 MHz */ + GPIOD->OSPEEDR = 0xA02A000A; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00000CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA800A; + /* Configure PEx pins speed to 50 MHz */ + GPIOE->OSPEEDR = 0xAAAA800A; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0xCCCCCCCC; + GPIOF->AFR[1] = 0xCCCCCCCC; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA800AAA; + /* Configure PFx pins speed to 50 MHz */ + GPIOF->OSPEEDR = 0xAA800AAA; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0xCCCCCCCC; + GPIOG->AFR[1] = 0xCCCCCCCC; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0xAAAAAAAA; + /* Configure PGx pins speed to 50 MHz */ + GPIOG->OSPEEDR = 0xAAAAAAAA; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) + /* Connect PHx pins to FMC Alternate function */ + GPIOH->AFR[0] = 0x00C0CC00; + GPIOH->AFR[1] = 0xCCCCCCCC; + /* Configure PHx pins in Alternate function mode */ + GPIOH->MODER = 0xAAAA08A0; + /* Configure PHx pins speed to 50 MHz */ + GPIOH->OSPEEDR = 0xAAAA08A0; + /* Configure PHx pins Output type to push-pull */ + GPIOH->OTYPER = 0x00000000; + /* No pull-up, pull-down for PHx pins */ + GPIOH->PUPDR = 0x00000000; + + /* Connect PIx pins to FMC Alternate function */ + GPIOI->AFR[0] = 0xCCCCCCCC; + GPIOI->AFR[1] = 0x00000CC0; + /* Configure PIx pins in Alternate function mode */ + GPIOI->MODER = 0x0028AAAA; + /* Configure PIx pins speed to 50 MHz */ + GPIOI->OSPEEDR = 0x0028AAAA; + /* Configure PIx pins Output type to push-pull */ + GPIOI->OTYPER = 0x00000000; + /* No pull-up, pull-down for PIx pins */ + GPIOI->PUPDR = 0x00000000; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ + +/*-- FMC Configuration -------------------------------------------------------*/ + /* Enable the FMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + + /* Configure and enable SDRAM bank1 */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCR[0] = 0x00001954; +#else + FMC_Bank5_6->SDCR[0] = 0x000019E4; +#endif /* STM32F446xx */ + FMC_Bank5_6->SDTR[0] = 0x01115351; + + /* SDRAM initialization sequence */ + /* Clock enable command */ + FMC_Bank5_6->SDCMR = 0x00000011; + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Delay */ + for (index = 0; index<1000; index++); + + /* PALL command */ + FMC_Bank5_6->SDCMR = 0x00000012; + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Auto refresh command */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCMR = 0x000000F3; +#else + FMC_Bank5_6->SDCMR = 0x00000073; +#endif /* STM32F446xx */ + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* MRD register program */ +#if defined(STM32F446xx) + FMC_Bank5_6->SDCMR = 0x00044014; +#else + FMC_Bank5_6->SDCMR = 0x00046014; +#endif /* STM32F446xx */ + timeout = 0xFFFF; + while((tmpreg != 0) && (timeout-- > 0)) + { + tmpreg = FMC_Bank5_6->SDSR & 0x00000020; + } + + /* Set refresh count */ + tmpreg = FMC_Bank5_6->SDRTR; +#if defined(STM32F446xx) + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000050C<<1)); +#else + FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1)); +#endif /* STM32F446xx */ + + /* Disable write protection */ + tmpreg = FMC_Bank5_6->SDCR[0]; + FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF); +#endif /* DATA_IN_ExtSDRAM */ +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ + +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\ + || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\ + || defined(STM32F469xx) || defined(STM32F479xx) + +#if defined(DATA_IN_ExtSRAM) +/*-- GPIOs Configuration -----------------------------------------------------*/ + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHB1ENR |= 0x00000078; + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN); + + /* Connect PDx pins to FMC Alternate function */ + GPIOD->AFR[0] = 0x00CCC0CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A8A; + /* Configure PDx pins speed to 100 MHz */ + GPIOD->OSPEEDR = 0xFFFF0FCF; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FMC Alternate function */ + GPIOE->AFR[0] = 0xC00CC0CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA828A; + /* Configure PEx pins speed to 100 MHz */ + GPIOE->OSPEEDR = 0xFFFFC3CF; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FMC Alternate function */ + GPIOF->AFR[0] = 0x00CCCCCC; + GPIOF->AFR[1] = 0xCCCC0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA000AAA; + /* Configure PFx pins speed to 100 MHz */ + GPIOF->OSPEEDR = 0xFF000FFF; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FMC Alternate function */ + GPIOG->AFR[0] = 0x00CCCCCC; + GPIOG->AFR[1] = 0x000000C0; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00085AAA; + /* Configure PGx pins speed to 100 MHz */ + GPIOG->OSPEEDR = 0x000CAFFF; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FMC/FSMC Configuration --------------------------------------------------*/ + /* Enable the FMC/FSMC interface clock */ + RCC->AHB3ENR |= 0x00000001; + +#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001011; + FMC_Bank1->BTCR[3] = 0x00000201; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ +#if defined(STM32F469xx) || defined(STM32F479xx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN); + /* Configure and enable Bank1_SRAM2 */ + FMC_Bank1->BTCR[2] = 0x00001091; + FMC_Bank1->BTCR[3] = 0x00110212; + FMC_Bank1E->BWTR[2] = 0x0fffffff; +#endif /* STM32F469xx || STM32F479xx */ +#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx) + /* Delay after an RCC peripheral clock enabling */ + tmp = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FSMCEN); + /* Configure and enable Bank1_SRAM2 */ + FSMC_Bank1->BTCR[2] = 0x00001011; + FSMC_Bank1->BTCR[3] = 0x00000201; + FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF; +#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ + +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\ + STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */ + (void)(tmp); +} +#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/DeviceCode/Targets/OS/CMSIS_RTOS/CMSIS_RTOS.settings b/DeviceCode/Targets/OS/CMSIS_RTOS/CMSIS_RTOS.settings index cd7350d15..65dd7b457 100644 --- a/DeviceCode/Targets/OS/CMSIS_RTOS/CMSIS_RTOS.settings +++ b/DeviceCode/Targets/OS/CMSIS_RTOS/CMSIS_RTOS.settings @@ -1,4 +1,5 @@ - + + CMSIS_RTOS Thumb2 @@ -15,11 +16,12 @@ CMSIS_RTOS OS false - 4.3.0 + 4.5.0 + diff --git a/DeviceCode/Targets/OS/CMSIS_RTOS/cmsis_os_cpp.h b/DeviceCode/Targets/OS/CMSIS_RTOS/cmsis_os_cpp.h index d6a28c5b9..475c5651f 100644 --- a/DeviceCode/Targets/OS/CMSIS_RTOS/cmsis_os_cpp.h +++ b/DeviceCode/Targets/OS/CMSIS_RTOS/cmsis_os_cpp.h @@ -9,14 +9,14 @@ #error "Unsupported CMSIS version: This header requires a CMSIS-RTOS API implementation with at least version 1.2" #endif -#if !defined(osCMSIS_RTX) || osCMSIS_RTX != CMSIS_VERSION(4, 78) +#if !defined(osCMSIS_RTX) || osCMSIS_RTX != CMSIS_VERSION(4, 80) // unfortunately the implementation of the osXxxxDef and other similar macros // are implementation defined and, at least for CMSIS-RTX cannot be used to // declare a C++ data member. Thus, this header is specific to a particular // version of CMSIS-RTX and requires re-evaluation and verification on any // other versions. The structures can and have changed even on minor version // changes, so the check here is for an exact match on the supported version. -#error "Unsupported CMSIS-RTOS implementation: This header requires the CMSIS-RTX v4.78 implementation of the CMSIS-RTOS API" +#error "Unsupported CMSIS-RTOS implementation: This header requires the CMSIS-RTX v4.80 implementation of the CMSIS-RTOS API" #endif // The following two fields are culled from the CMSIS-RTX header implementation diff --git a/DeviceCode/include/SD_decl.h b/DeviceCode/include/SD_decl.h index b8779088c..ea730a05d 100644 --- a/DeviceCode/include/SD_decl.h +++ b/DeviceCode/include/SD_decl.h @@ -54,21 +54,21 @@ struct SD_BS_Driver #define OCR_BUSY_BIT 0x80000000 #define OCR_CCS_BIT 0x40000000 - #define SD_GO_IDLE_STATE 0x00 // CMD0 - #define SD_V2_SEND_OP_COND 0x01 // CMD1 - #define SD_SEND_IF_COND 0x08 // CMD8 - #define SD_SEND_CSD 0x09 // CMD9 - #define SD_SEND_CID 0x0A // CMD10 - #define SD_READ_SINGLE_BLOCK 0x11 // CMD17 - #define SD_SET_BLOCKLEN 0x10 // CMD16 - #define SD_WRITE_SINGLE_BLOCK 0x18 // CMD24 - #define SD_ERASE_WR_BLK_START 0x20 // CMD32 - #define SD_ERASE_WR_BLK_END 0x21 // CMD33 - #define SD_ERASE 0x26 // CMD38 - #define SD_APP_CMD 0x37 // CMD55 - #define SD_SEND_OP_COND 0x29 // ACMD41 - #define SD_SEND_SCR 0x33 // ACMD51 - #define SD_READ_OCR 58 // ACMD58 + #define SD_CMD_GO_IDLE_STATE 0x00 // CMD0 + #define SD_CMD_V2_SEND_OP_COND 0x01 // CMD1 + #define SD_CMD_SEND_IF_COND 0x08 // CMD8 + #define SD_CMD_SEND_CSD 0x09 // CMD9 + #define SD_CMD_SEND_CID 0x0A // CMD10 + #define SD_CMD_READ_SINGLE_BLOCK 0x11 // CMD17 + #define SD_CMD_SET_BLOCKLEN 0x10 // CMD16 + #define SD_CMD_WRITE_SINGLE_BLOCK 0x18 // CMD24 + #define SD_CMD_ERASE_WR_BLK_START 0x20 // CMD32 + #define SD_CMD_ERASE_WR_BLK_END 0x21 // CMD33 + #define SD_CMD_ERASE 0x26 // CMD38 + #define SD_CMD_APP_CMD 0x37 // CMD55 + #define SD_CMD_SEND_OP_COND 0x29 // ACMD41 + #define SD_CMD_SEND_SCR 0x33 // ACMD51 + #define SD_CMD_READ_OCR 58 // ACMD58 #define SD_START_DATA_BLOCK_TOKEN 0xfe diff --git a/DeviceCode/include/tinyhal.h b/DeviceCode/include/tinyhal.h index 12df2f1c7..e709ac1a0 100644 --- a/DeviceCode/include/tinyhal.h +++ b/DeviceCode/include/tinyhal.h @@ -399,7 +399,7 @@ struct HAL_SYSTEM_CONFIG COM_HANDLE stdio; HAL_SYSTEM_MEMORY_CONFIG RAM1; - HAL_SYSTEM_MEMORY_CONFIG FLASH; + HAL_SYSTEM_MEMORY_CONFIG FLASH1; //--// @@ -1268,7 +1268,7 @@ inline void HAL_Init_Custom_Heap() } -//--// +// //--// // hal cleanup for CLR reboot @@ -1521,6 +1521,22 @@ extern bool g_fDoNotUninitializeDebuggerPort; #include #include +//--// + +// HAL includes for CMSIS vendor implementations + +// STM32F4 series +#if defined STM32F405xx|| defined STM32F415xx|| defined STM32F407xx|| defined STM32F417xx|| \ + defined STM32F427xx|| defined STM32F437xx|| defined STM32F429xx|| defined STM32F439xx|| \ + defined STM32F401xC|| defined STM32F401xE|| defined STM32F410Tx|| defined STM32F410Cx|| \ + defined STM32F410Rx|| defined STM32F411xE|| defined STM32F446xx|| defined STM32F469xx|| \ + defined STM32F479xx + +#include "stm32f4xx_hal.h" + +#endif + + //--// #endif // _TINYHAL_H_ diff --git a/DeviceCode/pal/AsyncProcCall/stubs/async_stubs.cpp b/DeviceCode/pal/AsyncProcCall/stubs/async_stubs.cpp index 61e94b88e..32965e757 100644 --- a/DeviceCode/pal/AsyncProcCall/stubs/async_stubs.cpp +++ b/DeviceCode/pal/AsyncProcCall/stubs/async_stubs.cpp @@ -5,38 +5,38 @@ #include //--// // continuation list -void HAL_CONTINUATION::InitializeList() +__weak void HAL_CONTINUATION::InitializeList() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_CONTINUATION::Uninitialize() +__weak void HAL_CONTINUATION::Uninitialize() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_CONTINUATION::InitializeCallback( HAL_CALLBACK_FPN EntryPoint, void* Argument ) +__weak void HAL_CONTINUATION::InitializeCallback( HAL_CALLBACK_FPN EntryPoint, void* Argument ) { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_CONTINUATION::Enqueue() +__weak void HAL_CONTINUATION::Enqueue() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_CONTINUATION::Abort () +__weak void HAL_CONTINUATION::Abort () { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -BOOL HAL_CONTINUATION::Dequeue_And_Execute() +__weak BOOL HAL_CONTINUATION::Dequeue_And_Execute() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); return TRUE; } -bool HAL_CONTINUATION::IsLinked() +__weak bool HAL_CONTINUATION::IsLinked() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); return false; @@ -44,41 +44,41 @@ bool HAL_CONTINUATION::IsLinked() //-// // completion list -void HAL_COMPLETION::InitializeList() +__weak void HAL_COMPLETION::InitializeList() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_COMPLETION::Uninitialize() +__weak void HAL_COMPLETION::Uninitialize() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_COMPLETION::EnqueueTicks(UINT64 EventTimeTicks) +__weak void HAL_COMPLETION::EnqueueTicks(UINT64 EventTimeTicks) { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_COMPLETION::EnqueueDelta( UINT32 uSecFromNow ) +__weak void HAL_COMPLETION::EnqueueDelta( UINT32 uSecFromNow ) { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_COMPLETION::Abort() +__weak void HAL_COMPLETION::Abort() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_COMPLETION::Execute() +__weak void HAL_COMPLETION::Execute() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_COMPLETION::DequeueAndExec() +__weak void HAL_COMPLETION::DequeueAndExec() { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } -void HAL_COMPLETION::WaitForInterrupts( UINT64 Expire, UINT32 sleepLevel, UINT64 wakeEvents ) +__weak void HAL_COMPLETION::WaitForInterrupts( UINT64 Expire, UINT32 sleepLevel, UINT64 wakeEvents ) { NATIVE_PROFILE_PAL_ASYNC_PROC_CALL(); } diff --git a/DeviceCode/pal/BlockStorage/stubs/blockstorageList_stubs.cpp b/DeviceCode/pal/BlockStorage/stubs/blockstorageList_stubs.cpp index 0c20d27d0..38c71dbb1 100644 --- a/DeviceCode/pal/BlockStorage/stubs/blockstorageList_stubs.cpp +++ b/DeviceCode/pal/BlockStorage/stubs/blockstorageList_stubs.cpp @@ -10,98 +10,98 @@ BlockStorageDevice* BlockStorageList::s_primaryDevice = NULL; //--// -void BlockStorageList::Initialize() +__weak void BlockStorageList::Initialize() { } -BOOL BlockStorageList::InitializeDevices() +__weak BOOL BlockStorageList::InitializeDevices() { return TRUE; } -BOOL BlockStorageList::UnInitializeDevices() +__weak BOOL BlockStorageList::UnInitializeDevices() { return TRUE; } -BOOL BlockStorageList::AddDevice( BlockStorageDevice* pBSD, IBlockStorageDevice* vtable, void* config, BOOL Init) +__weak BOOL BlockStorageList::AddDevice( BlockStorageDevice* pBSD, IBlockStorageDevice* vtable, void* config, BOOL Init) { return TRUE; } -BOOL BlockStorageList::RemoveDevice( BlockStorageDevice* pBSD, BOOL UnInit) +__weak BOOL BlockStorageList::RemoveDevice( BlockStorageDevice* pBSD, BOOL UnInit) { return TRUE; } -BlockStorageDevice* BlockStorageList::GetFirstDevice() +__weak BlockStorageDevice* BlockStorageList::GetFirstDevice() { return NULL; } -BlockStorageDevice* BlockStorageList::GetNextDevice( BlockStorageDevice& device ) +__weak BlockStorageDevice* BlockStorageList::GetNextDevice( BlockStorageDevice& device ) { return NULL; } -UINT32 BlockStorageList::GetNumDevices() +__weak UINT32 BlockStorageList::GetNumDevices() { return 0; } -BOOL BlockStorageList::FindDeviceForPhysicalAddress( BlockStorageDevice** pBSD, UINT32 PhysicalAddress, ByteAddress &SectAddress) +__weak BOOL BlockStorageList::FindDeviceForPhysicalAddress( BlockStorageDevice** pBSD, UINT32 PhysicalAddress, ByteAddress &SectAddress) { *pBSD = NULL; return FALSE; } -BOOL BlockStorageStream::Initialize(UINT32 blockUsage) +__weak BOOL BlockStorageStream::Initialize(UINT32 blockUsage) { return FALSE; } -BOOL BlockStorageStream::Initialize(UINT32 usage, BlockStorageDevice* pDevice) +__weak BOOL BlockStorageStream::Initialize(UINT32 usage, BlockStorageDevice* pDevice) { return FALSE; } -UINT32 BlockStorageStream::CurrentAddress() +__weak UINT32 BlockStorageStream::CurrentAddress() { return 0xFFFFFFFF; } -BOOL BlockStorageStream::PrevStream() +__weak BOOL BlockStorageStream::PrevStream() { return FALSE; } -BOOL BlockStorageStream::NextStream() +__weak BOOL BlockStorageStream::NextStream() { return FALSE; } -BOOL BlockStorageStream::Seek( INT32 offset, SeekOrigin origin ) +__weak BOOL BlockStorageStream::Seek( INT32 offset, SeekOrigin origin ) { return TRUE; } -BOOL BlockStorageStream::Erase( UINT32 length ) +__weak BOOL BlockStorageStream::Erase( UINT32 length ) { return TRUE; } -BOOL BlockStorageStream::Write( UINT8* data , UINT32 length ) +__weak BOOL BlockStorageStream::Write( UINT8* data , UINT32 length ) { return TRUE; } -BOOL BlockStorageStream::ReadIntoBuffer( UINT8* pBuffer, UINT32 length ) +__weak BOOL BlockStorageStream::ReadIntoBuffer( UINT8* pBuffer, UINT32 length ) { return TRUE; } -BOOL BlockStorageStream::Read( UINT8** ppBuffer, UINT32 length ) +__weak BOOL BlockStorageStream::Read( UINT8** ppBuffer, UINT32 length ) { return TRUE; } @@ -109,22 +109,22 @@ BOOL BlockStorageStream::Read( UINT8** ppBuffer, UINT32 length ) //--// -SectorAddress BlockDeviceInfo::PhysicalToSectorAddress( const BlockRegionInfo* pRegion, ByteAddress phyAddress ) const +__weak SectorAddress BlockDeviceInfo::PhysicalToSectorAddress( const BlockRegionInfo* pRegion, ByteAddress phyAddress ) const { return phyAddress; } -BOOL BlockDeviceInfo::FindRegionFromAddress(ByteAddress Address, UINT32 &BlockRegionIndex, UINT32 &BlockRangeIndex ) const +__weak BOOL BlockDeviceInfo::FindRegionFromAddress(ByteAddress Address, UINT32 &BlockRegionIndex, UINT32 &BlockRangeIndex ) const { return FALSE; } -BOOL BlockDeviceInfo::FindNextUsageBlock(UINT32 BlockUsage, ByteAddress &Address, UINT32 &BlockRegionIndex, UINT32 &BlockRangeIndex ) const +__weak BOOL BlockDeviceInfo::FindNextUsageBlock(UINT32 BlockUsage, ByteAddress &Address, UINT32 &BlockRegionIndex, UINT32 &BlockRangeIndex ) const { return FALSE; } -BOOL BlockDeviceInfo::FindForBlockUsage(UINT32 BlockUsage, ByteAddress &Address, UINT32 &BlockRegionIndex, UINT32 &BlockRangeIndex ) const +__weak BOOL BlockDeviceInfo::FindForBlockUsage(UINT32 BlockUsage, ByteAddress &Address, UINT32 &BlockRegionIndex, UINT32 &BlockRangeIndex ) const { return FALSE; } diff --git a/DeviceCode/pal/Buttons/stubs/buttons_stubs.cpp b/DeviceCode/pal/Buttons/stubs/buttons_stubs.cpp index 5e29f6bf2..9c2270fed 100644 --- a/DeviceCode/pal/Buttons/stubs/buttons_stubs.cpp +++ b/DeviceCode/pal/Buttons/stubs/buttons_stubs.cpp @@ -6,43 +6,43 @@ //--// -BOOL Buttons_Initialize() +__weak BOOL Buttons_Initialize() { NATIVE_PROFILE_PAL_BUTTONS(); return TRUE; } -BOOL Buttons_Uninitialize() +__weak BOOL Buttons_Uninitialize() { NATIVE_PROFILE_PAL_BUTTONS(); return TRUE; } -BOOL Buttons_RegisterStateChange( UINT32 ButtonsPressed, UINT32 ButtonsReleased ) +__weak BOOL Buttons_RegisterStateChange( UINT32 ButtonsPressed, UINT32 ButtonsReleased ) { NATIVE_PROFILE_PAL_BUTTONS(); return FALSE; } -BOOL Buttons_GetNextStateChange( UINT32& ButtonsPressed, UINT32& ButtonsReleased ) +__weak BOOL Buttons_GetNextStateChange( UINT32& ButtonsPressed, UINT32& ButtonsReleased ) { NATIVE_PROFILE_PAL_BUTTONS(); return FALSE; } -UINT32 Buttons_CurrentState() +__weak UINT32 Buttons_CurrentState() { NATIVE_PROFILE_PAL_BUTTONS(); return 0; } -UINT32 Buttons_HW_To_Hal_Button( UINT32 HW_Buttons ) +__weak UINT32 Buttons_HW_To_Hal_Button( UINT32 HW_Buttons ) { NATIVE_PROFILE_PAL_BUTTONS(); return 0; } -UINT32 Buttons_CurrentHWState() +__weak UINT32 Buttons_CurrentHWState() { NATIVE_PROFILE_PAL_BUTTONS(); return 0; diff --git a/DeviceCode/pal/COM/ComDirector.cpp b/DeviceCode/pal/COM/ComDirector.cpp index d670095dc..01abb2798 100644 --- a/DeviceCode/pal/COM/ComDirector.cpp +++ b/DeviceCode/pal/COM/ComDirector.cpp @@ -9,21 +9,34 @@ BOOL DebuggerPort_Initialize( COM_HANDLE ComPortNum ) NATIVE_PROFILE_PAL_COM(); switch(ExtractTransport(ComPortNum)) { + #ifdef FEATURE_USART case USART_TRANSPORT: return USART_Initialize( ConvertCOM_ComPort(ComPortNum), HalSystemConfig.USART_DefaultBaudRate, USART_PARITY_NONE, 8, USART_STOP_BITS_ONE, USART_FLOW_NONE ); + #endif +#ifdef FEATURE_USB_DEBUG case USB_TRANSPORT: if(USB_CONFIG_ERR_OK != USB_Configure( ConvertCOM_UsbController(ComPortNum), NULL )) return FALSE; - if(!USB_Initialize( ConvertCOM_UsbController(ComPortNum) )) - return FALSE; - - return USB_OpenStream( ConvertCOM_UsbStream(ComPortNum), USB_DEBUG_EP_WRITE, USB_DEBUG_EP_READ ); - + if(USB_Initialize(ConvertCOM_UsbController(ComPortNum))) + { +#if defined(USB_ALLOW_CONFIGURATION_OVERRIDE) + // because the call is from a debugger port USB_Initialize has already opened the USB stream + return TRUE; +#else + return USB_OpenStream( ConvertCOM_UsbStream(HalSystemConfig.DebuggerPorts[0]), USB_DEBUG_EP_WRITE, USB_DEBUG_EP_READ ); +#endif + + } + break; +#endif + + #ifdef FEATURE_SOCKETS case SOCKET_TRANSPORT: return SOCKETS_Initialize(ConvertCOM_SockPort(ComPortNum)); - + #endif + case GENERIC_TRANSPORT: return GenericPort_Initialize( ConvertCOM_GenericPort( ComPortNum ) ); } @@ -36,16 +49,22 @@ BOOL DebuggerPort_Uninitialize( COM_HANDLE ComPortNum ) NATIVE_PROFILE_PAL_COM(); switch(ExtractTransport(ComPortNum)) { + #ifdef FEATURE_USART case USART_TRANSPORT: return USART_Uninitialize( ConvertCOM_ComPort(ComPortNum) ); + #endif +#ifdef FEATURE_USB_DEBUG case USB_TRANSPORT: USB_CloseStream( ConvertCOM_UsbStream(ComPortNum) ); return USB_Uninitialize( ConvertCOM_UsbController(ComPortNum) ); +#endif + #ifdef FEATURE_SOCKET case SOCKET_TRANSPORT: return SOCKETS_Uninitialize(ConvertCOM_SockPort(ComPortNum)); - + #endif + case GENERIC_TRANSPORT: return GenericPort_Uninitialize( ConvertCOM_GenericPort( ComPortNum ) ); } @@ -68,18 +87,26 @@ int DebuggerPort_Write( COM_HANDLE ComPortNum, const char* Data, size_t size, in switch(transport) { - case USART_TRANSPORT: - ret = USART_Write( ConvertCOM_ComPort( ComPortNum ), dataTmp, size ); - break; - case USB_TRANSPORT: - ret = USB_Write( ConvertCOM_UsbStream( ComPortNum ), dataTmp, size ); - break; - case SOCKET_TRANSPORT: - ret = SOCKETS_Write( ConvertCOM_SockPort(ComPortNum), dataTmp, size ); - break; + #ifdef FEATURE_USART + case USART_TRANSPORT: + ret = USART_Write( ConvertCOM_ComPort( ComPortNum ), dataTmp, size ); + break; + #endif - case GENERIC_TRANSPORT: - return GenericPort_Write( ConvertCOM_GenericPort( ComPortNum ), dataTmp, size ); +#ifdef FEATURE_USB_DEBUG + case USB_TRANSPORT: + ret = USB_Write( ConvertCOM_UsbStream( ComPortNum ), dataTmp, size ); + break; +#endif + + #ifdef FEATURE_SOCKET + case SOCKET_TRANSPORT: + ret = SOCKETS_Write( ConvertCOM_SockPort(ComPortNum), dataTmp, size ); + break; + #endif + + case GENERIC_TRANSPORT: + return GenericPort_Write( ConvertCOM_GenericPort( ComPortNum ), dataTmp, size ); } if(ret < 0) @@ -117,20 +144,26 @@ int DebuggerPort_Read( COM_HANDLE ComPortNum, char* Data, size_t size ) switch(ExtractTransport(ComPortNum)) { - case USART_TRANSPORT: - ret = USART_Read( ConvertCOM_ComPort( ComPortNum ), Data, size ); - break; + #ifdef FEATURE_USART + case USART_TRANSPORT: + ret = USART_Read( ConvertCOM_ComPort( ComPortNum ), Data, size ); + break; + #endif - case USB_TRANSPORT: - ret = USB_Read( ConvertCOM_UsbStream( ComPortNum ), Data, size ); - break; +#ifdef FEATURE_USB_DEBUG + case USB_TRANSPORT: + ret = USB_Read( ConvertCOM_UsbStream( ComPortNum ), Data, size ); + break; +#endif - case SOCKET_TRANSPORT: - ret = SOCKETS_Read( ConvertCOM_SockPort(ComPortNum), Data, size ); - break; + #ifdef FEATURE_SOCKET + case SOCKET_TRANSPORT: + ret = SOCKETS_Read( ConvertCOM_SockPort(ComPortNum), Data, size ); + break; + #endif - case GENERIC_TRANSPORT: - return GenericPort_Read( ConvertCOM_GenericPort( ComPortNum ), Data, size ); + case GENERIC_TRANSPORT: + return GenericPort_Read( ConvertCOM_GenericPort( ComPortNum ), Data, size ); } return ret; @@ -142,17 +175,23 @@ BOOL DebuggerPort_Flush( COM_HANDLE ComPortNum ) NATIVE_PROFILE_PAL_COM(); switch( ExtractTransport( ComPortNum ) ) { - case USART_TRANSPORT: - return USART_Flush( ConvertCOM_ComPort( ComPortNum ) ); + #ifdef FEATURE_USART + case USART_TRANSPORT: + return USART_Flush( ConvertCOM_ComPort( ComPortNum ) ); + #endif - case USB_TRANSPORT: - return USB_Flush( ConvertCOM_UsbStream( ComPortNum ) ); +#ifdef FEATURE_USB_DEBUG + case USB_TRANSPORT: + return USB_Flush( ConvertCOM_UsbStream( ComPortNum ) ); +#endif - case SOCKET_TRANSPORT: - return SOCKETS_Flush( ConvertCOM_SockPort( ComPortNum ) ); + #ifdef FEATURE_SOCKET + case SOCKET_TRANSPORT: + return SOCKETS_Flush( ConvertCOM_SockPort( ComPortNum ) ); + #endif - case GENERIC_TRANSPORT: - return GenericPort_Flush( ConvertCOM_GenericPort( ComPortNum ) ); + case GENERIC_TRANSPORT: + return GenericPort_Flush( ConvertCOM_GenericPort( ComPortNum ) ); } return FALSE; @@ -163,15 +202,24 @@ BOOL DebuggerPort_IsSslSupported( COM_HANDLE ComPortNum ) NATIVE_PROFILE_PAL_COM(); switch(ExtractTransport(ComPortNum)) { - case SOCKET_TRANSPORT: - return g_DebuggerPortSslConfig.GetCertificateAuthority != NULL; - - case GENERIC_TRANSPORT: - return GenericPort_IsSslSupported( ConvertCOM_GenericPort( ComPortNum ) ); - case USART_TRANSPORT: - case USB_TRANSPORT: - default: - break; + #ifdef FEATURE_SOCKET + case SOCKET_TRANSPORT: + return g_DebuggerPortSslConfig.GetCertificateAuthority != NULL; + #endif + + case GENERIC_TRANSPORT: + return GenericPort_IsSslSupported( ConvertCOM_GenericPort( ComPortNum ) ); + + #ifdef FEATURE_USART + case USART_TRANSPORT: + #endif + +#ifdef FEATURE_USB_DEBUG + case USB_TRANSPORT: +#endif + + default: + break; } return FALSE; @@ -202,11 +250,13 @@ BOOL DebuggerPort_UpgradeToSsl( COM_HANDLE ComPortNum, UINT32 flags ) switch(ExtractTransport(ComPortNum)) { - case SOCKET_TRANSPORT: - return SOCKETS_UpgradeToSsl(ConvertCOM_ComPort(ComPortNum), pCACert, caCertLen, pDeviceCert, deviceCertLen, szTargetHost); + #ifdef FEATURE_SOCKET + case SOCKET_TRANSPORT: + return SOCKETS_UpgradeToSsl(ConvertCOM_ComPort(ComPortNum), pCACert, caCertLen, pDeviceCert, deviceCertLen, szTargetHost); + #endif - case GENERIC_TRANSPORT: - return GenericPort_UpgradeToSsl( ComPortNum, pCACert, caCertLen, pDeviceCert, deviceCertLen, szTargetHost ); + case GENERIC_TRANSPORT: + return GenericPort_UpgradeToSsl( ComPortNum, pCACert, caCertLen, pDeviceCert, deviceCertLen, szTargetHost ); } return FALSE; @@ -216,11 +266,13 @@ BOOL DebuggerPort_IsUsingSsl( COM_HANDLE ComPortNum ) { switch(ExtractTransport(ComPortNum)) { - case SOCKET_TRANSPORT: - return SOCKETS_IsUsingSsl(ConvertCOM_ComPort(ComPortNum)); + #ifdef FEATURE_SOCKET + case SOCKET_TRANSPORT: + return SOCKETS_IsUsingSsl(ConvertCOM_ComPort(ComPortNum)); + #endif - case GENERIC_TRANSPORT: - return GenericPort_IsUsingSsl( ConvertCOM_GenericPort( ComPortNum ) ); + case GENERIC_TRANSPORT: + return GenericPort_IsUsingSsl( ConvertCOM_GenericPort( ComPortNum ) ); } return FALSE; } @@ -230,21 +282,27 @@ void InitializePort( COM_HANDLE ComPortNum ) { switch(ExtractTransport(ComPortNum)) { - case USART_TRANSPORT: - USART_Initialize( ConvertCOM_ComPort( ComPortNum ), HalSystemConfig.USART_DefaultBaudRate, USART_PARITY_NONE, 8, USART_STOP_BITS_ONE, USART_FLOW_NONE ); - break; + #ifdef FEATURE_USART + case USART_TRANSPORT: + USART_Initialize( ConvertCOM_ComPort( ComPortNum ), HalSystemConfig.USART_DefaultBaudRate, USART_PARITY_NONE, 8, USART_STOP_BITS_ONE, USART_FLOW_NONE ); + break; + #endif - case USB_TRANSPORT: - USB_Initialize( ConvertCOM_UsbStream( ComPortNum ) ); - break; +#ifdef FEATURE_USB_DEBUG + case USB_TRANSPORT: + USB_Initialize( ConvertCOM_UsbStream( ComPortNum ) ); + break; +#endif - case SOCKET_TRANSPORT: - SOCKETS_Initialize( ConvertCOM_SockPort(ComPortNum) ); - break; + #ifdef FEATURE_SOCKET + case SOCKET_TRANSPORT: + SOCKETS_Initialize( ConvertCOM_SockPort(ComPortNum) ); + break; + #endif - case GENERIC_TRANSPORT: - GenericPort_Initialize( ConvertCOM_GenericPort( ComPortNum ) ); - break; + case GENERIC_TRANSPORT: + GenericPort_Initialize( ConvertCOM_GenericPort( ComPortNum ) ); + break; } } @@ -252,25 +310,31 @@ void UninitializePort( COM_HANDLE ComPortNum ) { switch(ExtractTransport(ComPortNum)) { - case USART_TRANSPORT: - USART_Uninitialize( ConvertCOM_ComPort( ComPortNum ) ); - break; + #ifdef FEATURE_USART + case USART_TRANSPORT: + USART_Uninitialize( ConvertCOM_ComPort( ComPortNum ) ); + break; + #endif - case USB_TRANSPORT: - if(USB_CONFIG_ERR_OK == USB_Configure( ConvertCOM_UsbController(ComPortNum), NULL )) - { - USB_Initialize( ConvertCOM_UsbController(ComPortNum) ); - USB_OpenStream( ConvertCOM_UsbStream(ComPortNum), USB_DEBUG_EP_WRITE, USB_DEBUG_EP_READ ); - } - break; +#ifdef FEATURE_USB_DEBUG + case USB_TRANSPORT: + if(USB_CONFIG_ERR_OK == USB_Configure( ConvertCOM_UsbController(ComPortNum), NULL )) + { + USB_Initialize( ConvertCOM_UsbController(ComPortNum) ); + USB_OpenStream( ConvertCOM_UsbStream(ComPortNum), USB_DEBUG_EP_WRITE, USB_DEBUG_EP_READ ); + } + break; +#endif - case SOCKET_TRANSPORT: - SOCKETS_Uninitialize( ConvertCOM_SockPort(ComPortNum) ); - break; + #ifdef FEATURE_SOCKET + case SOCKET_TRANSPORT: + SOCKETS_Uninitialize( ConvertCOM_SockPort(ComPortNum) ); + break; + #endif - case GENERIC_TRANSPORT: - GenericPort_Uninitialize( ConvertCOM_GenericPort( ComPortNum ) ); - break; + case GENERIC_TRANSPORT: + GenericPort_Uninitialize( ConvertCOM_GenericPort( ComPortNum ) ); + break; } } @@ -281,7 +345,9 @@ void CPU_InitializeCommunication() // do these first so we can print out messages InitializePort( HalSystemConfig.DebugTextPort ); InitializePort( HalSystemConfig.stdio ); +#ifdef FEATURE_SOCKET Network_Initialize(); +#endif } void CPU_UninitializeCommunication() @@ -292,6 +358,7 @@ void CPU_UninitializeCommunication() UninitializePort( HalSystemConfig.DebugTextPort ); UninitializePort( HalSystemConfig.stdio ); +#ifdef FEATURE_USB_DEBUG // if USB is not defined, the STUB_USB will be set // Do not uninitialize the USB on soft reboot if USB is our debugger link // Close all streams on USB controller 0 except debugger (if it uses a USB stream) @@ -306,8 +373,11 @@ void CPU_UninitializeCommunication() } } USB_Uninitialize(0); // USB_Uninitialize will only stop USB controller 0 if it has no open streams +#endif - Network_Uninitialize(); + #ifdef FEATURE_SOCKET + Network_Uninitialize(); + #endif } @@ -317,18 +387,22 @@ void CPU_ProtectCommunicationGPIOs( BOOL On ) switch(ExtractTransport(HalSystemConfig.DebugTextPort)) { - case USART_TRANSPORT: - CPU_USART_ProtectPins( ConvertCOM_ComPort(HalSystemConfig.DebugTextPort), On ); - return ; + #ifdef FEATURE_USART + case USART_TRANSPORT: + CPU_USART_ProtectPins( ConvertCOM_ComPort(HalSystemConfig.DebugTextPort), On ); + return ; + #endif - case USB_TRANSPORT: - CPU_USB_ProtectPins( ConvertCOM_UsbController(HalSystemConfig.DebugTextPort), On ); - return; +#ifdef FEATURE_USB_DEBUG + case USB_TRANSPORT: + CPU_USB_ProtectPins( ConvertCOM_UsbController(HalSystemConfig.DebugTextPort), On ); + return; +#endif - case GENERIC_TRANSPORT: - GenericPort_ProtectPins( ConvertCOM_GenericPort(HalSystemConfig.DebugTextPort), On ); + case GENERIC_TRANSPORT: + GenericPort_ProtectPins( ConvertCOM_GenericPort(HalSystemConfig.DebugTextPort), On ); - default: - return; + default: + return; } } diff --git a/DeviceCode/pal/COM/Config/DebuggerPort_SSL_config_stub.cpp b/DeviceCode/pal/COM/Config/DebuggerPort_SSL_config_stub.cpp index 5b26a7a95..d9c1c6878 100644 --- a/DeviceCode/pal/COM/Config/DebuggerPort_SSL_config_stub.cpp +++ b/DeviceCode/pal/COM/Config/DebuggerPort_SSL_config_stub.cpp @@ -1,20 +1,20 @@ #include #include -static BOOL DebuggerPort_SSL_GetCACert( UINT8** caCert, UINT32* certLen ) +__weak BOOL DebuggerPort_SSL_GetCACert( UINT8** caCert, UINT32* certLen ) { *caCert = NULL; *certLen = 0; return FALSE; } -static BOOL DebuggerPort_SSL_GetTargetHost( LPCSTR* strTargetHost ) +__weak BOOL DebuggerPort_SSL_GetTargetHost( LPCSTR* strTargetHost ) { *strTargetHost = NULL; return TRUE; } -static BOOL DebuggerPort_SSL_GetDeviceCert( UINT8** caCert, UINT32* certLen ) +__weak BOOL DebuggerPort_SSL_GetDeviceCert( UINT8** caCert, UINT32* certLen ) { *caCert = NULL; *certLen = 0; @@ -27,4 +27,3 @@ IDebuggerPortSslConfig g_DebuggerPortSslConfig = DebuggerPort_SSL_GetTargetHost, DebuggerPort_SSL_GetDeviceCert, }; - diff --git a/DeviceCode/pal/COM/i2c/stubs/i2c_stubs.cpp b/DeviceCode/pal/COM/i2c/stubs/i2c_stubs.cpp index 193d9c3cc..c4340f324 100644 --- a/DeviceCode/pal/COM/i2c/stubs/i2c_stubs.cpp +++ b/DeviceCode/pal/COM/i2c/stubs/i2c_stubs.cpp @@ -15,70 +15,70 @@ #include //--// -BOOL I2C_Initialize() +__weak BOOL I2C_Initialize() { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL I2C_Uninitialize() +__weak BOOL I2C_Uninitialize() { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL I2C_Enqueue( I2C_HAL_XACTION* xAction ) +__weak BOOL I2C_Enqueue( I2C_HAL_XACTION* xAction ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -void I2C_Cancel( I2C_HAL_XACTION* xAction, bool signal ) +__weak void I2C_Cancel( I2C_HAL_XACTION* xAction, bool signal ) { NATIVE_PROFILE_PAL_COM(); } -void I2C_InitializeTransaction( I2C_HAL_XACTION* xAction, I2C_USER_CONFIGURATION& config, I2C_HAL_XACTION_UNIT** xActions, size_t numXActions ) +__weak void I2C_InitializeTransaction( I2C_HAL_XACTION* xAction, I2C_USER_CONFIGURATION& config, I2C_HAL_XACTION_UNIT** xActions, size_t numXActions ) { NATIVE_PROFILE_PAL_COM(); } -void I2C_InitializeTransactionUnit( I2C_HAL_XACTION_UNIT* xActionUnit, I2C_WORD* src, I2C_WORD* dst, size_t size, BOOL fRead ) +__weak void I2C_InitializeTransactionUnit( I2C_HAL_XACTION_UNIT* xActionUnit, I2C_WORD* src, I2C_WORD* dst, size_t size, BOOL fRead ) { NATIVE_PROFILE_PAL_COM(); } //--// -void I2C_XAction_SetState( I2C_HAL_XACTION* xAction, UINT8 state ) +__weak void I2C_XAction_SetState( I2C_HAL_XACTION* xAction, UINT8 state ) { NATIVE_PROFILE_PAL_COM(); } -UINT8 I2C_XAction_GetState( I2C_HAL_XACTION* xAction ) +__weak UINT8 I2C_XAction_GetState( I2C_HAL_XACTION* xAction ) { NATIVE_PROFILE_PAL_COM(); return 0; } -BOOL I2C_XAction_CheckState( I2C_HAL_XACTION* xAction, UINT8 state ) +__weak BOOL I2C_XAction_CheckState( I2C_HAL_XACTION* xAction, UINT8 state ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -size_t I2C_XAction_TransactedBytes( I2C_HAL_XACTION* xAction ) +__weak size_t I2C_XAction_TransactedBytes( I2C_HAL_XACTION* xAction ) { NATIVE_PROFILE_PAL_COM(); return 0; } -void I2C_XActionUnit_CopyBuffer( I2C_HAL_XACTION_UNIT* xActionUnit, I2C_WORD* data, size_t length ) +__weak void I2C_XActionUnit_CopyBuffer( I2C_HAL_XACTION_UNIT* xActionUnit, I2C_WORD* data, size_t length ) { NATIVE_PROFILE_PAL_COM(); } -BOOL I2C_XActionUnit_IsRead( I2C_HAL_XACTION_UNIT* xActionUnit ) +__weak BOOL I2C_XActionUnit_IsRead( I2C_HAL_XACTION_UNIT* xActionUnit ) { NATIVE_PROFILE_PAL_COM(); return FALSE; diff --git a/DeviceCode/pal/COM/sockets/Ssl/stubs/ssl_pal_stubs.cpp b/DeviceCode/pal/COM/sockets/Ssl/stubs/ssl_pal_stubs.cpp index b38541270..672bb53f6 100644 --- a/DeviceCode/pal/COM/sockets/Ssl/stubs/ssl_pal_stubs.cpp +++ b/DeviceCode/pal/COM/sockets/Ssl/stubs/ssl_pal_stubs.cpp @@ -8,98 +8,98 @@ extern "C" { -void ssl_rand_seed(const void *seed, int length) +__weak void ssl_rand_seed(const void *seed, int length) { } } -BOOL SSL_Initialize() +__weak BOOL SSL_Initialize() { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL SSL_Uninitialize() +__weak BOOL SSL_Uninitialize() { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SSL_ServerInit( INT32 sslMode, INT32 sslVerify, const char* certificate, INT32 cert_len, const char* szCertPwd, INT32& sslContextHandle ) +__weak BOOL SSL_ServerInit( INT32 sslMode, INT32 sslVerify, const char* certificate, INT32 cert_len, const char* szCertPwd, INT32& sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SSL_ClientInit( INT32 sslMode, INT32 sslVerify, const char* certificate, INT32 cert_len, const char* szCertPwd, INT32& sslContextHandle ) +__weak BOOL SSL_ClientInit( INT32 sslMode, INT32 sslVerify, const char* certificate, INT32 cert_len, const char* szCertPwd, INT32& sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SSL_AddCertificateAuthority( int sslContextHandle, const char* certificate, int cert_len, const char* szCertPwd ) +__weak BOOL SSL_AddCertificateAuthority( int sslContextHandle, const char* certificate, int cert_len, const char* szCertPwd ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -void SSL_ClearCertificateAuthority( int sslContextHandle ) +__weak void SSL_ClearCertificateAuthority( int sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); } -BOOL SSL_ExitContext( INT32 sslContextHandle ) +__weak BOOL SSL_ExitContext( INT32 sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -INT32 SSL_Accept( SOCK_SOCKET socket, INT32 sslContextHandle ) +__weak INT32 SSL_Accept( SOCK_SOCKET socket, INT32 sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return 0; } -INT32 SSL_Connect( SOCK_SOCKET socket, const char* szTargetHost, INT32 sslContextHandle ) +__weak INT32 SSL_Connect( SOCK_SOCKET socket, const char* szTargetHost, INT32 sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return 0; } -INT32 SSL_Write( SOCK_SOCKET socket, const char* Data, size_t size ) +__weak INT32 SSL_Write( SOCK_SOCKET socket, const char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -INT32 SSL_Read( SOCK_SOCKET socket, char* Data, size_t size ) +__weak INT32 SSL_Read( SOCK_SOCKET socket, char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -INT32 SSL_CloseSocket( SOCK_SOCKET socket ) +__weak INT32 SSL_CloseSocket( SOCK_SOCKET socket ) { NATIVE_PROFILE_PAL_COM(); return 0; } -void SSL_GetTime(DATE_TIME_INFO* pdt) +__weak void SSL_GetTime(DATE_TIME_INFO* pdt) { NATIVE_PROFILE_PAL_COM(); } -void SSL_RegisterTimeCallback(SSL_DATE_TIME_FUNC pfn) +__weak void SSL_RegisterTimeCallback(SSL_DATE_TIME_FUNC pfn) { NATIVE_PROFILE_PAL_COM(); } -BOOL SSL_ParseCertificate( const char* certificate, size_t cert_length, const char* szPwd, X509CertData* certData ) +__weak BOOL SSL_ParseCertificate( const char* certificate, size_t cert_length, const char* szPwd, X509CertData* certData ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -INT32 SSL_DataAvailable( SOCK_SOCKET socket ) +__weak INT32 SSL_DataAvailable( SOCK_SOCKET socket ) { NATIVE_PROFILE_PAL_COM(); return 0; diff --git a/DeviceCode/pal/COM/sockets/openssl/stubs/openssl_pal_stubs.cpp b/DeviceCode/pal/COM/sockets/openssl/stubs/openssl_pal_stubs.cpp index b38541270..672bb53f6 100644 --- a/DeviceCode/pal/COM/sockets/openssl/stubs/openssl_pal_stubs.cpp +++ b/DeviceCode/pal/COM/sockets/openssl/stubs/openssl_pal_stubs.cpp @@ -8,98 +8,98 @@ extern "C" { -void ssl_rand_seed(const void *seed, int length) +__weak void ssl_rand_seed(const void *seed, int length) { } } -BOOL SSL_Initialize() +__weak BOOL SSL_Initialize() { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL SSL_Uninitialize() +__weak BOOL SSL_Uninitialize() { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SSL_ServerInit( INT32 sslMode, INT32 sslVerify, const char* certificate, INT32 cert_len, const char* szCertPwd, INT32& sslContextHandle ) +__weak BOOL SSL_ServerInit( INT32 sslMode, INT32 sslVerify, const char* certificate, INT32 cert_len, const char* szCertPwd, INT32& sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SSL_ClientInit( INT32 sslMode, INT32 sslVerify, const char* certificate, INT32 cert_len, const char* szCertPwd, INT32& sslContextHandle ) +__weak BOOL SSL_ClientInit( INT32 sslMode, INT32 sslVerify, const char* certificate, INT32 cert_len, const char* szCertPwd, INT32& sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SSL_AddCertificateAuthority( int sslContextHandle, const char* certificate, int cert_len, const char* szCertPwd ) +__weak BOOL SSL_AddCertificateAuthority( int sslContextHandle, const char* certificate, int cert_len, const char* szCertPwd ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -void SSL_ClearCertificateAuthority( int sslContextHandle ) +__weak void SSL_ClearCertificateAuthority( int sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); } -BOOL SSL_ExitContext( INT32 sslContextHandle ) +__weak BOOL SSL_ExitContext( INT32 sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -INT32 SSL_Accept( SOCK_SOCKET socket, INT32 sslContextHandle ) +__weak INT32 SSL_Accept( SOCK_SOCKET socket, INT32 sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return 0; } -INT32 SSL_Connect( SOCK_SOCKET socket, const char* szTargetHost, INT32 sslContextHandle ) +__weak INT32 SSL_Connect( SOCK_SOCKET socket, const char* szTargetHost, INT32 sslContextHandle ) { NATIVE_PROFILE_PAL_COM(); return 0; } -INT32 SSL_Write( SOCK_SOCKET socket, const char* Data, size_t size ) +__weak INT32 SSL_Write( SOCK_SOCKET socket, const char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -INT32 SSL_Read( SOCK_SOCKET socket, char* Data, size_t size ) +__weak INT32 SSL_Read( SOCK_SOCKET socket, char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -INT32 SSL_CloseSocket( SOCK_SOCKET socket ) +__weak INT32 SSL_CloseSocket( SOCK_SOCKET socket ) { NATIVE_PROFILE_PAL_COM(); return 0; } -void SSL_GetTime(DATE_TIME_INFO* pdt) +__weak void SSL_GetTime(DATE_TIME_INFO* pdt) { NATIVE_PROFILE_PAL_COM(); } -void SSL_RegisterTimeCallback(SSL_DATE_TIME_FUNC pfn) +__weak void SSL_RegisterTimeCallback(SSL_DATE_TIME_FUNC pfn) { NATIVE_PROFILE_PAL_COM(); } -BOOL SSL_ParseCertificate( const char* certificate, size_t cert_length, const char* szPwd, X509CertData* certData ) +__weak BOOL SSL_ParseCertificate( const char* certificate, size_t cert_length, const char* szPwd, X509CertData* certData ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -INT32 SSL_DataAvailable( SOCK_SOCKET socket ) +__weak INT32 SSL_DataAvailable( SOCK_SOCKET socket ) { NATIVE_PROFILE_PAL_COM(); return 0; diff --git a/DeviceCode/pal/COM/sockets/stubs/sockets_stubs.cpp b/DeviceCode/pal/COM/sockets/stubs/sockets_stubs.cpp index 016d72a4b..e7a570021 100644 --- a/DeviceCode/pal/COM/sockets/stubs/sockets_stubs.cpp +++ b/DeviceCode/pal/COM/sockets/stubs/sockets_stubs.cpp @@ -12,235 +12,235 @@ volatile int errno; int errno; #endif -BOOL Network_Initialize() +__weak BOOL Network_Initialize() { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL Network_Uninitialize() +__weak BOOL Network_Uninitialize() { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SOCKETS_Initialize( int ComPortNum ) +__weak BOOL SOCKETS_Initialize( int ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SOCKETS_Uninitialize( int ComPortNum ) +__weak BOOL SOCKETS_Uninitialize( int ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -int SOCKETS_Write( int ComPortNum, const char* Data, size_t size ) +__weak int SOCKETS_Write( int ComPortNum, const char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -int SOCKETS_Read( int ComPortNum, char* Data, size_t size ) +__weak int SOCKETS_Read( int ComPortNum, char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -BOOL SOCKETS_Flush( int ComPortNum ) +__weak BOOL SOCKETS_Flush( int ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -void SOCKETS_CloseConnections() +__weak void SOCKETS_CloseConnections() { NATIVE_PROFILE_PAL_COM(); } -BOOL SOCKETS_UpgradeToSsl( INT32 ComPortNum, const UINT8* pCACert, UINT32 caCertLen, const UINT8* pDeviceCert, UINT32 deviceCertLen, LPCSTR szTargetHost ) +__weak BOOL SOCKETS_UpgradeToSsl( INT32 ComPortNum, const UINT8* pCACert, UINT32 caCertLen, const UINT8* pDeviceCert, UINT32 deviceCertLen, LPCSTR szTargetHost ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL SOCKETS_IsUsingSsl( INT32 ComPortNum ) +__weak BOOL SOCKETS_IsUsingSsl( INT32 ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL SOCKETS_ProcessSocketActivity(SOCK_SOCKET signalSocket) +__weak BOOL SOCKETS_ProcessSocketActivity(SOCK_SOCKET signalSocket) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -UINT32 SOCK_CONFIGURATION_GetAdapterCount() +__weak UINT32 SOCK_CONFIGURATION_GetAdapterCount() { NATIVE_PROFILE_PAL_COM(); return 0; } -HRESULT SOCK_CONFIGURATION_LoadAdapterConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) +__weak HRESULT SOCK_CONFIGURATION_LoadAdapterConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_UpdateAdapterConfiguration( UINT32 interfaceIndex, UINT32 updateFlags, SOCK_NetworkConfiguration* config ) +__weak HRESULT SOCK_CONFIGURATION_UpdateAdapterConfiguration( UINT32 interfaceIndex, UINT32 updateFlags, SOCK_NetworkConfiguration* config ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_LoadConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) +__weak HRESULT SOCK_CONFIGURATION_LoadConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) +__weak HRESULT SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_UpdateWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) +__weak HRESULT SOCK_CONFIGURATION_UpdateWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_SaveAllWirelessConfigurations( ) +__weak HRESULT SOCK_CONFIGURATION_SaveAllWirelessConfigurations( ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT HAL_SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) +__weak HRESULT HAL_SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -int SOCK_socket( int family, int type, int protocol ) +__weak int SOCK_socket( int family, int type, int protocol ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_bind( int socket, const struct SOCK_sockaddr* address, int addressLen ) +__weak int SOCK_bind( int socket, const struct SOCK_sockaddr* address, int addressLen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_connect(int socket, const struct SOCK_sockaddr* address, int addressLen) +__weak int SOCK_connect(int socket, const struct SOCK_sockaddr* address, int addressLen) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_send(int socket, const char* buf, int len, int flags) +__weak int SOCK_send(int socket, const char* buf, int len, int flags) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_recv(int socket, char* buf, int len, int timeout) +__weak int SOCK_recv(int socket, char* buf, int len, int timeout) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_close(int socket) +__weak int SOCK_close(int socket) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_listen( int socket, int backlog ) +__weak int SOCK_listen( int socket, int backlog ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_accept( int socket, struct SOCK_sockaddr* address, int* addressLen ) +__weak int SOCK_accept( int socket, struct SOCK_sockaddr* address, int* addressLen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_shutdown( int socket, int how ) +__weak int SOCK_shutdown( int socket, int how ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getaddrinfo( const char* nodename, char* servname, const struct SOCK_addrinfo* hints, struct SOCK_addrinfo** res ) +__weak int SOCK_getaddrinfo( const char* nodename, char* servname, const struct SOCK_addrinfo* hints, struct SOCK_addrinfo** res ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -void SOCK_freeaddrinfo( struct SOCK_addrinfo* ai ) +__weak void SOCK_freeaddrinfo( struct SOCK_addrinfo* ai ) { NATIVE_PROFILE_PAL_COM(); } -int SOCK_ioctl( int socket, int cmd, int* data ) +__weak int SOCK_ioctl( int socket, int cmd, int* data ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getlasterror() +__weak int SOCK_getlasterror() { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_select( int socket, SOCK_fd_set* readfds, SOCK_fd_set* writefds, SOCK_fd_set* except, const struct SOCK_timeval* timeout ) +__weak int SOCK_select( int socket, SOCK_fd_set* readfds, SOCK_fd_set* writefds, SOCK_fd_set* except, const struct SOCK_timeval* timeout ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_setsockopt( int socket, int level, int optname, const char* optval, int optlen ) +__weak int SOCK_setsockopt( int socket, int level, int optname, const char* optval, int optlen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getsockopt( int socket, int level, int optname, char* optval, int* optlen ) +__weak int SOCK_getsockopt( int socket, int level, int optname, char* optval, int* optlen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getpeername( int socket, struct SOCK_sockaddr* name, int* namelen ) +__weak int SOCK_getpeername( int socket, struct SOCK_sockaddr* name, int* namelen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getsockname( int socket, struct SOCK_sockaddr* name, int* namelen ) +__weak int SOCK_getsockname( int socket, struct SOCK_sockaddr* name, int* namelen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_recvfrom( int s, char* buf, int len, int flags, struct SOCK_sockaddr* from, int* fromlen ) +__weak int SOCK_recvfrom( int s, char* buf, int len, int flags, struct SOCK_sockaddr* from, int* fromlen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_sendto( int s, const char* buf, int len, int flags, const struct SOCK_sockaddr* to, int tolen ) +__weak int SOCK_sendto( int s, const char* buf, int len, int flags, const struct SOCK_sockaddr* to, int tolen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; diff --git a/DeviceCode/pal/COM/sockets_lwip_os/stubs/sockets_stubs_lwip.cpp b/DeviceCode/pal/COM/sockets_lwip_os/stubs/sockets_stubs_lwip.cpp index 864f6499a..f0dd7d645 100644 --- a/DeviceCode/pal/COM/sockets_lwip_os/stubs/sockets_stubs_lwip.cpp +++ b/DeviceCode/pal/COM/sockets_lwip_os/stubs/sockets_stubs_lwip.cpp @@ -6,235 +6,235 @@ //--// -BOOL Network_Initialize() +__weak BOOL Network_Initialize() { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL Network_Uninitialize() +__weak BOOL Network_Uninitialize() { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SOCKETS_Initialize( int ComPortNum ) +__weak BOOL SOCKETS_Initialize( int ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -BOOL SOCKETS_Uninitialize( int ComPortNum ) +__weak BOOL SOCKETS_Uninitialize( int ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -int SOCKETS_Write( int ComPortNum, const char* Data, size_t size ) +__weak int SOCKETS_Write( int ComPortNum, const char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -int SOCKETS_Read( int ComPortNum, char* Data, size_t size ) +__weak int SOCKETS_Read( int ComPortNum, char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -BOOL SOCKETS_Flush( int ComPortNum ) +__weak BOOL SOCKETS_Flush( int ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -void SOCKETS_CloseConnections() +__weak void SOCKETS_CloseConnections() { NATIVE_PROFILE_PAL_COM(); } -BOOL SOCKETS_UpgradeToSsl( INT32 ComPortNum, const UINT8* pCACert, UINT32 caCertLen, const UINT8* pDeviceCert, UINT32 deviceCertLen, LPCSTR szTargetHost ) +__weak BOOL SOCKETS_UpgradeToSsl( INT32 ComPortNum, const UINT8* pCACert, UINT32 caCertLen, const UINT8* pDeviceCert, UINT32 deviceCertLen, LPCSTR szTargetHost ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL SOCKETS_IsUsingSsl( INT32 ComPortNum ) +__weak BOOL SOCKETS_IsUsingSsl( INT32 ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL SOCKETS_ProcessSocketActivity(SOCK_SOCKET signalSocket) +__weak BOOL SOCKETS_ProcessSocketActivity(SOCK_SOCKET signalSocket) { NATIVE_PROFILE_PAL_COM(); return TRUE; } -UINT32 SOCK_CONFIGURATION_GetAdapterCount() +__weak UINT32 SOCK_CONFIGURATION_GetAdapterCount() { NATIVE_PROFILE_PAL_COM(); return 0; } -HRESULT SOCK_CONFIGURATION_LoadAdapterConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) +__weak HRESULT SOCK_CONFIGURATION_LoadAdapterConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_UpdateAdapterConfiguration( UINT32 interfaceIndex, UINT32 updateFlags, SOCK_NetworkConfiguration* config ) +__weak HRESULT SOCK_CONFIGURATION_UpdateAdapterConfiguration( UINT32 interfaceIndex, UINT32 updateFlags, SOCK_NetworkConfiguration* config ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_LoadConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) +__weak HRESULT SOCK_CONFIGURATION_LoadConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) +__weak HRESULT SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_UpdateWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) +__weak HRESULT SOCK_CONFIGURATION_UpdateWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT SOCK_CONFIGURATION_SaveAllWirelessConfigurations( ) +__weak HRESULT SOCK_CONFIGURATION_SaveAllWirelessConfigurations( ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -HRESULT HAL_SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) +__weak HRESULT HAL_SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) { NATIVE_PROFILE_PAL_COM(); return CLR_E_FAIL; } -int SOCK_socket( int family, int type, int protocol ) +__weak int SOCK_socket( int family, int type, int protocol ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_bind( int socket, const struct SOCK_sockaddr* address, int addressLen ) +__weak int SOCK_bind( int socket, const struct SOCK_sockaddr* address, int addressLen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_connect(int socket, const struct SOCK_sockaddr* address, int addressLen) +__weak int SOCK_connect(int socket, const struct SOCK_sockaddr* address, int addressLen) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_send(int socket, const char* buf, int len, int flags) +__weak int SOCK_send(int socket, const char* buf, int len, int flags) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_recv(int socket, char* buf, int len, int timeout) +__weak int SOCK_recv(int socket, char* buf, int len, int timeout) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_close(int socket) +__weak int SOCK_close(int socket) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_listen( int socket, int backlog ) +__weak int SOCK_listen( int socket, int backlog ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_accept( int socket, struct SOCK_sockaddr* address, int* addressLen ) +__weak int SOCK_accept( int socket, struct SOCK_sockaddr* address, int* addressLen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_shutdown( int socket, int how ) +__weak int SOCK_shutdown( int socket, int how ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getaddrinfo( const char* nodename, char* servname, const struct SOCK_addrinfo* hints, struct SOCK_addrinfo** res ) +__weak int SOCK_getaddrinfo( const char* nodename, char* servname, const struct SOCK_addrinfo* hints, struct SOCK_addrinfo** res ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -void SOCK_freeaddrinfo( struct SOCK_addrinfo* ai ) +__weak void SOCK_freeaddrinfo( struct SOCK_addrinfo* ai ) { NATIVE_PROFILE_PAL_COM(); } -int SOCK_ioctl( int socket, int cmd, int* data ) +__weak int SOCK_ioctl( int socket, int cmd, int* data ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getlasterror() +__weak int SOCK_getlasterror() { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_select( int socket, SOCK_fd_set* readfds, SOCK_fd_set* writefds, SOCK_fd_set* except, const struct SOCK_timeval* timeout ) +__weak int SOCK_select( int socket, SOCK_fd_set* readfds, SOCK_fd_set* writefds, SOCK_fd_set* except, const struct SOCK_timeval* timeout ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_setsockopt( int socket, int level, int optname, const char* optval, int optlen ) +__weak int SOCK_setsockopt( int socket, int level, int optname, const char* optval, int optlen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getsockopt( int socket, int level, int optname, char* optval, int* optlen ) +__weak int SOCK_getsockopt( int socket, int level, int optname, char* optval, int* optlen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getpeername( int socket, struct SOCK_sockaddr* name, int* namelen ) +__weak int SOCK_getpeername( int socket, struct SOCK_sockaddr* name, int* namelen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_getsockname( int socket, struct SOCK_sockaddr* name, int* namelen ) +__weak int SOCK_getsockname( int socket, struct SOCK_sockaddr* name, int* namelen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_recvfrom( int s, char* buf, int len, int flags, struct SOCK_sockaddr* from, int* fromlen ) +__weak int SOCK_recvfrom( int s, char* buf, int len, int flags, struct SOCK_sockaddr* from, int* fromlen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; } -int SOCK_sendto( int s, const char* buf, int len, int flags, const struct SOCK_sockaddr* to, int tolen ) +__weak int SOCK_sendto( int s, const char* buf, int len, int flags, const struct SOCK_sockaddr* to, int tolen ) { NATIVE_PROFILE_PAL_COM(); return SOCK_SOCKET_ERROR; diff --git a/DeviceCode/pal/COM/stubs/ComDirector_stubs.cpp b/DeviceCode/pal/COM/stubs/ComDirector_stubs.cpp index 53166f175..a34232837 100644 --- a/DeviceCode/pal/COM/stubs/ComDirector_stubs.cpp +++ b/DeviceCode/pal/COM/stubs/ComDirector_stubs.cpp @@ -6,51 +6,51 @@ ////////////////////////////////////////////////////////////////////////////////// -BOOL DebuggerPort_Initialize( COM_HANDLE ComPortNum ) +__weak BOOL DebuggerPort_Initialize( COM_HANDLE ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return true; } -BOOL DebuggerPort_Uninitialize( COM_HANDLE ComPortNum ) +__weak BOOL DebuggerPort_Uninitialize( COM_HANDLE ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return true; } -int DebuggerPort_Write( COM_HANDLE ComPortNum, const char* Data, size_t size, int maxRetries ) +__weak int DebuggerPort_Write( COM_HANDLE ComPortNum, const char* Data, size_t size, int maxRetries ) { NATIVE_PROFILE_PAL_COM(); return 0; } -int DebuggerPort_Read( COM_HANDLE ComPortNum, char* Data, size_t size ) +__weak int DebuggerPort_Read( COM_HANDLE ComPortNum, char* Data, size_t size ) { NATIVE_PROFILE_PAL_COM(); return 0; } -BOOL DebuggerPort_Flush( COM_HANDLE ComPortNum ) +__weak BOOL DebuggerPort_Flush( COM_HANDLE ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return true; } -BOOL DebuggerPort_IsSslSupported( COM_HANDLE ComPortNum ) +__weak BOOL DebuggerPort_IsSslSupported( COM_HANDLE ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL DebuggerPort_UpgradeToSsl( COM_HANDLE ComPortNum, UINT32 flags ) +__weak BOOL DebuggerPort_UpgradeToSsl( COM_HANDLE ComPortNum, UINT32 flags ) { NATIVE_PROFILE_PAL_COM(); return FALSE; } -BOOL DebuggerPort_IsUsingSsl( COM_HANDLE ComPortNum ) +__weak BOOL DebuggerPort_IsUsingSsl( COM_HANDLE ComPortNum ) { NATIVE_PROFILE_PAL_COM(); return FALSE; @@ -58,18 +58,18 @@ BOOL DebuggerPort_IsUsingSsl( COM_HANDLE ComPortNum ) ////////////////////////////////////////////////////////////////////////////////// -void CPU_InitializeCommunication() +__weak void CPU_InitializeCommunication() { NATIVE_PROFILE_PAL_COM(); } -void CPU_UninitializeCommunication() +__weak void CPU_UninitializeCommunication() { NATIVE_PROFILE_PAL_COM(); } -void CPU_ProtectCommunicationGPIOs( BOOL On ) +__weak void CPU_ProtectCommunicationGPIOs( BOOL On ) { NATIVE_PROFILE_PAL_COM(); } diff --git a/DeviceCode/pal/COM/usart/stubs/usart_stubs.cpp b/DeviceCode/pal/COM/usart/stubs/usart_stubs.cpp index b024ffef4..4505800ec 100644 --- a/DeviceCode/pal/COM/usart/stubs/usart_stubs.cpp +++ b/DeviceCode/pal/COM/usart/stubs/usart_stubs.cpp @@ -7,77 +7,77 @@ //--// -BOOL USART_Initialize( int ComPortNum, int BaudRate, int Parity, int DataBits, int StopBits, int FlowValue ) +__weak BOOL USART_Initialize( int ComPortNum, int BaudRate, int Parity, int DataBits, int StopBits, int FlowValue ) { return TRUE; } -BOOL USART_Uninitialize( int ComPortNum ) +__weak BOOL USART_Uninitialize( int ComPortNum ) { return TRUE; } -int USART_Write( int ComPortNum, const char* Data, size_t size ) +__weak int USART_Write( int ComPortNum, const char* Data, size_t size ) { return 0; } -int USART_Read( int ComPortNum, char* Data, size_t size ) +__weak int USART_Read( int ComPortNum, char* Data, size_t size ) { return 0; } -BOOL USART_Flush( int ComPortNum ) +__weak BOOL USART_Flush( int ComPortNum ) { return TRUE; } -BOOL USART_AddCharToRxBuffer( int ComPortNum, char c ) +__weak BOOL USART_AddCharToRxBuffer( int ComPortNum, char c ) { return TRUE; } -BOOL USART_RemoveCharFromTxBuffer( int ComPortNum, char& c ) +__weak BOOL USART_RemoveCharFromTxBuffer( int ComPortNum, char& c ) { return TRUE; } -INT8 USART_PowerSave( int ComPortNum, INT8 Enable ) +__weak INT8 USART_PowerSave( int ComPortNum, INT8 Enable ) { return 0; } -void USART_PrepareForClockStop() +__weak void USART_PrepareForClockStop() { } -void USART_ClockStopFinished() +__weak void USART_ClockStopFinished() { } -void USART_ForceXON(int ComPortNum) +__weak void USART_ForceXON(int ComPortNum) { } -void USART_CloseAllPorts() +__weak void USART_CloseAllPorts() { } -int USART_BytesInBuffer( int ComPortNum, BOOL fRx ) +__weak int USART_BytesInBuffer( int ComPortNum, BOOL fRx ) { return 0; } -void USART_DiscardBuffer( int ComPortNum, BOOL fRx ) +__weak void USART_DiscardBuffer( int ComPortNum, BOOL fRx ) { } -BOOL USART_ConnectEventSink( int ComPortNum, int EventType, void* pContext, PFNUsartEvent pfnUsartEvtHandler, void** ppArg ) +__weak BOOL USART_ConnectEventSink( int ComPortNum, int EventType, void* pContext, PFNUsartEvent pfnUsartEvtHandler, void** ppArg ) { return TRUE; } -void USART_SetEvent( int ComPortNum, unsigned int event ) +__weak void USART_SetEvent( int ComPortNum, unsigned int event ) { } diff --git a/DeviceCode/pal/COM/usart/usart.cpp b/DeviceCode/pal/COM/usart/usart.cpp index 6e93a9bde..dcfcd381f 100644 --- a/DeviceCode/pal/COM/usart/usart.cpp +++ b/DeviceCode/pal/COM/usart/usart.cpp @@ -12,6 +12,8 @@ static const INT8 XOFF_CLOCK_HALT = 0x02; //--// +extern uint32_t GetUSARTInterruptEnableState(int comPortNum); + BOOL USART_Initialize( int ComPortNum, int BaudRate, int Parity, int DataBits, int StopBits, int FlowValue ) { @@ -416,9 +418,6 @@ BOOL USART_Driver::Flush( int ComPortNum ) if ( IS_POWERSAVE_ENABLED(State) || (!IS_USART_INITIALIZED(State))) return TRUE; - - UINT32 IrqId = USART_TX_IRQ_INDEX(ComPortNum); - if ((USART_FLAG_STATE(State, HAL_USART_STATE::c_TX_SWFLOW_CTRL) && (!USART_FLAG_STATE(State, HAL_USART_STATE::c_TX_XON_STATE))) || !CPU_USART_TxHandshakeEnabledState(ComPortNum)) { @@ -431,7 +430,7 @@ BOOL USART_Driver::Flush( int ComPortNum ) { GLOBAL_LOCK(irq); - if(irq.WasDisabled() || !CPU_USART_TxBufferEmptyInterruptState( ComPortNum ) || 0 == CPU_INTC_InterruptEnableState( IrqId )) + if(irq.WasDisabled() || !CPU_USART_TxBufferEmptyInterruptState( ComPortNum ) || 0 == GetUSARTInterruptEnableState(ComPortNum)) { while(State.TxQueue.IsEmpty() == false) { @@ -557,7 +556,9 @@ BOOL USART_Driver::AddCharToRxBuffer( int ComPortNum, char c ) SetEvent( ComPortNum, USART_EVENT_ERROR_RXOVER ); #if !defined(BUILD_RTM) +#ifdef FEATURE_LCD lcd_printf("\fBuffer OVFLW\r\n"); +#endif hal_printf("Buffer OVFLW\r\n"); #endif return FALSE; diff --git a/DeviceCode/pal/COM/usb/stubs/usb_stubs.cpp b/DeviceCode/pal/COM/usb/stubs/usb_stubs.cpp index 7cd937e1c..2dfa61666 100644 --- a/DeviceCode/pal/COM/usb/stubs/usb_stubs.cpp +++ b/DeviceCode/pal/COM/usb/stubs/usb_stubs.cpp @@ -7,77 +7,77 @@ //--// -int USB_GetControllerCount() +__weak int USB_GetControllerCount() { return 0; } -BOOL USB_Initialize( int Controller ) +__weak BOOL USB_Initialize( int Controller ) { return TRUE; } -int USB_Configure( int Controller, const USB_DYNAMIC_CONFIGURATION *config ) +__weak int USB_Configure( int Controller, const USB_DYNAMIC_CONFIGURATION *config ) { return 0; } -const USB_DYNAMIC_CONFIGURATION * USB_GetConfiguration( int Controller ) +__weak const USB_DYNAMIC_CONFIGURATION * USB_GetConfiguration( int Controller ) { return NULL; } -BOOL USB_Uninitialize( int Controller ) +__weak BOOL USB_Uninitialize( int Controller ) { return TRUE; } -BOOL USB_OpenStream( int UsbStream, int writeEP, int readEP ) +__weak BOOL USB_OpenStream( int UsbStream, int writeEP, int readEP ) { return TRUE; } -BOOL USB_CloseStream( int UsbStream ) +__weak BOOL USB_CloseStream( int UsbStream ) { return TRUE; } -int USB_Write( int UsbStream, const char* Data, size_t size ) +__weak int USB_Write( int UsbStream, const char* Data, size_t size ) { return 0; } -int USB_Read( int UsbStream, char* Data, size_t size ) +__weak int USB_Read( int UsbStream, char* Data, size_t size ) { return 0; } -BOOL USB_Flush( int UsbStream ) +__weak BOOL USB_Flush( int UsbStream ) { return TRUE; } -UINT32 USB_GetEvent( int Controller, UINT32 Mask ) +__weak UINT32 USB_GetEvent( int Controller, UINT32 Mask ) { return 0; } -UINT32 USB_SetEvent( int Controller, UINT32 Event ) +__weak UINT32 USB_SetEvent( int Controller, UINT32 Event ) { return 0; } -UINT32 USB_ClearEvent( int Controller, UINT32 Event ) +__weak UINT32 USB_ClearEvent( int Controller, UINT32 Event ) { return 0; } -UINT8 USB_GetStatus( int Controller ) +__weak UINT8 USB_GetStatus( int Controller ) { return USB_DEVICE_STATE_NO_CONTROLLER; } -void USB_DiscardData( int UsbStream, BOOL fTx ) +__weak void USB_DiscardData( int UsbStream, BOOL fTx ) { } diff --git a/DeviceCode/pal/COM/usb/usb.cpp b/DeviceCode/pal/COM/usb/usb.cpp index 56ea0c0ab..c1d9152d4 100644 --- a/DeviceCode/pal/COM/usb/usb.cpp +++ b/DeviceCode/pal/COM/usb/usb.cpp @@ -330,13 +330,13 @@ int USB_Driver::Configure( int Controller, const USB_DYNAMIC_CONFIGURATION* Conf // if(State->Configuration != &UsbDefaultConfiguration) { - private_free((void*)State->Configuration); + free((void*)State->Configuration); } // // Make sure that we allocate the native configuration buffer, the one passed in will be garbage collected // - State->Configuration = (USB_DYNAMIC_CONFIGURATION*)private_malloc(Length); + State->Configuration = (USB_DYNAMIC_CONFIGURATION*)malloc(Length); // @@ -355,7 +355,7 @@ int USB_Driver::Configure( int Controller, const USB_DYNAMIC_CONFIGURATION* Conf // // The GetConfiguration method will attempt to load the configurate from the config sector in flash -// Since the USB configuration is of variable size, this method may use private_malloc, therefore, +// Since the USB configuration is of variable size, this method may use malloc, therefore, // this method should not be called prior to the heap initialization. // const USB_DYNAMIC_CONFIGURATION * USB_Driver::GetConfiguration( int Controller ) @@ -385,7 +385,7 @@ const USB_DYNAMIC_CONFIGURATION * USB_Driver::GetConfiguration( int Controller ) // If the requested USB configuration was not found in the Flash configuration sector void *pConfig = NULL; - // this calls private_malloc + // this calls malloc if(HAL_CONFIG_BLOCK::ApplyConfig( configName, NULL, 0, (void**)&pConfig ) && pConfig != NULL) { State->Configuration = (const USB_DYNAMIC_CONFIGURATION *)pConfig; diff --git a/DeviceCode/pal/COM/usb_cmsis/dotNetMF.proj b/DeviceCode/pal/COM/usb_cmsis/dotNetMF.proj new file mode 100644 index 000000000..febed39ff --- /dev/null +++ b/DeviceCode/pal/COM/usb_cmsis/dotNetMF.proj @@ -0,0 +1,52 @@ + + + + usb_cmsis_pal + + + {3d058cbb-bf52-4d63-aa81-bd051aff8e57} + USB CMSIS driver + PAL + usb_cmsis_pal.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\PAL\COM\USB_CMSIS\dotNetMF.proj + usb_cmsis_pal.$(LIB_EXT).manifest + USB + + + + 4 + 0 + 0 + 0 + + 2009-04-30 + + LibraryCategory + + + + + False + + + False + False + False + DeviceCode\pal\COM\usb_cmsis + Library + false + 4.0.0.0 + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/USB/dotNetMF.proj b/DeviceCode/pal/COM/usb_cmsis/stubs/dotNetMF.proj similarity index 63% rename from Solutions/STM32F4DISCOVERY/DeviceCode/USB/dotNetMF.proj rename to DeviceCode/pal/COM/usb_cmsis/stubs/dotNetMF.proj index 268123ba2..d1a1d4126 100644 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/USB/dotNetMF.proj +++ b/DeviceCode/pal/COM/usb_cmsis/stubs/dotNetMF.proj @@ -1,16 +1,18 @@ + - usb_pal_config_STM32F4DISCOVERY + usb_cmsis_pal_stubs - {1E492742-72F7-4F15-B682-3508D973F136} - USB PAL configuration for STM32F4DISCOVERY solution + {bfafed59-3a1d-446f-a7c1-1a2c9f43aaa2} + USB CMSIS stub driver PAL - usb_pal_config_STM32F4DISCOVERY.$(LIB_EXT) - usb_pal_config_STM32F4DISCOVERY.$(LIB_EXT).manifest - Solutions\STM32F4DISCOVERY + usb_cmsis_pal_stubs.$(LIB_EXT) + $(SPOCLIENT)\DeviceCode\PAL\COM\USB_CMSIS\stubs\dotNetMF.proj + usb_cmsis_pal_stubs.$(LIB_EXT).manifest + USB - + 4 0 @@ -29,8 +31,8 @@ False False - False - Solutions\STM32F4DISCOVERY\DeviceCode\USB + True + DeviceCode\pal\COM\usb_cmsis\stubs Library false 4.0.0.0 @@ -39,8 +41,11 @@ + - + + + - + \ No newline at end of file diff --git a/DeviceCode/pal/COM/usb_cmsis/stubs/usb_config.cpp b/DeviceCode/pal/COM/usb_cmsis/stubs/usb_config.cpp new file mode 100644 index 000000000..c16cb25e3 --- /dev/null +++ b/DeviceCode/pal/COM/usb_cmsis/stubs/usb_config.cpp @@ -0,0 +1,64 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Copyright (c) Microsoft Corporation. All rights reserved. +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include +#include + +//--// + +const char* UsbStrings[] = { NULL }; + +#define MANUFACTURER_NAME_SIZE 1 +#define PRODUCT_NAME_SIZE 1 +#define DISPLAY_NAME_SIZE 1 +#define FRIENDLY_NAME_SIZE 1 + + +ADS_PACKED struct GNU_PACKED USB_DYNAMIC_CONFIGURATION +{ + USB_DEVICE_DESCRIPTOR device; + USB_CONFIGURATION_DESCRIPTOR config; + USB_INTERFACE_DESCRIPTOR itfc0; + USB_ENDPOINT_DESCRIPTOR ep1; + USB_ENDPOINT_DESCRIPTOR ep2; + USB_STRING_DESCRIPTOR_HEADER manHeader; + USB_STRING_CHAR manString[MANUFACTURER_NAME_SIZE]; + USB_STRING_DESCRIPTOR_HEADER prodHeader; + USB_STRING_CHAR prodString[PRODUCT_NAME_SIZE]; + USB_STRING_DESCRIPTOR_HEADER string4; + USB_STRING_CHAR displayString[DISPLAY_NAME_SIZE]; + USB_STRING_DESCRIPTOR_HEADER string5; + USB_STRING_CHAR friendlyString[FRIENDLY_NAME_SIZE]; + USB_OS_STRING_DESCRIPTOR OS_String; + USB_XCOMPATIBLE_OS_ID OS_XCompatible_ID; + USB_XPROPERTIES_OS_WINUSB OS_XProperty; + USB_DESCRIPTOR_HEADER endList; +}; + +extern const ADS_PACKED struct GNU_PACKED USB_DYNAMIC_CONFIGURATION UsbDefaultConfiguration; + +const ADS_PACKED struct GNU_PACKED USB_DYNAMIC_CONFIGURATION UsbDefaultConfiguration= +{ + { + { + 0, + 0, + 0, + }, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + }, +}; diff --git a/DeviceCode/pal/COM/usb_cmsis/stubs/usb_stubs.cpp b/DeviceCode/pal/COM/usb_cmsis/stubs/usb_stubs.cpp new file mode 100644 index 000000000..2dfa61666 --- /dev/null +++ b/DeviceCode/pal/COM/usb_cmsis/stubs/usb_stubs.cpp @@ -0,0 +1,84 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Copyright (c) Microsoft Corporation. All rights reserved. +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include "tinyhal.h" + +//--// + + +__weak int USB_GetControllerCount() +{ + return 0; +} + +__weak BOOL USB_Initialize( int Controller ) +{ + return TRUE; +} + +__weak int USB_Configure( int Controller, const USB_DYNAMIC_CONFIGURATION *config ) +{ + return 0; +} + +__weak const USB_DYNAMIC_CONFIGURATION * USB_GetConfiguration( int Controller ) +{ + return NULL; +} + +__weak BOOL USB_Uninitialize( int Controller ) +{ + return TRUE; +} + +__weak BOOL USB_OpenStream( int UsbStream, int writeEP, int readEP ) +{ + return TRUE; +} + +__weak BOOL USB_CloseStream( int UsbStream ) +{ + return TRUE; +} + +__weak int USB_Write( int UsbStream, const char* Data, size_t size ) +{ + return 0; +} + +__weak int USB_Read( int UsbStream, char* Data, size_t size ) +{ + return 0; +} + +__weak BOOL USB_Flush( int UsbStream ) +{ + return TRUE; +} + +__weak UINT32 USB_GetEvent( int Controller, UINT32 Mask ) +{ + return 0; +} + +__weak UINT32 USB_SetEvent( int Controller, UINT32 Event ) +{ + return 0; +} + +__weak UINT32 USB_ClearEvent( int Controller, UINT32 Event ) +{ + return 0; +} + +__weak UINT8 USB_GetStatus( int Controller ) +{ + return USB_DEVICE_STATE_NO_CONTROLLER; +} + +__weak void USB_DiscardData( int UsbStream, BOOL fTx ) +{ +} + + diff --git a/DeviceCode/pal/COM/usb_cmsis/usb.cpp b/DeviceCode/pal/COM/usb_cmsis/usb.cpp new file mode 100644 index 000000000..300c3ca20 --- /dev/null +++ b/DeviceCode/pal/COM/usb_cmsis/usb.cpp @@ -0,0 +1,1635 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Copyright (c) Microsoft Corporation. All rights reserved. +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#include "USB.h" + +#define USB_FLUSH_RETRY_COUNT 1000 + +//--// + +#if defined(BUILD_RTM) +void USB_debug_printf( const char*format, ... ) {} +#else +void USB_debug_printf( const char*format, ... ) {} + +// void USB_debug_printf( const char*format, ... ) +// { +// char buffer[256]; +// va_list arg_ptr; + +// va_start( arg_ptr, format ); + +// int len = hal_vsnprintf( buffer, sizeof(buffer)-1, format, arg_ptr ); + +// // flush existing characters +// DebuggerPort_Flush( USART_DEFAULT_PORT ); + +// // write string +// DebuggerPort_Write( USART_DEFAULT_PORT, buffer, len, 0 ); + +// // flush new characters +// DebuggerPort_Flush( USART_DEFAULT_PORT ); + +// va_end( arg_ptr ); +// } +#endif + +//--// + + +int USB_GetControllerCount() +{ + return USB_Driver::GetControllerCount(); +} + +BOOL USB_Initialize( int Controller ) +{ + return USB_Driver::Initialize( Controller ); +} + +int USB_Configure( int Controller, const USB_DYNAMIC_CONFIGURATION *config ) +{ + return USB_Driver::Configure( Controller, config ); +} + +const USB_DYNAMIC_CONFIGURATION * USB_GetConfiguration( int Controller ) +{ + return USB_Driver::GetConfiguration( Controller ); +} + +BOOL USB_Uninitialize( int Controller ) +{ + return USB_Driver::Uninitialize( Controller ); +} + +BOOL USB_OpenStream( int UsbStream, int writeEP, int readEP ) +{ + return USB_Driver::OpenStream( UsbStream, writeEP, readEP ); +} + +BOOL USB_CloseStream( int UsbStream ) +{ + return USB_Driver::CloseStream( UsbStream ); +} + +int USB_Write( int UsbStream, const char* Data, size_t size ) +{ + return USB_Driver::Write( UsbStream, Data, size ); +} + +int USB_Read( int UsbStream, char* Data, size_t size ) +{ + return USB_Driver::Read( UsbStream, Data, size ); +} + +BOOL USB_Flush( int UsbStream ) +{ + return USB_Driver::Flush(UsbStream); +} + +UINT32 USB_GetEvent( int Controller, UINT32 Mask ) +{ + return USB_Driver::GetEvent( Controller, Mask ); +} + +UINT32 USB_SetEvent( int Controller, UINT32 Event ) +{ + return USB_Driver::SetEvent( Controller, Event ); +} + +UINT32 USB_ClearEvent( int Controller, UINT32 Event ) +{ + return USB_Driver::ClearEvent( Controller, Event ); +} + +UINT8 USB_GetStatus( int Controller ) +{ + return USB_Driver::GetStatus( Controller ); +} + +void USB_DiscardData( int UsbStream, BOOL fTx ) +{ + USB_Driver::DiscardData(UsbStream, fTx); +} + +//--// + +int USB_Driver::GetControllerCount() +{ + return TOTAL_USB_CONTROLLER; +} + +BOOL USB_Driver::Initialize(int controller) +{ + NATIVE_PROFILE_PAL_COM(); + + USB_CONTROLLER_STATE *state = CPU_USB_GetState(controller); + + USB_CONFIGURATION_DESCRIPTOR * Config; + + if(state == NULL) return FALSE; + + // Set all streams to unused + for( int stream = 0; stream < USB_MAX_QUEUES; stream++ ) + { + state->streams[stream].RxEP = USB_NULL_ENDPOINT; + state->streams[stream].TxEP = USB_NULL_ENDPOINT; + } + + state->ControllerNum = controller; + state->CurrentState = USB_DEVICE_STATE_UNINITIALIZED; + state->DeviceStatus |= USB_STATUS_DEVICE_SELF_POWERED; + state->DeviceStatus &= ~USB_STATUS_DEVICE_REMOTE_WAKEUP; + +// #if defined(USB_ALLOW_CONFIGURATION_OVERRIDE) +// // +// // If initialized, uninitilize the current usb stack so that we can override it with a new configuration +// // +// if(State->Initialized && COM_IsUsb(HalSystemConfig.DebuggerPorts[0]) && controller == ConvertCOM_Usbcontroller(HalSystemConfig.DebuggerPorts[0])) +// { +// USB_Driver::Uninitialize( controller ); +// } +// #endif + + // if(State->Configuration == NULL) + // { + // USB_Driver::Configure( Controller, NULL ); + // } + + // // Check if friendly name has been changed + // if(HAL_CONFIG_BLOCK::ApplyConfig( FriendlyNameString.GetDriverName(), (void*)&szFriendlyName[0], sizeof(szFriendlyName) )) + // { + // int length = 0; + + // // Find the real length of the string & expand into String 5 response record + // for(length = 0; length < USB_FRIENDLY_NAME_LENGTH; length++ ) + // { + // // Expand Friendly Name to wchar type in string response buffer + // FriendlyNameString.sFriendlyName[length * sizeof(USB_STRING_CHAR)] = szFriendlyName[length]; + // FriendlyNameString.sFriendlyName[length * sizeof(USB_STRING_CHAR) + 1] = 0; // Roughly convert to wchar_t + + // if( szFriendlyName[length] == 0 ) + // break; + // } + + // // Finish filling out the String descriptor response record + // FriendlyNameString.bLength = (length * sizeof(USB_STRING_CHAR)) + USB_STRING_DESCRIPTOR_HEADER_LENGTH; + // FriendlyNameString.bDescriptorType = USB_STRING_DESCRIPTOR_TYPE; + // } + // else + // { + // // Indicate that "String 5" (if it exists) comes from the configuration + // FriendlyNameString.bLength = 0; + // } + + +// Config = (USB_CONFIGURATION_DESCRIPTOR *)USB_FindRecord( State, USB_CONFIGURATION_DESCRIPTOR_MARKER, 0 ); + +// /* now we actually initialize everything */ +// if(State->Initialized == FALSE && Config != NULL) +// { +// // Remember only the USB configuration information +// const USB_DYNAMIC_CONFIGURATION *Save = State->Configuration; + +// // Wipe the Controller state clean before passing to the hardware driver +// memset( State, 0, sizeof(USB_CONTROLLER_STATE) ); + +// State->Configuration = Save; // Restore the configuration information + +// // Set all streams to unused +// for( int stream = 0; stream < USB_MAX_QUEUES; stream++ ) +// { +// State->streams[stream].RxEP = USB_NULL_ENDPOINT; +// State->streams[stream].TxEP = USB_NULL_ENDPOINT; +// } + +// State->ControllerNum = Controller; +// State->CurrentState = USB_DEVICE_STATE_UNINITIALIZED; + + +// // at configuration descriptor, BUS powered, bmAttribute(bit 6 = 0 and MaxPower != 0) +// // but the Status report is reversed + +// if(Config->bmAttributes & USB_ATTRIBUTE_SELF_POWER) +// { +// State->DeviceStatus |= USB_STATUS_DEVICE_SELF_POWERED; +// } +// else +// { +// State->DeviceStatus &= ~USB_STATUS_DEVICE_SELF_POWERED; +// } + +// // The Remote Wake Up status feature is disabled by default +// // It is currently not necessary since at this time there are +// // no host-side drivers that place the device in a SUSPEND state +// #if defined(USB_REMOTE_WAKEUP) +// if((Config->bmAttributes & USB_ATTRIBUTE_REMOTE_WAKEUP) +// { +// State->DeviceStatus |= USB_STATUS_DEVICE_REMOTE_WAKEUP; +// } +// else +// { +// State->DeviceStatus &= ~USB_STATUS_DEVICE_REMOTE_WAKEUP; +// } +// #endif + + if(CPU_USB_Initialize(controller) != S_OK) + { + return FALSE; + } + +#if defined(USB_ALLOW_CONFIGURATION_OVERRIDE) + // + // Re-initialize the Debugger stream + // + if(COM_IsUsb(HalSystemConfig.DebuggerPorts[0]) && controller == ConvertCOM_UsbController(HalSystemConfig.DebuggerPorts[0])) + { + USB_OpenStream( ConvertCOM_UsbStream(HalSystemConfig.DebuggerPorts[0]), USB_DEBUG_EP_WRITE, USB_DEBUG_EP_READ ); + } +#endif + + state->Initialized = TRUE; + return TRUE; +// } + + //return FALSE; +} + +int USB_Driver::Configure( int Controller, const USB_DYNAMIC_CONFIGURATION* Config ) +{ + NATIVE_PROFILE_PAL_COM(); + if( Controller > 9 ) + return USB_CONFIG_ERR_NO_CONTROLLER; + + int err; + size_t Length = 0; + USB_DESCRIPTOR_HEADER *configHeader; + char configName[5] = { 'U', 'S', 'B', '1' + (char)Controller, 0 }; + USB_CONTROLLER_STATE* State = CPU_USB_GetState( Controller ); + + // Check if controller exists + if( NULL == State ) + return USB_CONFIG_ERR_NO_CONTROLLER; + + // Cannot alter the configuration while the Controller is running +#if !defined(USB_ALLOW_CONFIGURATION_OVERRIDE) + if( State->Initialized ) + return USB_CONFIG_ERR_STARTED; +#endif + + // If the default configuration is to be used + if( Config == NULL ) + { + // FIXME + //Config = &UsbDefaultConfiguration; + } + + // Check the configuration to be sure that there are no glaring errors + err = UsbConfigurationCheck( Config ); + + if( err != USB_CONFIG_ERR_OK ) + return err; + + // only save non default configurations + // FIXME + //if(Config != &UsbDefaultConfiguration) + if(Config != 0) + { + configHeader = (USB_DESCRIPTOR_HEADER *)Config; + + // Calculate the size of the default USB configuration + while( configHeader->marker != USB_END_DESCRIPTOR_MARKER ) + { + Length += configHeader->size; + configHeader = configHeader->next(configHeader); + } + Length += sizeof(USB_DESCRIPTOR_HEADER); // Don't forget to include the ending header + + // Write the default USB configuration to the Flash config sector + HAL_CONFIG_BLOCK::UpdateBlockWithName(configName, (void *)Config, Length, TRUE); + + + // + // Free the old configuration (UsbDefaultConfiguration is a global variable so do not free it) + // + // if(State->Configuration != &UsbDefaultConfiguration) + // { + // private_free((void*)State->Configuration); + // } + + // + // Make sure that we allocate the native configuration buffer, the one passed in will be garbage collected + // + State->Configuration = (USB_DYNAMIC_CONFIGURATION*)private_malloc(Length); + + // + + // Copy the configuration from the temporary config (from the caller) + // + memcpy((void*)State->Configuration, (void*)Config, Length); + } + else + { + // Set the configuration for this Controller + State->Configuration = Config; + } + + return err; +} + +// +// The GetConfiguration method will attempt to load the configurate from the config sector in flash +// Since the USB configuration is of variable size, this method may use private_malloc, therefore, +// this method should not be called prior to the heap initialization. +// +const USB_DYNAMIC_CONFIGURATION * USB_Driver::GetConfiguration( int Controller ) +{ + NATIVE_PROFILE_PAL_COM(); + + USB_CONTROLLER_STATE *State = CPU_USB_GetState( Controller ); + char configName[5] = { 'U', 'S', 'B', '1' + Controller, 0 }; + + // Check if controller exists + if(NULL == State) + return NULL; + + // return immediately if we already have a configuration (other than the default) + // FIXME + // if(State->Configuration != NULL && State->Configuration != &UsbDefaultConfiguration) + // { + // if(USB_CONFIG_ERR_OK == UsbConfigurationCheck( State->Configuration )) + // { + // return State->Configuration; + // } + // } + + // It is assumed that the Flash config sector will only change while in TinyBooter, and so if the + // configuration is in the Flash config sector, it will always be OK since TinyBooter always + // uses the configuration in initialized RAM. + + // If the requested USB configuration was not found in the Flash configuration sector + void *pConfig = NULL; + + // this calls private_malloc + if(HAL_CONFIG_BLOCK::ApplyConfig( configName, NULL, 0, (void**)&pConfig ) && pConfig != NULL) + { + State->Configuration = (const USB_DYNAMIC_CONFIGURATION *)pConfig; + + // Check the configuration to be sure that there are no glaring errors + if(USB_CONFIG_ERR_OK != UsbConfigurationCheck( State->Configuration )) + { + // FIXME + //State->Configuration = &UsbDefaultConfiguration; + } + } + else + { + // FIXME + // Use the default USB configuration + //State->Configuration = &UsbDefaultConfiguration; + } + + return State->Configuration; +} + +BOOL USB_Driver::Uninitialize( int Controller ) +{ + NATIVE_PROFILE_PAL_COM(); + + USB_CONTROLLER_STATE *State = CPU_USB_GetState( Controller ); + + if(NULL == State) return FALSE; + + + if(State->Initialized == FALSE) return FALSE; + + // All streams must be closed on the Controller, or it may not be uninitialized (stopped) + for(int stream = 0; stream < USB_MAX_QUEUES; stream++) + { +#if defined(USB_ALLOW_CONFIGURATION_OVERRIDE) + // + // Ignore the debugger stream as we will only close it if we need to + // + if((TRUE == COM_IsUsb (HalSystemConfig.DebuggerPorts[0])) && + (Controller == ConvertCOM_UsbController(HalSystemConfig.DebuggerPorts[0])) && + (stream == ConvertCOM_UsbStream (HalSystemConfig.DebuggerPorts[0]))) + { + continue; + } +#endif + + if(State->streams[stream].RxEP != USB_NULL_ENDPOINT || State->streams[stream].TxEP != USB_NULL_ENDPOINT) + { + return FALSE; + } + } + + // + // If we have gotten this far then all other streams are closed so close the debugger streams (if applicable) + // +#if defined(USB_ALLOW_CONFIGURATION_OVERRIDE) + if(COM_IsUsb(HalSystemConfig.DebuggerPorts[0]) && Controller == ConvertCOM_UsbController(HalSystemConfig.DebuggerPorts[0])) + { + USB_CloseStream(ConvertCOM_UsbStream(HalSystemConfig.DebuggerPorts[0])); + } +#endif + + // Stop all activity on the specified Controller and make it appear disconnected from the host + State->Initialized = FALSE; + + CPU_USB_Uninitialize( Controller ); + + // for soft reboot allow the USB to be off for at least 100ms + HAL_Time_Sleep_MicroSeconds(100000); // 100ms + + return TRUE; +} + +BOOL USB_Driver::OpenStream(int UsbStream, int writeEP, int readEP) +{ + NATIVE_PROFILE_PAL_COM(); + + int controller = ConvertCOM_UsbController (UsbStream); + int streamIndex = ConvertCOM_UsbStreamIndex(UsbStream); + + USB_CONTROLLER_STATE * state = CPU_USB_GetState(controller); + + if( NULL == state || !state->Initialized ) + { + // If no such controller exists (or it is not initialized) + return FALSE; + } + + // Check the StreamIndex and the two endpoint numbers for validity (both endpoints cannot be zero) + if(streamIndex >= USB_MAX_QUEUES + || (readEP == USB_NULL_ENDPOINT && writeEP == USB_NULL_ENDPOINT) + || (readEP != USB_NULL_ENDPOINT && (readEP < 1 || readEP >= USB_MAX_QUEUES)) + || (writeEP != USB_NULL_ENDPOINT && (writeEP < 1 || writeEP >= USB_MAX_QUEUES))) + { + return FALSE; + } + + // The Stream must be currently closed + if(state->streams[streamIndex].RxEP != USB_NULL_ENDPOINT || state->streams[streamIndex].TxEP != USB_NULL_ENDPOINT) + { + return FALSE; + } + + // The requested endpoints must have been configured + if((readEP != USB_NULL_ENDPOINT && state->Queues[readEP] == NULL) || (writeEP != USB_NULL_ENDPOINT && state->Queues[writeEP] == NULL)) + { + return FALSE; + } + + // The requested endpoints can only be used in the direction specified by the configuration + if((readEP != USB_NULL_ENDPOINT && state->IsTxQueue[readEP]) || (writeEP != USB_NULL_ENDPOINT && !state->IsTxQueue[writeEP])) + { + return FALSE; + } + + // The specified endpoints must not be in use by another stream + for(int stream = 0; stream < USB_MAX_QUEUES; stream++) + { + if(readEP != USB_NULL_ENDPOINT && (state->streams[stream].RxEP == readEP || state->streams[stream].TxEP == readEP)) + { + return FALSE; + } + + if(writeEP != USB_NULL_ENDPOINT && (state->streams[stream].RxEP == writeEP || state->streams[stream].TxEP == writeEP)) + { + return FALSE; + } + } + + // All tests pass, assign the endpoints to the stream + { + state->streams[streamIndex].RxEP = readEP; + state->streams[streamIndex].TxEP = writeEP; + } + + return TRUE; +} + +BOOL USB_Driver::CloseStream ( int UsbStream ) +{ + NATIVE_PROFILE_PAL_COM(); + + int Controller = ConvertCOM_UsbController ( UsbStream ); + int StreamIndex = ConvertCOM_UsbStreamIndex( UsbStream ); + + USB_CONTROLLER_STATE * State = CPU_USB_GetState( Controller ); + + if( NULL == State || !State->Initialized ) + return FALSE; + + if( StreamIndex >= USB_MAX_QUEUES ) + return FALSE; + + { + int endpoint; + + // Close the Rx stream + endpoint = State->streams[StreamIndex].RxEP; + if( endpoint != USB_NULL_ENDPOINT && State->Queues[endpoint] ) + { + State->Queues[endpoint]->Initialize(); // Clear the queue + } + State->streams[StreamIndex].RxEP = USB_NULL_ENDPOINT; + + // Close the TX stream + endpoint = State->streams[StreamIndex].TxEP; + if( endpoint != USB_NULL_ENDPOINT && State->Queues[endpoint] ) + { + State->Queues[endpoint]->Initialize(); // Clear the queue + } + State->streams[StreamIndex].TxEP = USB_NULL_ENDPOINT; + } + + return TRUE; +} + +int USB_Driver::Write( int UsbStream, const char* Data, size_t size ) +{ + NATIVE_PROFILE_PAL_COM(); + + int Controller = ConvertCOM_UsbController ( UsbStream ); + int StreamIndex = ConvertCOM_UsbStreamIndex( UsbStream ); + int endpoint; + int totWrite = 0; + USB_CONTROLLER_STATE * State = CPU_USB_GetState( Controller ); + + // if( NULL == State || StreamIndex >= USB_MAX_QUEUES ) + // { + // return -1; + // } + + if(size == 0 ) return 0; + if(Data == NULL) + { + return -1; + } + + // // If the Controller is not yet initialized + // if(State->DeviceState != USB_DEVICE_STATE_CONFIGURED) + // { + // // No data can be sent until the controller is initialized + // return -1; + // } + + endpoint = State->streams[StreamIndex].TxEP; + // If no Write side to stream (or if not yet open) + if( endpoint == USB_NULL_ENDPOINT || State->Queues[endpoint] == NULL ) + { + return -1; + } + else + { + GLOBAL_LOCK(irq); + + const char* ptr = Data; + UINT32 count = size; + BOOL Done = FALSE; + UINT32 WaitLoopCnt = 0; + + // This loop packetizes the data and sends it out. All packets sent have + // the maximum size for the given endpoint except for the last packet which + // will always have less than the maximum size - even if the packet length + // must be zero for this to occur. This is done to comply with standard + // USB bulk-mode transfers. + while(!Done) + { + + USB_PACKET64* Packet64 = State->Queues[endpoint]->Push(); + + if(Packet64) + { + UINT32 max_move; + + if(count > State->MaxPacketSize[endpoint]) + max_move = State->MaxPacketSize[endpoint]; + else + max_move = count; + + if(max_move) + { + memcpy( Packet64->Buffer, ptr, max_move ); + } + + // we are done when we send a non-full length packet + if(max_move < State->MaxPacketSize[endpoint]) + { + Done = TRUE; + } + + Packet64->Size = max_move; + count -= max_move; + ptr += max_move; + + totWrite += max_move; + + WaitLoopCnt = 0; + } + else + { + // a 64-byte USB packet takes less than 50uSec + // according to the timing calculations of the USB Chief + // this is way too short to bother with a call + // to WaitForEventsInternal, so just uSec delay the path + // here for 50uSec. + + // if in ISR, return + + // if more than 100*50us=5ms,still no packet avaialable, PC side go wrong,stop the loop + // otherwise it will spin here forever and stopwatch get kick in. + WaitLoopCnt++; + if(WaitLoopCnt > 100) + { + // if we were unable to send any data then no one is listening so lets + if(count == size) + { + State->Queues[endpoint]->Initialize(); + } + + return totWrite; + } + + if(SystemState_QueryNoLock( SYSTEM_STATE_ISR )) + { + return totWrite; + } + + if(irq.WasDisabled()) // @todo - this really needs more checks to be totally valid + { + return totWrite; + } + + if(State->DeviceState != USB_DEVICE_STATE_CONFIGURED) + { + return totWrite; + } + + CPU_USB_StartOutput( State, endpoint ); + + irq.Release(); +// lcd_printf("Looping in write\r\n"); + + HAL_Time_Sleep_MicroSeconds_InterruptEnabled(50); + + irq.Acquire(); + } + } + + // here we have a post-condition that IRQs are disabled for all paths through conditional block above + + //if(State->DeviceState == USB_DEVICE_STATE_CONFIGURED) + // { + CPU_USB_StartOutput( State, endpoint ); + //} + + return totWrite; + } +} + +int USB_Driver::Read( int UsbStream, char* Data, size_t size ) +{ + NATIVE_PROFILE_PAL_COM(); + + int Controller = ConvertCOM_UsbController ( UsbStream ); + int StreamIndex = ConvertCOM_UsbStreamIndex( UsbStream ); + int endpoint; + USB_CONTROLLER_STATE * State = CPU_USB_GetState( Controller ); + + // if( NULL == State || StreamIndex >= USB_MAX_QUEUES ) + // { + // return 0; + // } + + // /* not configured, no data can go in or out */ + // if( State->DeviceState != USB_DEVICE_STATE_CONFIGURED ) + // { + // return 0; + // } + + endpoint = State->streams[StreamIndex].RxEP; + // If no Read side to stream (or if not yet open) + if( endpoint == USB_NULL_ENDPOINT || State->Queues[endpoint] == NULL ) + { + return 0; + } + + { + GLOBAL_LOCK(irq); + + USB_PACKET64* Packet64 = NULL; + UINT8* ptr = (UINT8*)Data; + UINT32 count = 0; + UINT32 remain = size; + + while(count < size) + { + UINT32 max_move; + + if(!Packet64) Packet64 = State->Queues[endpoint]->Peek(); + + if(!Packet64) + { + USB_ClearEvent( Controller, 1 << endpoint ); + break; + } + + max_move = Packet64->Size - State->CurrentPacketOffset[endpoint]; + if(remain < max_move) max_move = remain; + + memcpy( ptr, &Packet64->Buffer[ State->CurrentPacketOffset[endpoint] ], max_move ); + + State->CurrentPacketOffset[endpoint] += max_move; + ptr += max_move; + count += max_move; + remain -= max_move; + + /* if we're done with this packet, move onto the next */ + if(State->CurrentPacketOffset[endpoint] == Packet64->Size) + { + State->CurrentPacketOffset[endpoint] = 0; + Packet64 = NULL; + + State->Queues[endpoint]->Pop(); + + CPU_USB_RxEnable( State, endpoint ); + } + } + + return count; + } +} + +BOOL USB_Driver::Flush( int UsbStream ) +{ + NATIVE_PROFILE_PAL_COM(); + + int Controller = ConvertCOM_UsbController ( UsbStream ); + int StreamIndex = ConvertCOM_UsbStreamIndex( UsbStream ); + int endpoint; + int retries = USB_FLUSH_RETRY_COUNT; + int queueCnt; + USB_CONTROLLER_STATE * State = CPU_USB_GetState( Controller ); + + // if( NULL == State || StreamIndex >= USB_MAX_QUEUES ) + // { + // return FALSE; + // } + + // /* not configured, no data can go in or out */ + // if(State->DeviceState != USB_DEVICE_STATE_CONFIGURED) + // { + // return TRUE; + // } + + // endpoint = State->streams[StreamIndex].TxEP; + // // If no Write side to stream (or if not yet open) + // if( endpoint == USB_NULL_ENDPOINT || State->Queues[endpoint] == NULL ) + // { + // return FALSE; + // } + + queueCnt = State->Queues[endpoint]->NumberOfElements(); + + // interrupts were disabled or USB interrupt was disabled for whatever reason, so force the flush + while(State->Queues[endpoint]->IsEmpty() == false && retries > 0) + { + CPU_USB_StartOutput( State, endpoint ); + + HAL_Time_Sleep_MicroSeconds_InterruptEnabled(100); // don't call Events_WaitForEventsXXX because it will turn off interrupts + + int cnt = State->Queues[endpoint]->NumberOfElements(); + retries = (queueCnt == cnt) ? retries-1: USB_FLUSH_RETRY_COUNT; + queueCnt = cnt; + } + + if(retries <=0) + { + State->Queues[endpoint]->Initialize(); + } + + return TRUE; +} + +UINT32 USB_Driver::GetEvent( int Controller, UINT32 Mask ) +{ + GLOBAL_LOCK(irq); + + USB_CONTROLLER_STATE *State = CPU_USB_GetState( Controller ); + + if( State ) + return (State->Event & Mask); + else + return 0; +} + +UINT32 USB_Driver::SetEvent( int Controller, UINT32 Event ) +{ + GLOBAL_LOCK(irq); + + USB_CONTROLLER_STATE *State = CPU_USB_GetState( Controller ); + + if( State == NULL ) + return 0; + + UINT32 OldEvent = State->Event; + + State->Event |= Event; + + if(OldEvent != State->Event) + { + Events_Set( SYSTEM_EVENT_FLAG_USB_IN ); + } + +//printf("SetEv %d\r\n",State->Event); + return OldEvent; +} + +UINT32 USB_Driver::ClearEvent( int Controller, UINT32 Event ) +{ + GLOBAL_LOCK(irq); + + USB_CONTROLLER_STATE *State = CPU_USB_GetState( Controller ); + + if( State == NULL ) + return 0; + + UINT32 OldEvent = State->Event; + + State->Event &= ~Event; + + if( State->Event == 0 ) + { + Events_Clear( SYSTEM_EVENT_FLAG_USB_IN ); + } + +//printf("ClrEV %d\r\n",State->Event); + return OldEvent; +} + +UINT8 USB_Driver::GetStatus( int Controller ) +{ + USB_CONTROLLER_STATE *State = CPU_USB_GetState( Controller ); + + if( State == NULL ) + return USB_DEVICE_STATE_NO_CONTROLLER; + + if( !State->Initialized || State->Configuration == NULL ) + return USB_DEVICE_STATE_UNINITIALIZED; + + return State->CurrentState; +} + +void USB_Driver::DiscardData( int UsbStream, BOOL fTx ) +{ + int Controller = ConvertCOM_UsbController ( UsbStream ); + int StreamIndex = ConvertCOM_UsbStreamIndex( UsbStream ); + int endpoint; + USB_CONTROLLER_STATE *State = CPU_USB_GetState( Controller ); + + if( State == NULL ) + return; + + if( !State->Initialized || State->Configuration == NULL ) + return; + + if(fTx) + { + endpoint = State->streams[StreamIndex].TxEP; + } + else + { + endpoint = State->streams[StreamIndex].RxEP; + } + + // If no Read side to stream (or if not yet open) + if( endpoint == USB_NULL_ENDPOINT || State->Queues[endpoint] == NULL ) + { + return; + } + + if( State->Queues[endpoint] ) + { + State->Queues[endpoint]->Initialize(); + } +} + +//--// + +void USB_ClearQueues( USB_CONTROLLER_STATE *State, BOOL ClrRxQueue, BOOL ClrTxQueue ) +{ + GLOBAL_LOCK(irq); + + if(ClrRxQueue) + { + for(int endpoint = 0; endpoint < USB_MAX_QUEUES; endpoint++) + { + if( State->Queues[endpoint] == NULL || State->IsTxQueue[endpoint] ) + continue; + State->Queues[endpoint]->Initialize(); + + /* since this queue is now reset, we have room available for newly arrived packets */ + CPU_USB_RxEnable( State, endpoint ); + } + } + + if( ClrTxQueue ) + { + for(int endpoint = 0; endpoint < USB_MAX_QUEUES; endpoint++) + { + if( State->Queues[endpoint] && State->IsTxQueue[endpoint] ) + State->Queues[endpoint]->Initialize(); + } + } +} + +void USB_StateCallback( USB_CONTROLLER_STATE* State ) +{ + if(State->CurrentState != State->DeviceState) + { + /* whenever we leave the configured state, re-initialize all of the queues */ +//Not necessary, as TxBuffer may hold any data and then send them out when it is configured again. +// The RxQueue is clear when it is configured. + + if(USB_DEVICE_STATE_CONFIGURED == State->CurrentState) + { + USB_ClearQueues( State, TRUE, TRUE ); + } + + State->CurrentState = State->DeviceState; + + switch(State->DeviceState) + { + case USB_DEVICE_STATE_DETACHED: + State->ResidualCount =0; + State->DataCallback = NULL; +// hal_printf("USB_DEVICE_STATE_DETACHED\r\n"); + break; + + case USB_DEVICE_STATE_ATTACHED: +// hal_printf("USB_DEVICE_STATE_ATTACHED\r\n"); + break; + + case USB_DEVICE_STATE_POWERED: +// hal_printf("USB_DEVICE_STATE_POWERED\r\n"); + break; + + case USB_DEVICE_STATE_DEFAULT: +// hal_printf("USB_DEVICE_STATE_DEFAULT\r\n"); + break; + + case USB_DEVICE_STATE_ADDRESS: +// hal_printf("USB_DEVICE_STATE_ADDRESS\r\n"); + break; + + case USB_DEVICE_STATE_CONFIGURED: +// hal_printf("USB_DEVICE_STATE_CONFIGURED\r\n"); + + /* whenever we enter the configured state, re-initialize all of the RxQueues */ + /* Txqueue has stored some data to be transmitted */ + USB_ClearQueues( State, TRUE, FALSE ); + break; + + case USB_DEVICE_STATE_SUSPENDED: +// hal_printf("USB_DEVICE_STATE_SUSPENDED\r\n"); + break; + + default: + ASSERT(0); + break; + } + } +} + +void USB_DataCallback( USB_CONTROLLER_STATE* State ) +{ + UINT32 length = __min(State->PacketSize, State->ResidualCount); + + memcpy( State->Data, State->ResidualData, length ); + + State->DataSize = length; + State->ResidualData += length; + State->ResidualCount -= length; + + if(length == State->PacketSize) + { + State->Expected -= length; + } + else + { + State->Expected = 0; + } + + if(State->Expected) + { + State->DataCallback = USB_DataCallback; + } + else + { + State->DataCallback = NULL; + } +} + +UINT8 USB_HandleGetStatus( USB_CONTROLLER_STATE* State, USB_SETUP_PACKET* Setup ) +{ + UINT16* status; + UINT16 zero = 0; + + /* validate setup packet */ + if(Setup->wValue != 0 || Setup->wLength != 2) + { + return USB_STATE_STALL; + } + + /* validate based on device state */ + if(State->DeviceState == USB_DEVICE_STATE_DEFAULT) + { + return USB_STATE_STALL; + } + + switch(USB_SETUP_RECIPIENT(Setup->bmRequestType)) + { + case USB_SETUP_RECIPIENT_DEVICE: + status = &State->DeviceStatus; + break; + + case USB_SETUP_RECIPIENT_INTERFACE: + if(State->DeviceState != USB_DEVICE_STATE_CONFIGURED) + { + return USB_STATE_STALL; + } + + status = &zero; + break; + + case USB_SETUP_RECIPIENT_ENDPOINT: + if(State->DeviceState == USB_DEVICE_STATE_ADDRESS && Setup->wIndex != 0) + { + return USB_STATE_STALL; + } + + /* bit 0x80 designates direction, which we don't utilize in this calculation */ + Setup->wIndex &= 0x7F; + + if(Setup->wIndex >= State->EndpointCount) + { + return USB_STATE_STALL; + } + + status = &State->EndpointStatus[Setup->wIndex]; + break; + + default: + return USB_STATE_STALL; + } + + /* send requested status to host */ + State->ResidualData = (UINT8*)status; + State->ResidualCount = 2; + State->DataCallback = USB_DataCallback; + + return USB_STATE_DATA; +} + +UINT8 USB_HandleClearFeature( USB_CONTROLLER_STATE* State, USB_SETUP_PACKET* Setup ) +{ + USB_CONFIGURATION_DESCRIPTOR * Config; + UINT8 retState; + + /* validate setup packet */ + if(Setup->wLength != 0) + { + return USB_STATE_STALL; + } + + /* validate based on device state */ + if(State->DeviceState != USB_DEVICE_STATE_CONFIGURED) + { + return USB_STATE_STALL; + } + + switch(USB_SETUP_RECIPIENT(Setup->bmRequestType)) + { + case USB_SETUP_RECIPIENT_DEVICE: + // only support Remote wakeup + if(Setup->wValue != USB_FEATURE_DEVICE_REMOTE_WAKEUP) + return USB_STATE_STALL; + + // Locate the configuration descriptor + Config = (USB_CONFIGURATION_DESCRIPTOR *)USB_FindRecord( State, USB_CONFIGURATION_DESCRIPTOR_MARKER, Setup ); + + if(Config && (Config->bmAttributes & USB_ATTRIBUTE_REMOTE_WAKEUP)) + { + State->DeviceStatus &= ~USB_STATUS_DEVICE_REMOTE_WAKEUP; + retState = USB_STATE_REMOTE_WAKEUP; + } + else + { + return USB_STATE_STALL; + } + break; + + case USB_SETUP_RECIPIENT_INTERFACE: + /* there are no interface features to clear */ + return USB_STATE_STALL; + + case USB_SETUP_RECIPIENT_ENDPOINT: + if(State->DeviceState == USB_DEVICE_STATE_ADDRESS && Setup->wIndex != 0) + return USB_STATE_STALL; + + /* bit 0x80 designates direction, which we dont utilize in this calculation */ + Setup->wIndex &= 0x7F; + + if(Setup->wIndex == 0 || Setup->wIndex >= State->EndpointCount) + return USB_STATE_STALL; + + if(Setup->wValue != USB_FEATURE_ENDPOINT_HALT) + return USB_STATE_STALL; + + /* clear the halt feature */ + State->EndpointStatus[Setup->wIndex] &= ~USB_STATUS_ENDPOINT_HALT; + State->EndpointStatusChange = Setup->wIndex; + retState= USB_STATE_STATUS; + break; + + default: + return USB_STATE_STALL; + } + + /* send zero-length packet to tell host we're done */ + State->ResidualCount = 0; + State->DataCallback = USB_DataCallback; + + /* notify lower layer of status change */ + return retState; +} + +UINT8 USB_HandleSetFeature( USB_CONTROLLER_STATE* State, USB_SETUP_PACKET* Setup ) +{ + USB_CONFIGURATION_DESCRIPTOR * Config; + UINT8 retState; + + /* validate setup packet */ + if(Setup->wLength != 0) + { + return USB_STATE_STALL; + } + + /* validate based on device state */ + if(State->DeviceState == USB_DEVICE_STATE_DEFAULT) + { + return USB_STATE_STALL; + } + + switch(USB_SETUP_RECIPIENT(Setup->bmRequestType)) + { + case USB_SETUP_RECIPIENT_DEVICE: + // only support Remote wakeup + if(Setup->wValue != USB_FEATURE_DEVICE_REMOTE_WAKEUP) + { + return USB_STATE_STALL; + } + + Config = (USB_CONFIGURATION_DESCRIPTOR *)USB_FindRecord( State, USB_CONFIGURATION_DESCRIPTOR_MARKER, Setup ); + if( Config == NULL ) // If the configuration record could not be found + return USB_STATE_STALL; // Something pretty serious is wrong + + if(Config->bmAttributes & USB_ATTRIBUTE_REMOTE_WAKEUP) + { + State->DeviceStatus |= USB_STATUS_DEVICE_REMOTE_WAKEUP; + } + + retState = USB_STATE_REMOTE_WAKEUP; + break; + + case USB_SETUP_RECIPIENT_INTERFACE: + /* there are no interface features to set */ + return USB_STATE_STALL; + + case USB_SETUP_RECIPIENT_ENDPOINT: + if(State->DeviceState == USB_DEVICE_STATE_ADDRESS && Setup->wIndex != 0) + { + return USB_STATE_STALL; + } + + /* bit 0x80 designates direction, which we don't utilize in this calculation */ + Setup->wIndex &= 0x7F; + + if(Setup->wIndex == 0 || Setup->wIndex >= State->EndpointCount) + { + return USB_STATE_STALL; + } + + if(Setup->wValue != USB_FEATURE_ENDPOINT_HALT) + { + return USB_STATE_STALL; + } + + /* set the halt feature */ + State->EndpointStatus[Setup->wIndex] |= USB_STATUS_ENDPOINT_HALT; + State->EndpointStatusChange = Setup->wIndex; + retState = USB_STATE_STATUS; + break; + + default: + return USB_STATE_STALL; + } + + /* send zero-length packet to tell host we're done */ + State->ResidualCount = 0; + State->DataCallback = USB_DataCallback; + + /* notify lower layer of status change */ + return retState; +} + +UINT8 USB_HandleSetAddress( USB_CONTROLLER_STATE* State, USB_SETUP_PACKET* Setup ) +{ + /* validate setup packet */ + if(Setup->wValue > 127 || Setup->wIndex != 0 || Setup->wLength != 0) + { + return USB_STATE_STALL; + } + + /* validate based on device state */ + if(State->DeviceState >= USB_DEVICE_STATE_CONFIGURED) + { + return USB_STATE_STALL; + } + + /* set address */ + State->Address = Setup->wValue; + + /* catch state changes */ + if(State->Address == 0) + { + State->DeviceState = USB_DEVICE_STATE_DEFAULT; + } + else + { + State->DeviceState = USB_DEVICE_STATE_ADDRESS; + } + + USB_StateCallback( State ); + + /* send zero-length packet to tell host we're done */ + State->ResidualCount = 0; + State->DataCallback = USB_DataCallback; + + /* notify hardware of address change */ + return USB_STATE_ADDRESS; +} + +//--// + +// Searches through the USB Configuration records for the requested type +// Returns a pointer to the header information if found and NULL if not +const USB_DESCRIPTOR_HEADER * USB_FindRecord( USB_CONTROLLER_STATE* State, UINT8 marker, USB_SETUP_PACKET * setup ) +{ + bool Done = false; + const USB_DESCRIPTOR_HEADER * header = (const USB_DESCRIPTOR_HEADER *)State->Configuration; + + // If there is no configuration for this Controller + if( NULL == header ) + return header; + + while( !Done ) + { + const UINT8 * next = (const UINT8 *)header; + next += header->size; // Calculate address of next record + const USB_GENERIC_DESCRIPTOR_HEADER *generic = (USB_GENERIC_DESCRIPTOR_HEADER *)header; + + switch( header->marker ) + { + case USB_DEVICE_DESCRIPTOR_MARKER: + case USB_CONFIGURATION_DESCRIPTOR_MARKER: + if( header->marker == marker ) + Done = true; + break; + case USB_STRING_DESCRIPTOR_MARKER: + // If String descriptor then the index is significant + if( (header->marker == marker) && (header->iValue == (setup->wValue & 0x00FF)) ) + Done = true; + break; + case USB_GENERIC_DESCRIPTOR_MARKER: + if( generic->bmRequestType == setup->bmRequestType && + generic->bRequest == setup->bRequest && + generic->wValue == setup->wValue && + generic->wIndex == setup->wIndex ) + { + Done = true; + } + break; + case USB_END_DESCRIPTOR_MARKER: + default: + Done = true; + header = NULL; + break; + } + if( !Done ) + header = (const USB_DESCRIPTOR_HEADER *)next; // Try next record + } + + return header; +} + +USB_PACKET64* USB_RxEnqueue( USB_CONTROLLER_STATE* State, int endpoint, BOOL& DisableRx ) +{ + ASSERT_IRQ_MUST_BE_OFF(); + ASSERT( State && (endpoint < USB_MAX_QUEUES) ); + ASSERT( State->Queues[endpoint] && !State->IsTxQueue[endpoint] ) + + USB_PACKET64* Packet64 = State->Queues[endpoint]->Push(); + + DisableRx = State->Queues[endpoint]->IsFull(); + + USB_SetEvent( State->ControllerNum, 1 << endpoint ); + + return Packet64; +} + +USB_PACKET64* USB_TxDequeue( USB_CONTROLLER_STATE* State, int endpoint, BOOL Done ) +{ + ASSERT_IRQ_MUST_BE_OFF(); + ASSERT( State && (endpoint < USB_MAX_QUEUES) ); + ASSERT( State->Queues[endpoint] && State->IsTxQueue[endpoint] ) + + if(Done) + { + return State->Queues[endpoint]->Pop(); + } + else + { + return State->Queues[endpoint]->Peek(); + } +} + +// UsbConfigurationCheck() +// Checks each record of a USB descriptor list for simple mistakes. This test should +// always be performed before allowing a USB port to be initialized with the descriptor +// list. +// +// NOTE: TODO: Endpoints need to be checked for overlap (must not be used more than once). +int UsbConfigurationCheck( const USB_DYNAMIC_CONFIGURATION *firstRecord ) +{ + return USB_CONFIG_ERR_OK; + + ///////// + + const UINT8 *next; + const USB_DESCRIPTOR_HEADER *record; + + const USB_DEVICE_DESCRIPTOR *device; + const USB_CONFIGURATION_DESCRIPTOR *configuration; + const USB_INTERFACE_DESCRIPTOR *interface; + const USB_ENDPOINT_DESCRIPTOR *endpoint; + const USB_STRING_DESCRIPTOR_HEADER *string; + const USB_GENERIC_DESCRIPTOR_HEADER *generic; + + UINT8 nInterfaces = 0; + UINT8 nEndpoints = 0; + bool foundDevice = false; + bool foundConfig = false; + bool epUsed[31]; + UINT8 itfcUsed[10]; + int i; + + int recordError = USB_CONFIG_ERR_OK; + + for( i = 0; i < 31; i++ ) + epUsed[i] = false; // Set all endpoints to unused + + for( i = 0; i < 10; i++ ) + itfcUsed[i] = 0xFF; // Empty interface list + + for( record = (const USB_DESCRIPTOR_HEADER *)firstRecord; USB_CONFIG_ERR_OK == recordError; record = (const USB_DESCRIPTOR_HEADER *)next ) + { + next = (const UINT8 *)record; + next += record->size; // Calculate address of next record + + switch( record->marker ) + { + case USB_END_DESCRIPTOR_MARKER: + if( foundDevice && foundConfig ) + return recordError; + recordError = USB_CONFIG_ERR_MISSING_RECORD; + break; + + case USB_DEVICE_DESCRIPTOR_MARKER: + if( foundDevice ) + { + recordError = USB_CONFIG_ERR_DUP_DEVICE; + break; // Only one device descriptor allowed + } + device = (const USB_DEVICE_DESCRIPTOR *)record; + if( record->size != sizeof(USB_DEVICE_DESCRIPTOR) || device->bLength != USB_DEVICE_DESCRIPTOR_LENGTH ) + { + recordError = USB_CONFIG_ERR_DEVICE_SIZE; + break; // Record has wrong length + } + if( device->bDescriptorType != USB_DEVICE_DESCRIPTOR_TYPE ) + { + recordError = USB_CONFIG_ERR_DEVICE_TYPE; + break; // Not actually a device descriptor + } + if( device->bMaxPacketSize0 != 8 && device->bMaxPacketSize0 != 16 + && device->bMaxPacketSize0 != 32 && device->bMaxPacketSize0 != 64 ) + { + recordError = USB_CONFIG_ERR_EP0_SIZE; + break; // Endpoint 0 packet size is not legal + } + if( device->bNumConfigurations != 1 ) + { + recordError = USB_CONFIG_ERR_NCONFIGS; + break; // Only exactly 1 configuration is allowed + } + foundDevice = true; + break; + case USB_CONFIGURATION_DESCRIPTOR_MARKER: + if( foundConfig ) + { + recordError = USB_CONFIG_ERR_DUP_CONFIG; + break; // Only one configuration descriptor allowed + } + configuration = (USB_CONFIGURATION_DESCRIPTOR *)record; + if( configuration->bLength != USB_CONFIGURATION_DESCRIPTOR_LENGTH + || record->size != (configuration->wTotalLength + sizeof(USB_DESCRIPTOR_HEADER)) ) + { + recordError = USB_CONFIG_ERR_CONFIG_SIZE; + break; // Record sizes wrong or do not match + } + if( configuration->bDescriptorType != USB_CONFIGURATION_DESCRIPTOR_TYPE ) + { + recordError = USB_CONFIG_ERR_CONFIG_TYPE; + break; // Not actually a configuration descriptor + } + nInterfaces = configuration->bNumInterfaces; + if( nInterfaces == 0 ) + { + recordError = USB_CONFIG_ERR_NO_INTERFACE; + break; // There must be at least one interface + } + if( configuration->bConfigurationValue > 1 ) + { + recordError = USB_CONFIG_ERR_CONFIG_NUM; + break; // Only allow configuration numbers less than 2 + } + if( (configuration->bmAttributes & 0x8F) != 0x80 ) + { + recordError = USB_CONFIG_ERR_CONFIG_ATTR; + break; // Attribute byte has wrong format + } + // First interface descriptor is right after configuration descriptor + interface = (const USB_INTERFACE_DESCRIPTOR *)&configuration[1]; + while( nInterfaces-- ) + { + if( interface->bDescriptorType != USB_INTERFACE_DESCRIPTOR_TYPE ) + { + recordError = USB_CONFIG_ERR_INTERFACE_TYPE; + break; // Not really an interface descriptor + } + if( interface->bLength != sizeof(USB_INTERFACE_DESCRIPTOR) ) + { + recordError = USB_CONFIG_ERR_INTERFACE_LEN; + break; // Length of interface descriptor is wrong + } + if( interface->bAlternateSetting != 0 ) + { + recordError = USB_CONFIG_ERR_INTERFACE_ALT; + break; // Alternate interfaces not allowed + } + nEndpoints = interface->bNumEndpoints; + if( nEndpoints == 0 ) + { + recordError = USB_CONFIG_ERR_NO_ENDPOINT; + break; // Each interface must have at least one endpoint + } + for( i = 0; itfcUsed[i] != 0xFF && i < 10; i++ ) + { + // If this interface number has already been used + if( itfcUsed[i] == interface->bInterfaceNumber ) + { + recordError = USB_CONFIG_ERR_DUP_INTERFACE; + break; + } + } + if( i >= 10 ) + { + recordError = USB_CONFIG_ERR_TOO_MANY_ITFC; + break; + } + itfcUsed[i] = interface->bInterfaceNumber; // Mark interface as used + endpoint = (const USB_ENDPOINT_DESCRIPTOR *)&interface[1]; // First endpoint is right after interface + // Records after interface descriptor may be some kind of class descriptor + while( endpoint->bDescriptorType != USB_ENDPOINT_DESCRIPTOR_TYPE ) + { + // Leap over possible interface class descriptor + const UINT8 *classDescriptor = (const UINT8 *)endpoint; + classDescriptor += endpoint->bLength; // Position of length is the same for any descriptor + endpoint = (const USB_ENDPOINT_DESCRIPTOR *)classDescriptor; + } + while( nEndpoints-- ) + { + if( endpoint->bDescriptorType != USB_ENDPOINT_DESCRIPTOR_TYPE ) + { + recordError = USB_CONFIG_ERR_ENDPOINT_TYPE; + break; // Not really an endpoint descriptor + } + if( endpoint->bLength != sizeof(USB_ENDPOINT_DESCRIPTOR) ) + { + recordError = USB_CONFIG_ERR_ENDPOINT_LEN; + break; // Length of endpoint descriptor is wrong + } + if( (endpoint->bEndpointAddress & 0x7F) < 1 || (endpoint->bEndpointAddress & 0x7F) > 31 ) + { + recordError = USB_CONFIG_ERR_ENDPOINT_RANGE; + break; // Endpoint number either zero or too large + } + if( (endpoint->bmAttributes & 0x03) == 0 || (endpoint->bmAttributes & 0xC0) != 0 ) + { + recordError = USB_CONFIG_ERR_ENDPOINT_ATTR; + break; // Endpoint set to control type or has reserved bits set + } + if( epUsed[(endpoint->bEndpointAddress & 0x7F)-1] ) + { + recordError = USB_CONFIG_ERR_DUP_ENDPOINT; + break; + } + epUsed[(endpoint->bEndpointAddress & 0x7F)-1] = true; // Show endpoint as being used + endpoint = &endpoint[1]; // Next endpoint immediately follows last one + } + if( recordError != USB_CONFIG_ERR_OK ) + break; + interface = (USB_INTERFACE_DESCRIPTOR *)endpoint; // Next interface descriptor is right after last endpoint + } + // If all interfaces & endpoints are OK and end of all configuration descriptors coincides + // with the start of the next record, only then is this record good. + if( recordError != USB_CONFIG_ERR_OK ) + break; + if( ((UINT8 *)interface == next) ) + foundConfig = true; + else + recordError = USB_CONFIG_ERR_CONFIG_SIZE; + break; + + case USB_STRING_DESCRIPTOR_MARKER: + string = (const USB_STRING_DESCRIPTOR_HEADER *)record; + if( record->size != (string->bLength + sizeof(USB_DESCRIPTOR_HEADER)) ) + { + recordError = USB_CONFIG_ERR_STRING_SIZE; + break; // Record sizes do not match + } + if( string->bDescriptorType != USB_STRING_DESCRIPTOR_TYPE ) + { + recordError = USB_CONFIG_ERR_STRING_TYPE; + break; // Not actually a string descriptor + } + break; + case USB_GENERIC_DESCRIPTOR_MARKER: + generic = (const USB_GENERIC_DESCRIPTOR_HEADER *)record; + if( (generic->bmRequestType & 0x80) != 0x80 ) + { + recordError = USB_CONFIG_ERR_GENERIC_DIR; + break; // Must be a request for information + } + break; + default: + recordError = USB_CONFIG_ERR_UNKNOWN_RECORD; + break; + } + } + + return recordError; +} + +//--// + +STREAM_DRIVER_DETAILS* USB1_driver_details( UINT32 handle ) +{ + static STREAM_DRIVER_DETAILS details = { + SYSTEM_BUFFERED_IO, + NULL, + NULL, + 1024, + 1024, + TRUE, + TRUE, + FALSE + }; + + return &details; +} + +int USB1_read( char* buffer, size_t size ) +{ + return USB_Read( ConvertCOM_UsbStream(USB1), buffer, size ); +} + +int USB1_write( char* buffer, size_t size ) +{ + return USB_Write( ConvertCOM_UsbStream(USB1), buffer, size ); +} diff --git a/DeviceCode/pal/COM/usb_cmsis/usb.h b/DeviceCode/pal/COM/usb_cmsis/usb.h new file mode 100644 index 000000000..9b18a0743 --- /dev/null +++ b/DeviceCode/pal/COM/usb_cmsis/usb.h @@ -0,0 +1,142 @@ +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// +// Copyright (c) Microsoft Corporation. All rights reserved. +//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// + +#ifndef _PAL_USB_H_ +#define _PAL_USB_H_ 1 + +//--// + +#include "Tinyhal.h" + +//--// + +void USB_debug_printf( const char*format, ... ); + +//--// + +#if defined(BUILD_RTM) + #undef USB_METRIC_COUNTING + #undef USB_METRIC_NAK_COUNTING + +#else + #define USB_METRIC_COUNTING 1 +// #undef USB_METRIC_COUNTING +// turn off NAK, as NAK-in will trigger all the time +// #define USB_METRIC_NAK_COUNTING 1 + #undef USB_METRIC_NAK_COUNTING +#endif + +//--// + +#define PORT_TX_TO_ENDPOINT(P) (((P) << 1) | 1) +#define PORT_RX_TO_ENDPOINT(P) (((P) << 1) + 2) + +//--// + +extern USB_SETUP_PACKET RequestPacket; + +//--// + +extern UINT8 USB_HandleSetConfiguration( USB_CONTROLLER_STATE* State, USB_SETUP_PACKET* Setup, BOOL DataPhase); + +extern USB_PACKET64* USB_RxEnqueue( USB_CONTROLLER_STATE* State, int queue, BOOL& DisableRx ); +extern USB_PACKET64* USB_TxDequeue( USB_CONTROLLER_STATE* State, int queue, BOOL Done ); + +extern UINT8 USB_ControlCallback ( USB_CONTROLLER_STATE* State ); +extern void USB_StateCallback ( USB_CONTROLLER_STATE* State ); + +extern int UsbConfigurationCheck ( const USB_DYNAMIC_CONFIGURATION* firstRecord ); +extern BOOL USB_NextEndpoint ( USB_CONTROLLER_STATE* State, const USB_ENDPOINT_DESCRIPTOR* &ep, const USB_INTERFACE_DESCRIPTOR* &itfc ); + +//--// + +#if defined( USB_REMOTE_WAKEUP) +enum USB_REMOTEWKUP_STATE +{ + USB_REMOTEWKUP_NOT_READY = 0, // not allowed any remote wake up + USB_REMOTEWKUP_WAIT_SD5 = 1, // wait for 5ms idle for allow remote wk up + USB_REMOTEWKUP_SD5_READY = 2, // SD5 is fulfilled + USB_REMOTEWKUP_WAIT_10MS = 3, // hold remote wk up signal for 10ms when Remotewk up is implememnted + USB_REMOTEWKUP_10MS_READY = 4, // complete 10 ms RESUME + USB_REMOTEWKUP_WAIT_EOP = 5, // wait for the EOP + USB_REMOTEWKUP_EOP_READY = 6, // Receive EOP isr + USB_REMOTEWKUP_100MS_EXPIRE =0xBA //error of not found EOP +}; +#endif + +#if defined(USB_METRIC_COUNTING) +struct USB_PERFORMANCE_METRICS +{ + UINT32 RxErrCnt; // sum of any Rx err + UINT32 TxErrCnt; // sum of any Tx Err + UINT32 ULDCnt; + UINT32 InNAKCnt[3]; // NAK cnt for each endpoint, except ep0 + UINT32 OutNAKCnt[3]; + UINT32 FrameCnt; + UINT32 OverunCnt[3]; //For ep2, ep4, ep6 (rx ep) (ep0 no err) + UINT32 UnderunCnt[3]; // for ep1, ep3, ep5, (tx ep) + UINT32 SD5Cnt; + UINT32 SD3Cnt; + UINT32 EOPCnt; + UINT32 DMACnt; + UINT32 ResumeCnt; +}; +#endif + +//--// + +extern const char* UsbStrings[]; + +extern +#if !defined(_ARC) // the ARC compiler does not like const in ths situation +const +#else +#endif +ADS_PACKED struct USB_DYNAMIC_CONFIGURATION UsbDefaultConfiguration; + +//--// + +void USB_ClearQueues( USB_CONTROLLER_STATE *State, BOOL ClrRxQueue, BOOL ClrTxQueue ); + +USB_PACKET64* USB_RxEnqueue( int queue, BOOL& DisableRx ); +USB_PACKET64* USB_TxDequeue( int queue, BOOL Done ); + +UINT8 USB_VendorControl( USB_CONTROLLER_STATE* State, USB_SETUP_PACKET* Setup); + +UINT8 USB_ControlCallback( USB_CONTROLLER_STATE* State ); + +void USB_StateCallback(USB_CONTROLLER_STATE *State); + +void USB_DataCallback(USB_CONTROLLER_STATE *State); + +const USB_DESCRIPTOR_HEADER * USB_FindRecord(USB_CONTROLLER_STATE* State, UINT8 marker, USB_SETUP_PACKET * iValue); + +//--// + +struct USB_Driver +{ + static int GetControllerCount(); + static BOOL Initialize ( int Controller ); + static BOOL Uninitialize( int Controller ); + static int Configure ( int Controller, const USB_DYNAMIC_CONFIGURATION* Config ); + static const USB_DYNAMIC_CONFIGURATION * GetConfiguration( int Controller ); + + static BOOL OpenStream ( int stream, int writeEP, int readEP ); + static BOOL CloseStream ( int stream ); + + static int Write( int UsbStream, const char* Data, size_t size ); + static int Read ( int UsbStream, char* Data, size_t size ); + static BOOL Flush( int UsbStream ); + + static UINT32 GetEvent ( int Controller, UINT32 Mask ); + static UINT32 SetEvent ( int Controller, UINT32 Event ); + static UINT32 ClearEvent( int Controller, UINT32 Event ); + static UINT8 GetStatus ( int Controller ); + + static void DiscardData( int UsbStream, BOOL fTx ); +}; + +//--// + +#endif /* _PAL_USB_H_ */ diff --git a/DeviceCode/pal/Diagnostics/stubs/native_profiler_stubs.cpp b/DeviceCode/pal/Diagnostics/stubs/native_profiler_stubs.cpp index bfc66847d..0696e6382 100644 --- a/DeviceCode/pal/Diagnostics/stubs/native_profiler_stubs.cpp +++ b/DeviceCode/pal/Diagnostics/stubs/native_profiler_stubs.cpp @@ -15,41 +15,41 @@ #include "..\Native_Profiler.h" -Native_Profiler::Native_Profiler() +__weak Native_Profiler::Native_Profiler() { } -Native_Profiler::~Native_Profiler() +__weak Native_Profiler::~Native_Profiler() { } -void Native_Profiler_Init() +__weak void Native_Profiler_Init() { } -void Native_Profiler_Dump() +__weak void Native_Profiler_Dump() { } -void Native_Profiler_WriteToCOM(void *buffer, UINT32 size) +__weak void Native_Profiler_WriteToCOM(void *buffer, UINT32 size) { } -UINT64 Native_Profiler_TimeInMicroseconds() +__weak UINT64 Native_Profiler_TimeInMicroseconds() { return 0; } -void Native_Profiler_Start() +__weak void Native_Profiler_Start() { } -void Native_Profiler_Stop() +__weak void Native_Profiler_Stop() { } diff --git a/DeviceCode/pal/Gesture/stubs/gesture_stubs.cpp b/DeviceCode/pal/Gesture/stubs/gesture_stubs.cpp index 29b97bd09..cccf71318 100644 --- a/DeviceCode/pal/Gesture/stubs/gesture_stubs.cpp +++ b/DeviceCode/pal/Gesture/stubs/gesture_stubs.cpp @@ -4,17 +4,17 @@ #include -HRESULT Gesture_Initialize() +__weak HRESULT Gesture_Initialize() { return CLR_E_NOTIMPL; } -HRESULT Gesture_Uninitialize() +__weak HRESULT Gesture_Uninitialize() { return CLR_E_NOTIMPL; } -void Gesture_ProcessPoint(UINT32 flags, UINT16 source, UINT16 x, UINT16 y, INT64 time) +__weak void Gesture_ProcessPoint(UINT32 flags, UINT16 source, UINT16 x, UINT16 y, INT64 time) { } diff --git a/DeviceCode/pal/Ink/stubs/ink_stubs.cpp b/DeviceCode/pal/Ink/stubs/ink_stubs.cpp index 1543cf5d8..66b8f879b 100644 --- a/DeviceCode/pal/Ink/stubs/ink_stubs.cpp +++ b/DeviceCode/pal/Ink/stubs/ink_stubs.cpp @@ -4,22 +4,22 @@ #include -HRESULT Ink_Initialize() +__weak HRESULT Ink_Initialize() { return CLR_E_NOTIMPL; } -HRESULT Ink_Uninitialize() +__weak HRESULT Ink_Uninitialize() { return CLR_E_NOTIMPL; } -HRESULT Ink_SetRegion(InkRegionInfo* inkRegionInfo) +__weak HRESULT Ink_SetRegion(InkRegionInfo* inkRegionInfo) { return CLR_E_NOTIMPL; } -HRESULT Ink_ResetRegion() +__weak HRESULT Ink_ResetRegion() { return CLR_E_NOTIMPL; } diff --git a/DeviceCode/pal/MFUpdate/stubs/MFUpdate_stub.cpp b/DeviceCode/pal/MFUpdate/stubs/MFUpdate_stub.cpp index 77031d908..14e753cc0 100644 --- a/DeviceCode/pal/MFUpdate/stubs/MFUpdate_stub.cpp +++ b/DeviceCode/pal/MFUpdate/stubs/MFUpdate_stub.cpp @@ -4,67 +4,67 @@ #include -void MFUpdate_Initialize(void) +__weak void MFUpdate_Initialize(void) { } -BOOL MFUpdate_GetProperty( UINT32 updateHandle, LPCSTR szPropName, UINT8* pPropValue, INT32* pPropValueSize ) +__weak BOOL MFUpdate_GetProperty( UINT32 updateHandle, LPCSTR szPropName, UINT8* pPropValue, INT32* pPropValueSize ) { return FALSE; } -BOOL MFUpdate_SetProperty( UINT32 updateHandle, LPCSTR szPropName, UINT8* pPropValue, INT32 pPropValueSize ) +__weak BOOL MFUpdate_SetProperty( UINT32 updateHandle, LPCSTR szPropName, UINT8* pPropValue, INT32 pPropValueSize ) { return FALSE; } -INT32 MFUpdate_InitUpdate( LPCSTR szProvider, MFUpdateHeader& update ) +__weak INT32 MFUpdate_InitUpdate( LPCSTR szProvider, MFUpdateHeader& update ) { return -1; } -BOOL MFUpdate_AuthCommand( INT32 updateHandle, UINT32 cmd, UINT8* pArgs, INT32 argsLen, UINT8* pResponse, INT32& responseLen ) +__weak BOOL MFUpdate_AuthCommand( INT32 updateHandle, UINT32 cmd, UINT8* pArgs, INT32 argsLen, UINT8* pResponse, INT32& responseLen ) { return FALSE; } -BOOL MFUpdate_Authenticate( INT32 updateHandle, UINT8* pAuthData, INT32 authLen ) +__weak BOOL MFUpdate_Authenticate( INT32 updateHandle, UINT8* pAuthData, INT32 authLen ) { return FALSE; } -BOOL MFUpdate_Open( INT32 updateHandle ) +__weak BOOL MFUpdate_Open( INT32 updateHandle ) { return FALSE; } -BOOL MFUpdate_Create( INT32 updateHandle ) +__weak BOOL MFUpdate_Create( INT32 updateHandle ) { return FALSE; } -BOOL MFUpdate_GetMissingPackets( INT32 updateHandle, UINT32* pPacketBits, INT32* pCount ) +__weak BOOL MFUpdate_GetMissingPackets( INT32 updateHandle, UINT32* pPacketBits, INT32* pCount ) { return FALSE; } -BOOL MFUpdate_AddPacket( INT32 updateHandle, INT32 packetIndex, UINT8* packetData, INT32 packetLen, UINT8* pValidationData, INT32 validationLen ) +__weak BOOL MFUpdate_AddPacket( INT32 updateHandle, INT32 packetIndex, UINT8* packetData, INT32 packetLen, UINT8* pValidationData, INT32 validationLen ) { return FALSE; } -BOOL MFUpdate_Validate( INT32 updateHandle, UINT8* pValidationData, INT32 validationLen ) +__weak BOOL MFUpdate_Validate( INT32 updateHandle, UINT8* pValidationData, INT32 validationLen ) { return FALSE; } -BOOL MFUpdate_Install( INT32 updateHandle, UINT8* pValidationData, INT32 validationLen ) +__weak BOOL MFUpdate_Install( INT32 updateHandle, UINT8* pValidationData, INT32 validationLen ) { return FALSE; } -BOOL MFUpdate_Delete( INT32 updateHandle ) +__weak BOOL MFUpdate_Delete( INT32 updateHandle ) { return FALSE; } diff --git a/DeviceCode/pal/OneWire/Stubs/OneWireLinkLevelDriver_stubs.cpp b/DeviceCode/pal/OneWire/Stubs/OneWireLinkLevelDriver_stubs.cpp index 07a06b8fc..67035b029 100644 --- a/DeviceCode/pal/OneWire/Stubs/OneWireLinkLevelDriver_stubs.cpp +++ b/DeviceCode/pal/OneWire/Stubs/OneWireLinkLevelDriver_stubs.cpp @@ -47,7 +47,7 @@ // Returns: TRUE(1): presense pulse(s) detected, device(s) reset // FALSE(0): no presense pulses detected // -SMALLINT owTouchReset(int portnum) +__weak SMALLINT owTouchReset(int portnum) { return FALSE; //no presense pulses detected } @@ -65,7 +65,7 @@ SMALLINT owTouchReset(int portnum) // Returns: 0: 0 bit read from sendbit // 1: 1 bit read from sendbit // -SMALLINT owTouchBit(int portnum, SMALLINT sendbit) +__weak SMALLINT owTouchBit(int portnum, SMALLINT sendbit) { return 0; } @@ -82,7 +82,7 @@ SMALLINT owTouchBit(int portnum, SMALLINT sendbit) // // Returns: 8 bits read from sendbyte // -SMALLINT owTouchByte(int portnum, SMALLINT sendbyte) +__weak SMALLINT owTouchByte(int portnum, SMALLINT sendbyte) { return 0; } @@ -99,7 +99,7 @@ SMALLINT owTouchByte(int portnum, SMALLINT sendbyte) // Returns: TRUE: bytes written and echo was the same // FALSE: echo was not the same // -SMALLINT owWriteByte(int portnum, SMALLINT sendbyte) +__weak SMALLINT owWriteByte(int portnum, SMALLINT sendbyte) { return FALSE; } @@ -113,7 +113,7 @@ SMALLINT owWriteByte(int portnum, SMALLINT sendbyte) // // Returns: 8 bytes read from 1-Wire Net // -SMALLINT owReadByte(int portnum) +__weak SMALLINT owReadByte(int portnum) { return 0; } @@ -129,7 +129,7 @@ SMALLINT owReadByte(int portnum) // // Returns: current 1-Wire Net speed // -SMALLINT owSpeed(int portnum, SMALLINT new_speed) +__weak SMALLINT owSpeed(int portnum, SMALLINT new_speed) { return 0; } @@ -149,7 +149,7 @@ SMALLINT owSpeed(int portnum, SMALLINT new_speed) // Returns: current 1-Wire Net level // // Note: Strong and Program not supported on 520 target. -SMALLINT owLevel(int portnum, SMALLINT new_level) +__weak SMALLINT owLevel(int portnum, SMALLINT new_level) { return 0x00; } @@ -164,7 +164,7 @@ SMALLINT owLevel(int portnum, SMALLINT new_level) // Returns: TRUE successful // FALSE program voltage not available // -SMALLINT owProgramPulse(int portnum) +__weak SMALLINT owProgramPulse(int portnum) { return 0; } @@ -183,7 +183,7 @@ SMALLINT owProgramPulse(int portnum) // Returns: TRUE: bytes written and echo was the same // FALSE: echo was not the same // -SMALLINT owWriteBytePower(int portnum, SMALLINT sendbyte) +__weak SMALLINT owWriteBytePower(int portnum, SMALLINT sendbyte) { // not supported on the by the DS520 return FALSE; @@ -203,7 +203,7 @@ SMALLINT owWriteBytePower(int portnum, SMALLINT sendbyte) // Returns: TRUE: bit written and response correct, strong pullup now on // FALSE: response incorrect // -SMALLINT owReadBitPower(int portnum, SMALLINT applyPowerResponse) +__weak SMALLINT owReadBitPower(int portnum, SMALLINT applyPowerResponse) { // not supported on the by the DS520 return FALSE; @@ -217,7 +217,7 @@ SMALLINT owReadBitPower(int portnum, SMALLINT applyPowerResponse) // // Returns: TRUE if adapter is capable of delivering power. // -SMALLINT owHasPowerDelivery(int portnum) +__weak SMALLINT owHasPowerDelivery(int portnum) { // add adapter specific code here return FALSE; @@ -231,7 +231,7 @@ SMALLINT owHasPowerDelivery(int portnum) // // Returns: TRUE if adapter is capable of over drive. // -SMALLINT owHasOverDrive(int portnum) +__weak SMALLINT owHasOverDrive(int portnum) { // add adapter specific code here return FALSE; @@ -245,7 +245,7 @@ SMALLINT owHasOverDrive(int portnum) // // Returns: TRUE program volatage available // FALSE program voltage not available -SMALLINT owHasProgramPulse(int portnum) +__weak SMALLINT owHasProgramPulse(int portnum) { // add adapter specific code here return FALSE; diff --git a/DeviceCode/pal/OneWire/Stubs/OneWireLinkLevelSession_stubs.cpp b/DeviceCode/pal/OneWire/Stubs/OneWireLinkLevelSession_stubs.cpp index 5a00dc7db..3dcf36663 100644 --- a/DeviceCode/pal/OneWire/Stubs/OneWireLinkLevelSession_stubs.cpp +++ b/DeviceCode/pal/OneWire/Stubs/OneWireLinkLevelSession_stubs.cpp @@ -47,7 +47,7 @@ // // Returns: FALSE - failed // -SMALLINT owAcquire(int portnum, int pin) +__weak SMALLINT owAcquire(int portnum, char *port_zstr) { return (FALSE); } @@ -58,9 +58,7 @@ SMALLINT owAcquire(int portnum, int pin) // 'portnum' - number 0 to MAX_PORTNUM-1. This number is provided to // indicate the symbolic port number. // -void owRelease(int portnum) +__weak void owRelease(int portnum) { portnum = 0; } - - diff --git a/DeviceCode/pal/OneWire/Stubs/ownet_stubs.cpp b/DeviceCode/pal/OneWire/Stubs/ownet_stubs.cpp index 006f5995b..782ded7e2 100644 --- a/DeviceCode/pal/OneWire/Stubs/ownet_stubs.cpp +++ b/DeviceCode/pal/OneWire/Stubs/ownet_stubs.cpp @@ -60,7 +60,7 @@ // Serial Number placed in the global SerialNum[portnum] // FALSE (0): There are no devices on the 1-Wire Net. // -SMALLINT owFirst(int portnum, SMALLINT do_reset, SMALLINT alarm_only) +__weak SMALLINT owFirst(int portnum, SMALLINT do_reset, SMALLINT alarm_only) { return FALSE; @@ -89,7 +89,7 @@ SMALLINT owFirst(int portnum, SMALLINT do_reset, SMALLINT alarm_only) // last search was the last device or there // are no devices on the 1-Wire Net. // -SMALLINT owNext(int portnum, SMALLINT do_reset, SMALLINT alarm_only) +__weak SMALLINT owNext(int portnum, SMALLINT do_reset, SMALLINT alarm_only) { return FALSE; } @@ -112,6 +112,6 @@ SMALLINT owNext(int portnum, SMALLINT do_reset, SMALLINT alarm_only) // 'do_read' - flag to indicate reading (1) or setting (0) the current // serial number. // -void owSerialNum(int portnum, uchar *serialnum_buf, SMALLINT do_read) +__weak void owSerialNum(int portnum, uchar *serialnum_buf, SMALLINT do_read) { } diff --git a/DeviceCode/pal/PKCS11/Storage/stubs/PKCS11_storage_stub.cpp b/DeviceCode/pal/PKCS11/Storage/stubs/PKCS11_storage_stub.cpp index 7c1a690f1..c8f1f4971 100644 --- a/DeviceCode/pal/PKCS11/Storage/stubs/PKCS11_storage_stub.cpp +++ b/DeviceCode/pal/PKCS11/Storage/stubs/PKCS11_storage_stub.cpp @@ -4,24 +4,28 @@ #include "PKCS11_storage_stub.h" //--// -BOOL SecureStorage_Stub::CreateFile( LPCSTR fileName , LPCSTR groupName, UINT32 fileType, UINT8* data, UINT32 dataLength ) +__weak BOOL SecureStorage_Stub::CreateFile( LPCSTR fileName , LPCSTR groupName, UINT32 fileType, UINT8* data, UINT32 dataLength ) { return FALSE; } -BOOL SecureStorage_Stub::ReadFile( LPCSTR fileName , LPCSTR groupName, UINT32& fileType, UINT8* data, UINT32& dataLength ) + +__weak BOOL SecureStorage_Stub::ReadFile( LPCSTR fileName , LPCSTR groupName, UINT32& fileType, UINT8* data, UINT32& dataLength ) { return FALSE; } -BOOL SecureStorage_Stub::GetFileEnum( LPCSTR groupName, UINT32 fileType , FileEnumCtx& enumCtx ) + +__weak BOOL SecureStorage_Stub::GetFileEnum( LPCSTR groupName, UINT32 fileType , FileEnumCtx& enumCtx ) { return FALSE; } -BOOL SecureStorage_Stub::GetNextFile( FileEnumCtx& enumCtx, CHAR*fileName,UINT32 fileNameLen ) + +__weak BOOL SecureStorage_Stub::GetNextFile( FileEnumCtx& enumCtx, CHAR*fileName,UINT32 fileNameLen ) { return FALSE; } -BOOL SecureStorage_Stub::Delete( LPCSTR fileName , LPCSTR groupName ) -{ + +__weak BOOL SecureStorage_Stub::Delete( LPCSTR fileName , LPCSTR groupName ) +{ + return FALSE; } - diff --git a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_Token_stub.cpp b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_Token_stub.cpp index 023f08dba..5e5254d7d 100644 --- a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_Token_stub.cpp +++ b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_Token_stub.cpp @@ -1,23 +1,22 @@ #include "pkcs11_stub.h" -CK_RV PKCS11_Token_stub::Initialize() +__weak CK_RV PKCS11_Token_stub::Initialize() { return CKR_OK; } -CK_RV PKCS11_Token_stub::Uninitialize() + +__weak CK_RV PKCS11_Token_stub::Uninitialize() { return CKR_OK; } -CK_RV PKCS11_Token_stub::InitializeToken(CK_UTF8CHAR_PTR pPin, CK_ULONG ulPinLen, CK_UTF8CHAR_PTR pLabel, CK_ULONG ulLabelLen) +__weak CK_RV PKCS11_Token_stub::InitializeToken(CK_UTF8CHAR_PTR pPin, CK_ULONG ulPinLen, CK_UTF8CHAR_PTR pLabel, CK_ULONG ulLabelLen) { return CKR_OK; } -CK_RV PKCS11_Token_stub::GetDeviceError(CK_ULONG_PTR pErrorCode) +__weak CK_RV PKCS11_Token_stub::GetDeviceError(CK_ULONG_PTR pErrorCode) { *pErrorCode = 0; return CKR_OK; } - - diff --git a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_digest_stub.cpp b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_digest_stub.cpp index 5fd357ab7..dc10126aa 100644 --- a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_digest_stub.cpp +++ b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_digest_stub.cpp @@ -1,27 +1,26 @@ #include "pkcs11_stub.h" -CK_RV PKCS11_Digest_stub::DigestInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism) +__weak CK_RV PKCS11_Digest_stub::DigestInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Digest_stub::Digest(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen, CK_BYTE_PTR pDigest, CK_ULONG_PTR pulDigestLen) +__weak CK_RV PKCS11_Digest_stub::Digest(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen, CK_BYTE_PTR pDigest, CK_ULONG_PTR pulDigestLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Digest_stub::Update(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen) +__weak CK_RV PKCS11_Digest_stub::Update(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Digest_stub::DigestKey(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hKey) +__weak CK_RV PKCS11_Digest_stub::DigestKey(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Digest_stub::Final(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pDigest, CK_ULONG_PTR pulDigestLen) +__weak CK_RV PKCS11_Digest_stub::Final(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pDigest, CK_ULONG_PTR pulDigestLen) { return CKR_FUNCTION_NOT_SUPPORTED; } - diff --git a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_encryption_stub.cpp b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_encryption_stub.cpp index bfda96207..fc3c42fc4 100644 --- a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_encryption_stub.cpp +++ b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_encryption_stub.cpp @@ -1,43 +1,41 @@ #include "pkcs11_stub.h" -CK_RV PKCS11_Encryption_stub::EncryptInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pEncryptMech, CK_OBJECT_HANDLE hKey) +__weak CK_RV PKCS11_Encryption_stub::EncryptInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pEncryptMech, CK_OBJECT_HANDLE hKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Encryption_stub::Encrypt(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen, CK_BYTE_PTR pEncryptedData, CK_ULONG_PTR pulEncryptedDataLen) +__weak CK_RV PKCS11_Encryption_stub::Encrypt(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen, CK_BYTE_PTR pEncryptedData, CK_ULONG_PTR pulEncryptedDataLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Encryption_stub::EncryptUpdate(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pPart, CK_ULONG ulPartLen, CK_BYTE_PTR pEncryptedPart, CK_ULONG_PTR pulEncryptedPartLen) +__weak CK_RV PKCS11_Encryption_stub::EncryptUpdate(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pPart, CK_ULONG ulPartLen, CK_BYTE_PTR pEncryptedPart, CK_ULONG_PTR pulEncryptedPartLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Encryption_stub::EncryptFinal(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pLastEncryptedPart, CK_ULONG_PTR pulLastEncryptedPartLen) +__weak CK_RV PKCS11_Encryption_stub::EncryptFinal(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pLastEncryptedPart, CK_ULONG_PTR pulLastEncryptedPartLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Encryption_stub::DecryptInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pDecryptMech, CK_OBJECT_HANDLE hKey) +__weak CK_RV PKCS11_Encryption_stub::DecryptInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pDecryptMech, CK_OBJECT_HANDLE hKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Encryption_stub::Decrypt(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pEncryptedData, CK_ULONG ulEncryptedDataLen, CK_BYTE_PTR pData, CK_ULONG_PTR pulDataLen) +__weak CK_RV PKCS11_Encryption_stub::Decrypt(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pEncryptedData, CK_ULONG ulEncryptedDataLen, CK_BYTE_PTR pData, CK_ULONG_PTR pulDataLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Encryption_stub::DecryptUpdate(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pEncryptedPart, CK_ULONG ulEncryptedPartLen, CK_BYTE_PTR pPart, CK_ULONG_PTR pulPartLen) +__weak CK_RV PKCS11_Encryption_stub::DecryptUpdate(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pEncryptedPart, CK_ULONG ulEncryptedPartLen, CK_BYTE_PTR pPart, CK_ULONG_PTR pulPartLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Encryption_stub::DecryptFinal(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pLastPart, CK_ULONG_PTR pulLastPartLen) +__weak CK_RV PKCS11_Encryption_stub::DecryptFinal(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pLastPart, CK_ULONG_PTR pulLastPartLen) { return CKR_FUNCTION_NOT_SUPPORTED; } - - diff --git a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_keys_stub.cpp b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_keys_stub.cpp index 8be161bda..63fa70a83 100644 --- a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_keys_stub.cpp +++ b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_keys_stub.cpp @@ -1,11 +1,11 @@ #include "pkcs11_stub.h" -CK_RV PKCS11_Keys_stub::GenerateKey(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount, CK_OBJECT_HANDLE_PTR phKey) +__weak CK_RV PKCS11_Keys_stub::GenerateKey(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount, CK_OBJECT_HANDLE_PTR phKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::GenerateKeyPair(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, +__weak CK_RV PKCS11_Keys_stub::GenerateKeyPair(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_ATTRIBUTE_PTR pPublicKeyTemplate , CK_ULONG ulPublicCount, CK_ATTRIBUTE_PTR pPrivateKeyTemplate, CK_ULONG ulPrivateCount, CK_OBJECT_HANDLE_PTR phPublicKey , CK_OBJECT_HANDLE_PTR phPrivateKey) @@ -13,43 +13,42 @@ CK_RV PKCS11_Keys_stub::GenerateKeyPair(Cryptoki_Session_Context* pSessionCtx, C return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::WrapKey(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hWrappingKey, CK_OBJECT_HANDLE hKey, CK_BYTE_PTR pWrappedKey, CK_ULONG_PTR pulWrappedKeyLen) +__weak CK_RV PKCS11_Keys_stub::WrapKey(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hWrappingKey, CK_OBJECT_HANDLE hKey, CK_BYTE_PTR pWrappedKey, CK_ULONG_PTR pulWrappedKeyLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::UnwrapKey(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hUnwrappingKey, CK_BYTE_PTR pWrappedKey, CK_ULONG ulWrappedKeyLen, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulAttributeCount, CK_OBJECT_HANDLE_PTR phKey) +__weak CK_RV PKCS11_Keys_stub::UnwrapKey(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hUnwrappingKey, CK_BYTE_PTR pWrappedKey, CK_ULONG ulWrappedKeyLen, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulAttributeCount, CK_OBJECT_HANDLE_PTR phKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::DeriveKey(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hBaseKey, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulAttributeCount, CK_OBJECT_HANDLE_PTR phKey) +__weak CK_RV PKCS11_Keys_stub::DeriveKey(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hBaseKey, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulAttributeCount, CK_OBJECT_HANDLE_PTR phKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::LoadKeyBlob(Cryptoki_Session_Context* pSessionCtx, const PBYTE pKey, CK_ULONG keyLen, CK_KEY_TYPE keyType, KEY_ATTRIB keyAttrib, CK_OBJECT_HANDLE_PTR phKey ) +__weak CK_RV PKCS11_Keys_stub::LoadKeyBlob(Cryptoki_Session_Context* pSessionCtx, const PBYTE pKey, CK_ULONG keyLen, CK_KEY_TYPE keyType, KEY_ATTRIB keyAttrib, CK_OBJECT_HANDLE_PTR phKey ) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::LoadSecretKey(Cryptoki_Session_Context* pSessionCtx, CK_KEY_TYPE keyType, const UINT8* pKey, CK_ULONG ulKeyLength, CK_OBJECT_HANDLE_PTR phKey) +__weak CK_RV PKCS11_Keys_stub::LoadSecretKey(Cryptoki_Session_Context* pSessionCtx, CK_KEY_TYPE keyType, const UINT8* pKey, CK_ULONG ulKeyLength, CK_OBJECT_HANDLE_PTR phKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::LoadRsaKey(Cryptoki_Session_Context* pSessionCtx, const RsaKeyData& keyData, CK_BBOOL isPrivate, CK_OBJECT_HANDLE_PTR phKey) +__weak CK_RV PKCS11_Keys_stub::LoadRsaKey(Cryptoki_Session_Context* pSessionCtx, const RsaKeyData& keyData, CK_BBOOL isPrivate, CK_OBJECT_HANDLE_PTR phKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::LoadDsaKey(Cryptoki_Session_Context* pSessionCtx, const DsaKeyData& keyData, CK_BBOOL isPrivate, CK_OBJECT_HANDLE_PTR phKey) +__weak CK_RV PKCS11_Keys_stub::LoadDsaKey(Cryptoki_Session_Context* pSessionCtx, const DsaKeyData& keyData, CK_BBOOL isPrivate, CK_OBJECT_HANDLE_PTR phKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Keys_stub::LoadEcKey(Cryptoki_Session_Context* pSessionCtx, const EcKeyData& keyData, CK_BBOOL isPrivate, CK_OBJECT_HANDLE_PTR phKey) +__weak CK_RV PKCS11_Keys_stub::LoadEcKey(Cryptoki_Session_Context* pSessionCtx, const EcKeyData& keyData, CK_BBOOL isPrivate, CK_OBJECT_HANDLE_PTR phKey) { return CKR_FUNCTION_NOT_SUPPORTED; } - diff --git a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_objects_stub.cpp b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_objects_stub.cpp index 4a58a6d40..5340c177c 100644 --- a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_objects_stub.cpp +++ b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_objects_stub.cpp @@ -1,47 +1,46 @@ #include "pkcs11_stub.h" -CK_RV PKCS11_Objects_stub::CreateObject(Cryptoki_Session_Context* pSessionCtx, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount, CK_OBJECT_HANDLE_PTR phObject) +__weak CK_RV PKCS11_Objects_stub::CreateObject(Cryptoki_Session_Context* pSessionCtx, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount, CK_OBJECT_HANDLE_PTR phObject) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Objects_stub::CopyObject(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount, CK_OBJECT_HANDLE_PTR phNewObject) +__weak CK_RV PKCS11_Objects_stub::CopyObject(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount, CK_OBJECT_HANDLE_PTR phNewObject) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Objects_stub::DestroyObject(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject) +__weak CK_RV PKCS11_Objects_stub::DestroyObject(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Objects_stub::GetObjectSize(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject, CK_ULONG_PTR pulSize) +__weak CK_RV PKCS11_Objects_stub::GetObjectSize(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject, CK_ULONG_PTR pulSize) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Objects_stub::GetAttributeValue(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount) +__weak CK_RV PKCS11_Objects_stub::GetAttributeValue(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Objects_stub::SetAttributeValue(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount) +__weak CK_RV PKCS11_Objects_stub::SetAttributeValue(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE hObject, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Objects_stub::FindObjectsInit(Cryptoki_Session_Context* pSessionCtx, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount) +__weak CK_RV PKCS11_Objects_stub::FindObjectsInit(Cryptoki_Session_Context* pSessionCtx, CK_ATTRIBUTE_PTR pTemplate, CK_ULONG ulCount) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Objects_stub::FindObjects(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE_PTR phObjects, CK_ULONG ulMaxCount, CK_ULONG_PTR pulObjectCount) +__weak CK_RV PKCS11_Objects_stub::FindObjects(Cryptoki_Session_Context* pSessionCtx, CK_OBJECT_HANDLE_PTR phObjects, CK_ULONG ulMaxCount, CK_ULONG_PTR pulObjectCount) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Objects_stub::FindObjectsFinal(Cryptoki_Session_Context* pSessionCtx) +__weak CK_RV PKCS11_Objects_stub::FindObjectsFinal(Cryptoki_Session_Context* pSessionCtx) { return CKR_FUNCTION_NOT_SUPPORTED; } - diff --git a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_random_stub.cpp b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_random_stub.cpp index ea15fadcb..8d06b5332 100644 --- a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_random_stub.cpp +++ b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_random_stub.cpp @@ -1,12 +1,11 @@ #include "pkcs11_stub.h" -CK_RV PKCS11_Random_stub::SeedRandom(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pSeed, CK_ULONG ulSeedLen) +__weak CK_RV PKCS11_Random_stub::SeedRandom(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pSeed, CK_ULONG ulSeedLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Random_stub::GenerateRandom(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pRandomData, CK_ULONG ulRandomLen) +__weak CK_RV PKCS11_Random_stub::GenerateRandom(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pRandomData, CK_ULONG ulRandomLen) { return CKR_FUNCTION_NOT_SUPPORTED; } - diff --git a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_session_stub.cpp b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_session_stub.cpp index ab948cb32..8d0e01938 100644 --- a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_session_stub.cpp +++ b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_session_stub.cpp @@ -1,32 +1,31 @@ #include "pkcs11_stub.h" -CK_RV PKCS11_Session_stub::InitPin(Cryptoki_Session_Context* pSessionCtx, CK_UTF8CHAR_PTR pPin, CK_ULONG ulPinLen) +__weak CK_RV PKCS11_Session_stub::InitPin(Cryptoki_Session_Context* pSessionCtx, CK_UTF8CHAR_PTR pPin, CK_ULONG ulPinLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Session_stub::SetPin(Cryptoki_Session_Context* pSessionCtx, CK_UTF8CHAR_PTR pOldPin, CK_ULONG ulOldPinLen, CK_UTF8CHAR_PTR pNewPin, CK_ULONG ulNewPinLen) +__weak CK_RV PKCS11_Session_stub::SetPin(Cryptoki_Session_Context* pSessionCtx, CK_UTF8CHAR_PTR pOldPin, CK_ULONG ulOldPinLen, CK_UTF8CHAR_PTR pNewPin, CK_ULONG ulNewPinLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Session_stub::OpenSession(Cryptoki_Session_Context* pSessionCtx, CK_BBOOL fReadWrite) +__weak CK_RV PKCS11_Session_stub::OpenSession(Cryptoki_Session_Context* pSessionCtx, CK_BBOOL fReadWrite) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Session_stub::CloseSession(Cryptoki_Session_Context* pSessionCtx) +__weak CK_RV PKCS11_Session_stub::CloseSession(Cryptoki_Session_Context* pSessionCtx) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Session_stub::Login(Cryptoki_Session_Context* pSessionCtx, CK_USER_TYPE userType, CK_UTF8CHAR_PTR pPin, CK_ULONG ulPinLen) +__weak CK_RV PKCS11_Session_stub::Login(Cryptoki_Session_Context* pSessionCtx, CK_USER_TYPE userType, CK_UTF8CHAR_PTR pPin, CK_ULONG ulPinLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Session_stub::Logout(Cryptoki_Session_Context* pSessionCtx) +__weak CK_RV PKCS11_Session_stub::Logout(Cryptoki_Session_Context* pSessionCtx) { return CKR_FUNCTION_NOT_SUPPORTED; } - diff --git a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_signature_stub.cpp b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_signature_stub.cpp index fd4adf045..223301b22 100644 --- a/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_signature_stub.cpp +++ b/DeviceCode/pal/PKCS11/Tokens/stubs/PKCS11_signature_stub.cpp @@ -1,43 +1,41 @@ #include "pkcs11_stub.h" -CK_RV PKCS11_Signature_stub::SignInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hKey) +__weak CK_RV PKCS11_Signature_stub::SignInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Signature_stub::Sign(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen, CK_BYTE_PTR pSignature, CK_ULONG_PTR pulSignatureLen) +__weak CK_RV PKCS11_Signature_stub::Sign(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen, CK_BYTE_PTR pSignature, CK_ULONG_PTR pulSignatureLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Signature_stub::SignUpdate(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pPart, CK_ULONG ulPartLen) +__weak CK_RV PKCS11_Signature_stub::SignUpdate(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pPart, CK_ULONG ulPartLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Signature_stub::SignFinal(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pSignature, CK_ULONG_PTR pulSignatureLen) +__weak CK_RV PKCS11_Signature_stub::SignFinal(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pSignature, CK_ULONG_PTR pulSignatureLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Signature_stub::VerifyInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hKey) +__weak CK_RV PKCS11_Signature_stub::VerifyInit(Cryptoki_Session_Context* pSessionCtx, CK_MECHANISM_PTR pMechanism, CK_OBJECT_HANDLE hKey) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Signature_stub::Verify(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen, CK_BYTE_PTR pSignature, CK_ULONG ulSignatureLen) +__weak CK_RV PKCS11_Signature_stub::Verify(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pData, CK_ULONG ulDataLen, CK_BYTE_PTR pSignature, CK_ULONG ulSignatureLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Signature_stub::VerifyUpdate(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pPart, CK_ULONG ulPartLen) +__weak CK_RV PKCS11_Signature_stub::VerifyUpdate(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pPart, CK_ULONG ulPartLen) { return CKR_FUNCTION_NOT_SUPPORTED; } -CK_RV PKCS11_Signature_stub::VerifyFinal(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pSignature, CK_ULONG ulSignatureLen) +__weak CK_RV PKCS11_Signature_stub::VerifyFinal(Cryptoki_Session_Context* pSessionCtx, CK_BYTE_PTR pSignature, CK_ULONG ulSignatureLen) { return CKR_FUNCTION_NOT_SUPPORTED; } - - diff --git a/DeviceCode/pal/SimpleStorage/stubs/SimpleStorage_stub.cpp b/DeviceCode/pal/SimpleStorage/stubs/SimpleStorage_stub.cpp index 20616c57b..654abf63a 100644 --- a/DeviceCode/pal/SimpleStorage/stubs/SimpleStorage_stub.cpp +++ b/DeviceCode/pal/SimpleStorage/stubs/SimpleStorage_stub.cpp @@ -12,7 +12,7 @@ BlockStorageStream SimpleStorage::s_BsStreamB; //--// -BOOL SimpleStorage::Initialize() +__weak BOOL SimpleStorage::Initialize() { BOOL retVal = s_IsInitialized; @@ -57,7 +57,7 @@ BOOL SimpleStorage::Initialize() return retVal; } -BOOL SimpleStorage::ReadToNextFile(SIMPLESTORAGE_FILE_HEADER& header) +__weak BOOL SimpleStorage::ReadToNextFile(SIMPLESTORAGE_FILE_HEADER& header) { UINT32 crc = 0; @@ -101,7 +101,7 @@ BOOL SimpleStorage::ReadToNextFile(SIMPLESTORAGE_FILE_HEADER& header) return FALSE; } -BOOL SimpleStorage::Compact() +__weak BOOL SimpleStorage::Compact() { GLOBAL_LOCK(irq); BlockStorageStream* pFreeBlock = (s_pCurrentStream == &s_BsStreamA) ? &s_BsStreamB : &s_BsStreamA; @@ -153,7 +153,7 @@ BOOL SimpleStorage::Compact() return TRUE; } -BOOL SimpleStorage::SeekToFile(LPCSTR fileName, LPCSTR groupName, SIMPLESTORAGE_FILE_HEADER& header, BOOL createNew) +__weak BOOL SimpleStorage::SeekToFile(LPCSTR fileName, LPCSTR groupName, SIMPLESTORAGE_FILE_HEADER& header, BOOL createNew) { s_pCurrentStream->Seek(sizeof(SIMPLESTORAGE_BLOCK_HEADER), BlockStorageStream::SeekBegin); @@ -184,7 +184,7 @@ BOOL SimpleStorage::SeekToFile(LPCSTR fileName, LPCSTR groupName, SIMPLESTORAGE_ return FALSE; } -BOOL SimpleStorage::Create( LPCSTR fileName, LPCSTR groupName, UINT32 fileType, UINT8* data, UINT32 dataLength ) +__weak BOOL SimpleStorage::Create( LPCSTR fileName, LPCSTR groupName, UINT32 fileType, UINT8* data, UINT32 dataLength ) { BOOL retVal = FALSE; SIMPLESTORAGE_FILE_HEADER header; @@ -232,7 +232,7 @@ BOOL SimpleStorage::Create( LPCSTR fileName, LPCSTR groupName, UINT32 fileType, return retVal; } -BOOL SimpleStorage::Read ( LPCSTR fileName, LPCSTR groupName, UINT32& fileType, UINT8* data, UINT32& dataLength ) +__weak BOOL SimpleStorage::Read ( LPCSTR fileName, LPCSTR groupName, UINT32& fileType, UINT8* data, UINT32& dataLength ) { SIMPLESTORAGE_FILE_HEADER header; @@ -262,7 +262,7 @@ BOOL SimpleStorage::Read ( LPCSTR fileName, LPCSTR groupName, UINT32& fileType } -BOOL SimpleStorage::GetFileEnum( LPCSTR groupName, UINT32 fileType , FileEnumCtx& enumCtx ) +__weak BOOL SimpleStorage::GetFileEnum( LPCSTR groupName, UINT32 fileType , FileEnumCtx& enumCtx ) { if(groupName == NULL) return FALSE; @@ -273,7 +273,7 @@ BOOL SimpleStorage::GetFileEnum( LPCSTR groupName, UINT32 fileType , FileEnumCtx return TRUE; } -BOOL SimpleStorage::GetNextFile( FileEnumCtx& enumCtx, CHAR* fileName, UINT32 fileNameLen ) +__weak BOOL SimpleStorage::GetNextFile( FileEnumCtx& enumCtx, CHAR* fileName, UINT32 fileNameLen ) { BOOL fRes = FALSE; SIMPLESTORAGE_FILE_HEADER header; @@ -306,7 +306,7 @@ BOOL SimpleStorage::GetNextFile( FileEnumCtx& enumCtx, CHAR* fileName, UINT32 fi return fRes; } -BOOL SimpleStorage::Delete ( LPCSTR fileName, LPCSTR groupName ) +__weak BOOL SimpleStorage::Delete ( LPCSTR fileName, LPCSTR groupName ) { SIMPLESTORAGE_FILE_HEADER header; @@ -320,4 +320,3 @@ BOOL SimpleStorage::Delete ( LPCSTR fileName, LPCSTR groupName ) return s_pCurrentStream->Write((UINT8*)&header, sizeof(header)); } - diff --git a/DeviceCode/pal/StateDebounce/stubs/StateDebounce_stubs.cpp b/DeviceCode/pal/StateDebounce/stubs/StateDebounce_stubs.cpp index f0b8dff87..1299d6ccf 100644 --- a/DeviceCode/pal/StateDebounce/stubs/StateDebounce_stubs.cpp +++ b/DeviceCode/pal/StateDebounce/stubs/StateDebounce_stubs.cpp @@ -6,14 +6,14 @@ /***************************************************************************/ -void HAL_STATE_DEBOUNCE::Initialize( UINT32 debounce_uSec, HAL_CALLBACK_FPN isr ) +__weak void HAL_STATE_DEBOUNCE::Initialize( UINT32 debounce_uSec, HAL_CALLBACK_FPN isr ) { } -void HAL_STATE_DEBOUNCE::Change( UINT32 state ) +__weak void HAL_STATE_DEBOUNCE::Change( UINT32 state ) { } -void HAL_STATE_DEBOUNCE::Abort() +__weak void HAL_STATE_DEBOUNCE::Abort() { } diff --git a/DeviceCode/pal/TouchPanel/stubs/touchpanel_stubs.cpp b/DeviceCode/pal/TouchPanel/stubs/touchpanel_stubs.cpp index 9acaa7083..8ebbae7f2 100644 --- a/DeviceCode/pal/TouchPanel/stubs/touchpanel_stubs.cpp +++ b/DeviceCode/pal/TouchPanel/stubs/touchpanel_stubs.cpp @@ -6,48 +6,47 @@ //--// -HRESULT TOUCH_PANEL_Initialize() +__weak HRESULT TOUCH_PANEL_Initialize() { return CLR_E_NOTIMPL; } -HRESULT TOUCH_PANEL_Uninitialize() +__weak HRESULT TOUCH_PANEL_Uninitialize() { return CLR_E_NOTIMPL; } -HRESULT TOUCH_PANEL_GetDeviceCaps(UINT32 iIndex, void* lpOutput) +__weak HRESULT TOUCH_PANEL_GetDeviceCaps(UINT32 iIndex, void* lpOutput) { return CLR_E_NOTIMPL; } -HRESULT TOUCH_PANEL_ResetCalibration() +__weak HRESULT TOUCH_PANEL_ResetCalibration() { return CLR_E_NOTIMPL; } -HRESULT TOUCH_PANEL_SetCalibration( INT32 pointCount, INT16* sx, INT16* sy, INT16* ux, INT16* uy ) +__weak HRESULT TOUCH_PANEL_SetCalibration( INT32 pointCount, INT16* sx, INT16* sy, INT16* ux, INT16* uy ) { return CLR_E_NOTIMPL; } -HRESULT TOUCH_PANEL_SetNativeBufferSize(INT32 transientBufferSize, INT32 strokeBufferSize) +__weak HRESULT TOUCH_PANEL_SetNativeBufferSize(INT32 transientBufferSize, INT32 strokeBufferSize) { return CLR_E_NOTIMPL; } -HRESULT TOUCH_PANEL_EnableTouchCollection(INT32 flags, INT32 x1, INT32 x2, INT32 y1, INT32 y2, PAL_GFX_Bitmap* bitmap) +__weak HRESULT TOUCH_PANEL_EnableTouchCollection(INT32 flags, INT32 x1, INT32 x2, INT32 y1, INT32 y2, PAL_GFX_Bitmap* bitmap) { return CLR_E_NOTIMPL; } -HRESULT TOUCH_PANEL_GetTouchPoints(INT32* pointCount, INT16* sx, INT16* sy) +__weak HRESULT TOUCH_PANEL_GetTouchPoints(INT32* pointCount, INT16* sx, INT16* sy) { return CLR_E_NOTIMPL; } -HRESULT TOUCH_PANEL_GetSetTouchInfo(UINT32 flags, INT32* param1, INT32* param2, INT32* param3) +__weak HRESULT TOUCH_PANEL_GetSetTouchInfo(UINT32 flags, INT32* param1, INT32* param2, INT32* param3) { return CLR_E_NOTIMPL; } - diff --git a/DeviceCode/pal/configuration/ConfigHelper.cpp b/DeviceCode/pal/configuration/ConfigHelper.cpp index 3bf81f25e..17ebb363c 100644 --- a/DeviceCode/pal/configuration/ConfigHelper.cpp +++ b/DeviceCode/pal/configuration/ConfigHelper.cpp @@ -29,13 +29,13 @@ BOOL HAL_CONFIG_BLOCK::IsGoodBlock() const DEBUG_TRACE2( TRACE_CONFIG, "read header CRC=0x%08x at %08x\r\n", HeaderCRC, (size_t)this ); // what is the header's CRC - UINT32 CRC = SUPPORT_ComputeCRC( ((UINT8*)&DataCRC), sizeof(*this) - offsetof(HAL_CONFIG_BLOCK,DataCRC), c_Seed ); + UINT32 crc = SUPPORT_ComputeCRC( ((UINT8*)&DataCRC), sizeof(*this) - offsetof(HAL_CONFIG_BLOCK,DataCRC), c_Seed ); - DEBUG_TRACE1(TRACE_CONFIG, "calc header CRC=0x%08x\r\n", CRC); + DEBUG_TRACE1(TRACE_CONFIG, "calc header CRC=0x%08x\r\n", crc); - if(CRC != HeaderCRC) + if(crc != HeaderCRC) { - DEBUG_TRACE3( TRACE_ALWAYS, "FAILED HEADER CRC at %08x: 0x%08x != 0x%08x\r\n", (size_t)this, CRC, HeaderCRC ); + DEBUG_TRACE3( TRACE_ALWAYS, "FAILED HEADER CRC at %08x: 0x%08x != 0x%08x\r\n", (size_t)this, crc, HeaderCRC ); return FALSE; } @@ -47,13 +47,13 @@ BOOL HAL_CONFIG_BLOCK::IsGoodData() const DEBUG_TRACE1( TRACE_CONFIG, "read Size=%5d\r\n", Size ); // what is the blob's CRC - UINT32 CRC = SUPPORT_ComputeCRC( Data(), Size, 0 ); + UINT32 crc = SUPPORT_ComputeCRC( Data(), Size, 0 ); - DEBUG_TRACE1( TRACE_CONFIG, "calc blob CRC=0x%08x\r\n", CRC ); + DEBUG_TRACE1( TRACE_CONFIG, "calc blob CRC=0x%08x\r\n", crc ); // this indicates that this record has been marked as invalid, but still allows the helper to move // to the next record. - if(CRC != DataCRC) + if(crc != DataCRC) { return FALSE; } diff --git a/DeviceCode/pal/configuration/stubs/ConfigHelper_stubs.cpp b/DeviceCode/pal/configuration/stubs/ConfigHelper_stubs.cpp index 558956db7..a2c0633ad 100644 --- a/DeviceCode/pal/configuration/stubs/ConfigHelper_stubs.cpp +++ b/DeviceCode/pal/configuration/stubs/ConfigHelper_stubs.cpp @@ -6,78 +6,78 @@ //--// -BOOL HAL_CONFIG_BLOCK::IsGoodBlock() const +__weak BOOL HAL_CONFIG_BLOCK::IsGoodBlock() const { return TRUE; } -BOOL HAL_CONFIG_BLOCK::IsGoodData() const +__weak BOOL HAL_CONFIG_BLOCK::IsGoodData() const { return TRUE; } -BOOL HAL_CONFIG_BLOCK::IsGood() const +__weak BOOL HAL_CONFIG_BLOCK::IsGood() const { return TRUE; } -const HAL_CONFIG_BLOCK* HAL_CONFIG_BLOCK::Next() const +__weak const HAL_CONFIG_BLOCK* HAL_CONFIG_BLOCK::Next() const { return NULL; } -const void* HAL_CONFIG_BLOCK::Data() const +__weak const void* HAL_CONFIG_BLOCK::Data() const { return NULL; } //--// -BOOL HAL_CONFIG_BLOCK::Prepare( const char* Name, void* Data, UINT32 Size ) +__weak BOOL HAL_CONFIG_BLOCK::Prepare( const char* Name, void* Data, UINT32 Size ) { return TRUE; } //--// -const HAL_CONFIG_BLOCK* HAL_CONFIG_BLOCK::Find( const char* Name, BOOL fSkipCurrent, BOOL fAppend ) const +__weak const HAL_CONFIG_BLOCK* HAL_CONFIG_BLOCK::Find( const char* Name, BOOL fSkipCurrent, BOOL fAppend ) const { return NULL; } //--// -BOOL HAL_CONFIG_BLOCK::GetConfigSectorAddress(HAL_CONFIG_BLOCK_STORAGE_DATA& blData) +__weak BOOL HAL_CONFIG_BLOCK::GetConfigSectorAddress(HAL_CONFIG_BLOCK_STORAGE_DATA& blData) { return FALSE; } -BOOL HAL_CONFIG_BLOCK::CompactBlock(HAL_CONFIG_BLOCK_STORAGE_DATA& blData, const ConfigurationSector* cfgStatic, const HAL_CONFIG_BLOCK* cfgEnd) +__weak BOOL HAL_CONFIG_BLOCK::CompactBlock(HAL_CONFIG_BLOCK_STORAGE_DATA& blData, const ConfigurationSector* cfgStatic, const HAL_CONFIG_BLOCK* cfgEnd) { return FALSE; } -BOOL HAL_CONFIG_BLOCK::UpdateBlock( const HAL_CONFIG_BLOCK_STORAGE_DATA &blData, const void* pAddress, const HAL_CONFIG_BLOCK *Header, void* Data, size_t Length, const void* LastConfigAddress, BOOL isChipRO ) +__weak BOOL HAL_CONFIG_BLOCK::UpdateBlock( const HAL_CONFIG_BLOCK_STORAGE_DATA &blData, const void* pAddress, const HAL_CONFIG_BLOCK *Header, void* Data, size_t Length, const void* LastConfigAddress, BOOL isChipRO ) { return FALSE; } -BOOL HAL_CONFIG_BLOCK::UpdateBlockWithName( const char* Name, void* Data, size_t Length, BOOL isChipRO ) +__weak BOOL HAL_CONFIG_BLOCK::UpdateBlockWithName( const char* Name, void* Data, size_t Length, BOOL isChipRO ) { return FALSE; } -BOOL HAL_CONFIG_BLOCK::ApplyConfig( const char* Name, void* Address, size_t Length ) +__weak BOOL HAL_CONFIG_BLOCK::ApplyConfig( const char* Name, void* Address, size_t Length ) { return FALSE; } -BOOL HAL_CONFIG_BLOCK::ApplyConfig( const char* Name, void* Address, size_t Length, void** newAlloc ) +__weak BOOL HAL_CONFIG_BLOCK::ApplyConfig( const char* Name, void* Address, size_t Length, void** newAlloc ) { return FALSE; } -unsigned int /* ie, BOOL */ GetHalSystemInfo(HalSystemInfo& systemInfo) +__weak unsigned int /* ie, BOOL */ GetHalSystemInfo(HalSystemInfo& systemInfo) { return FALSE; } diff --git a/DeviceCode/pal/events/stubs/events_stubs.cpp b/DeviceCode/pal/events/stubs/events_stubs.cpp index 71bde2340..e3f0a83ba 100644 --- a/DeviceCode/pal/events/stubs/events_stubs.cpp +++ b/DeviceCode/pal/events/stubs/events_stubs.cpp @@ -6,74 +6,74 @@ //--// -BOOL Events_Initialize() +__weak BOOL Events_Initialize() { NATIVE_PROFILE_PAL_EVENTS(); return TRUE; } -BOOL Events_Uninitialize() +__weak BOOL Events_Uninitialize() { NATIVE_PROFILE_PAL_EVENTS(); return TRUE; } -void Events_Set( UINT32 Events ) +__weak void Events_Set( UINT32 Events ) { NATIVE_PROFILE_PAL_EVENTS(); } -UINT32 Events_Get( UINT32 EventsOfInterest ) +__weak UINT32 Events_Get( UINT32 EventsOfInterest ) { NATIVE_PROFILE_PAL_EVENTS(); return 0; } -void Events_Clear( UINT32 Events ) +__weak void Events_Clear( UINT32 Events ) { NATIVE_PROFILE_PAL_EVENTS(); } -UINT32 Events_MaskedRead( UINT32 EventsOfInterest ) +__weak UINT32 Events_MaskedRead( UINT32 EventsOfInterest ) { NATIVE_PROFILE_PAL_EVENTS(); return 0; } -UINT32 Events_WaitForEvents( UINT32 powerLevel, UINT32 WakeupSystemEvents, UINT32 Timeout_Milliseconds ) +__weak UINT32 Events_WaitForEvents( UINT32 powerLevel, UINT32 WakeupSystemEvents, UINT32 Timeout_Milliseconds ) { NATIVE_PROFILE_PAL_EVENTS(); return 0; } -UINT32 Events_WaitForEventsInternal( UINT32 powerLevel, UINT32 WakeupSystemEvents, UINT32 Timeout_Milliseconds ) +__weak UINT32 Events_WaitForEventsInternal( UINT32 powerLevel, UINT32 WakeupSystemEvents, UINT32 Timeout_Milliseconds ) { NATIVE_PROFILE_PAL_EVENTS(); return 0; } -void local_Events_SetBoolTimer_Callback( void* arg ) +__weak void local_Events_SetBoolTimer_Callback( void* arg ) { NATIVE_PROFILE_PAL_EVENTS(); } -void Events_SetBoolTimer( BOOL* TimerCompleteFlag, UINT32 MillisecondsFromNow ) +__weak void Events_SetBoolTimer( BOOL* TimerCompleteFlag, UINT32 MillisecondsFromNow ) { NATIVE_PROFILE_PAL_EVENTS(); } -void Events_SetCallback( set_Event_Callback pfn, void* arg ) +__weak void Events_SetCallback( set_Event_Callback pfn, void* arg ) { NATIVE_PROFILE_PAL_EVENTS(); } -void FreeManagedEvent(UINT8 category, UINT8 subCategory, UINT16 data1, UINT32 data2) +__weak void FreeManagedEvent(UINT8 category, UINT8 subCategory, UINT16 data1, UINT32 data2) { NATIVE_PROFILE_PAL_EVENTS(); } diff --git a/DeviceCode/pal/fs/stubs/Config/FS_config_stubs.cpp b/DeviceCode/pal/fs/stubs/Config/FS_config_stubs.cpp index e3b07de0c..fba9e52da 100644 --- a/DeviceCode/pal/fs/stubs/Config/FS_config_stubs.cpp +++ b/DeviceCode/pal/fs/stubs/Config/FS_config_stubs.cpp @@ -8,11 +8,11 @@ #pragma arm section rwdata = "g_AvailableFSInterfaces" #endif -void FS_AddVolumes() +__weak void FS_AddVolumes() { } -void FS_MountRemovableVolumes() +__weak void FS_MountRemovableVolumes() { } diff --git a/DeviceCode/pal/fs/stubs/fs_stubs.cpp b/DeviceCode/pal/fs/stubs/fs_stubs.cpp index f84d6bc85..73f0a0799 100644 --- a/DeviceCode/pal/fs/stubs/fs_stubs.cpp +++ b/DeviceCode/pal/fs/stubs/fs_stubs.cpp @@ -5,73 +5,73 @@ //--// -void FS_MountVolume( LPCSTR nameSpace, UINT32 serialNumber, UINT32 deviceFlags, BlockStorageDevice* blockStorageDevice ) +__weak void FS_MountVolume( LPCSTR nameSpace, UINT32 serialNumber, UINT32 deviceFlags, BlockStorageDevice* blockStorageDevice ) { } -void FS_UnmountVolume( BlockStorageDevice* blockStorageDevice ) +__weak void FS_UnmountVolume( BlockStorageDevice* blockStorageDevice ) { } //--// -void FS_Initialize() +__weak void FS_Initialize() { } //--// -HAL_DblLinkedList FileSystemVolumeList::s_volumeList; +__weak HAL_DblLinkedList FileSystemVolumeList::s_volumeList; //--// -void FileSystemVolumeList::Initialize() +__weak void FileSystemVolumeList::Initialize() { } -BOOL FileSystemVolumeList::InitializeVolumes() +__weak BOOL FileSystemVolumeList::InitializeVolumes() { return TRUE; } -BOOL FileSystemVolumeList::UninitializeVolumes() +__weak BOOL FileSystemVolumeList::UninitializeVolumes() { return TRUE; } -BOOL FileSystemVolumeList::AddVolume( FileSystemVolume* fsv, LPCSTR nameSpace, UINT32 serialNumber, UINT32 deviceFlags, +__weak BOOL FileSystemVolumeList::AddVolume( FileSystemVolume* fsv, LPCSTR nameSpace, UINT32 serialNumber, UINT32 deviceFlags, STREAM_DRIVER_INTERFACE* streamDriver, FILESYSTEM_DRIVER_INTERFACE* fsDriver, BlockStorageDevice* blockStorageDevice, UINT32 volumeId, BOOL init ) { return TRUE; } -BOOL FileSystemVolumeList::RemoveVolume( FileSystemVolume* fsv, BOOL uninit ) +__weak BOOL FileSystemVolumeList::RemoveVolume( FileSystemVolume* fsv, BOOL uninit ) { return TRUE; } -FileSystemVolume* FileSystemVolumeList::GetFirstVolume() +__weak FileSystemVolume* FileSystemVolumeList::GetFirstVolume() { return NULL; } -FileSystemVolume* FileSystemVolumeList::GetNextVolume( FileSystemVolume& volume ) +__weak FileSystemVolume* FileSystemVolumeList::GetNextVolume( FileSystemVolume& volume ) { return NULL; } -UINT32 FileSystemVolumeList::GetNumVolumes() +__weak UINT32 FileSystemVolumeList::GetNumVolumes() { return 0; } -FileSystemVolume* FileSystemVolumeList::FindVolume( LPCSTR nameSpace, UINT32 nameSpaceLength ) +__weak FileSystemVolume* FileSystemVolumeList::FindVolume( LPCSTR nameSpace, UINT32 nameSpaceLength ) { return NULL; } -BOOL FileSystemVolumeList::Contains( FileSystemVolume* fsv ) +__weak BOOL FileSystemVolumeList::Contains( FileSystemVolume* fsv ) { return FALSE; } diff --git a/DeviceCode/pal/heap/stubs/heap_stubs.cpp b/DeviceCode/pal/heap/stubs/heap_stubs.cpp index 1c9c0a01f..9cdb910df 100644 --- a/DeviceCode/pal/heap/stubs/heap_stubs.cpp +++ b/DeviceCode/pal/heap/stubs/heap_stubs.cpp @@ -6,7 +6,7 @@ //--// -void HeapLocation( UINT8*& BaseAddress, UINT32& SizeInBytes ) +__weak void HeapLocation( UINT8*& BaseAddress, UINT32& SizeInBytes ) { NATIVE_PROFILE_PAL_HEAP(); BaseAddress = 0; diff --git a/DeviceCode/pal/io/stubs/GPIO_Output_Stubs.cpp b/DeviceCode/pal/io/stubs/GPIO_Output_Stubs.cpp index 587126628..8a27f6c14 100644 --- a/DeviceCode/pal/io/stubs/GPIO_Output_Stubs.cpp +++ b/DeviceCode/pal/io/stubs/GPIO_Output_Stubs.cpp @@ -6,47 +6,47 @@ //--// -void Instrumentation_Initialize() +__weak void Instrumentation_Initialize() { NATIVE_PROFILE_PAL_IO(); } -void Instrumentation_Uninitialize() +__weak void Instrumentation_Uninitialize() { NATIVE_PROFILE_PAL_IO(); } -void Instrumentation_Running() +__weak void Instrumentation_Running() { NATIVE_PROFILE_PAL_IO(); } -void Instrumentation_Sleeping() +__weak void Instrumentation_Sleeping() { NATIVE_PROFILE_PAL_IO(); } //--// -BOOL OUTPUT_GPIO_Driver::Initialize( OUTPUT_GPIO_CONFIG* Config ) +__weak BOOL OUTPUT_GPIO_Driver::Initialize( OUTPUT_GPIO_CONFIG* Config ) { NATIVE_PROFILE_PAL_IO(); return TRUE; } -void OUTPUT_GPIO_Driver::Uninitialize( OUTPUT_GPIO_CONFIG* Config ) +__weak void OUTPUT_GPIO_Driver::Uninitialize( OUTPUT_GPIO_CONFIG* Config ) { NATIVE_PROFILE_PAL_IO(); } -void OUTPUT_GPIO_Driver::Set( OUTPUT_GPIO_CONFIG* Config, BOOL On ) +__weak void OUTPUT_GPIO_Driver::Set( OUTPUT_GPIO_CONFIG* Config, BOOL On ) { NATIVE_PROFILE_PAL_IO(); } -void OUTPUT_GPIO_Driver::RefCount( OUTPUT_GPIO_CONFIG* Config, BOOL Add ) +__weak void OUTPUT_GPIO_Driver::RefCount( OUTPUT_GPIO_CONFIG* Config, BOOL Add ) { NATIVE_PROFILE_PAL_IO(); } diff --git a/DeviceCode/pal/lwip_1_4_1_os/SocketsDriver/stubs/SocketsDriver_stubs.cpp b/DeviceCode/pal/lwip_1_4_1_os/SocketsDriver/stubs/SocketsDriver_stubs.cpp index dcaece722..55f477992 100644 --- a/DeviceCode/pal/lwip_1_4_1_os/SocketsDriver/stubs/SocketsDriver_stubs.cpp +++ b/DeviceCode/pal/lwip_1_4_1_os/SocketsDriver/stubs/SocketsDriver_stubs.cpp @@ -4,119 +4,119 @@ #include -BOOL HAL_SOCK_Initialize() +__weak BOOL HAL_SOCK_Initialize() { return FALSE; } -BOOL HAL_SOCK_Uninitialize() +__weak BOOL HAL_SOCK_Uninitialize() { return FALSE; } -SOCK_SOCKET HAL_SOCK_socket( int family, int type, int protocol ) +__weak SOCK_SOCKET HAL_SOCK_socket( int family, int type, int protocol ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_bind( SOCK_SOCKET socket, const struct SOCK_sockaddr* address, int addressLen ) +__weak int HAL_SOCK_bind( SOCK_SOCKET socket, const struct SOCK_sockaddr* address, int addressLen ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_connect(SOCK_SOCKET socket, const struct SOCK_sockaddr* address, int addressLen) +__weak int HAL_SOCK_connect(SOCK_SOCKET socket, const struct SOCK_sockaddr* address, int addressLen) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_send(SOCK_SOCKET socket, const char* buf, int len, int flags) +__weak int HAL_SOCK_send(SOCK_SOCKET socket, const char* buf, int len, int flags) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_recv(SOCK_SOCKET socket, char* buf, int len, int flags) +__weak int HAL_SOCK_recv(SOCK_SOCKET socket, char* buf, int len, int flags) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_close(SOCK_SOCKET socket) +__weak int HAL_SOCK_close(SOCK_SOCKET socket) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_listen( SOCK_SOCKET socket, int backlog ) +__weak int HAL_SOCK_listen( SOCK_SOCKET socket, int backlog ) { return SOCK_SOCKET_ERROR; } -SOCK_SOCKET HAL_SOCK_accept( SOCK_SOCKET socket, struct SOCK_sockaddr* address, int* addressLen ) +__weak SOCK_SOCKET HAL_SOCK_accept( SOCK_SOCKET socket, struct SOCK_sockaddr* address, int* addressLen ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_shutdown( SOCK_SOCKET socket, int how ) +__weak int HAL_SOCK_shutdown( SOCK_SOCKET socket, int how ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_getaddrinfo( const char* nodename, char* servname, const struct SOCK_addrinfo* hints, struct SOCK_addrinfo** res ) +__weak int HAL_SOCK_getaddrinfo( const char* nodename, char* servname, const struct SOCK_addrinfo* hints, struct SOCK_addrinfo** res ) { return SOCK_SOCKET_ERROR; } -void HAL_SOCK_freeaddrinfo( struct SOCK_addrinfo* ai ) +__weak void HAL_SOCK_freeaddrinfo( struct SOCK_addrinfo* ai ) { } -int HAL_SOCK_ioctl( SOCK_SOCKET socket, int cmd, int* data ) +__weak int HAL_SOCK_ioctl( SOCK_SOCKET socket, int cmd, int* data ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_getlasterror() +__weak int HAL_SOCK_getlasterror() { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_select( int nfds, SOCK_fd_set* readfds, SOCK_fd_set* writefds, SOCK_fd_set* except, const struct SOCK_timeval* timeout ) +__weak int HAL_SOCK_select( int nfds, SOCK_fd_set* readfds, SOCK_fd_set* writefds, SOCK_fd_set* except, const struct SOCK_timeval* timeout ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_setsockopt( SOCK_SOCKET socket, int level, int optname, const char* optval, int optlen ) +__weak int HAL_SOCK_setsockopt( SOCK_SOCKET socket, int level, int optname, const char* optval, int optlen ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_getsockopt( SOCK_SOCKET socket, int level, int optname, char* optval, int* optlen ) +__weak int HAL_SOCK_getsockopt( SOCK_SOCKET socket, int level, int optname, char* optval, int* optlen ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_getpeername( SOCK_SOCKET socket, struct SOCK_sockaddr* name, int* namelen ) +__weak int HAL_SOCK_getpeername( SOCK_SOCKET socket, struct SOCK_sockaddr* name, int* namelen ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_getsockname( SOCK_SOCKET socket, struct SOCK_sockaddr* name, int* namelen ) +__weak int HAL_SOCK_getsockname( SOCK_SOCKET socket, struct SOCK_sockaddr* name, int* namelen ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_recvfrom( SOCK_SOCKET s, char* buf, int len, int flags, struct SOCK_sockaddr* from, int* fromlen ) +__weak int HAL_SOCK_recvfrom( SOCK_SOCKET s, char* buf, int len, int flags, struct SOCK_sockaddr* from, int* fromlen ) { return SOCK_SOCKET_ERROR; } -int HAL_SOCK_sendto( SOCK_SOCKET s, const char* buf, int len, int flags, const struct SOCK_sockaddr* to, int tolen ) +__weak int HAL_SOCK_sendto( SOCK_SOCKET s, const char* buf, int len, int flags, const struct SOCK_sockaddr* to, int tolen ) { return SOCK_SOCKET_ERROR; } -UINT32 HAL_SOCK_CONFIGURATION_GetAdapterCount() +__weak UINT32 HAL_SOCK_CONFIGURATION_GetAdapterCount() { return 0; } -HRESULT HAL_SOCK_CONFIGURATION_LoadAdapterConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) +__weak HRESULT HAL_SOCK_CONFIGURATION_LoadAdapterConfiguration( UINT32 interfaceIndex, SOCK_NetworkConfiguration* config ) { return CLR_E_FAIL; } -HRESULT HAL_SOCK_CONFIGURATION_UpdateAdapterConfiguration( UINT32 interfaceIndex, UINT32 updateFlags, SOCK_NetworkConfiguration* config ) +__weak HRESULT HAL_SOCK_CONFIGURATION_UpdateAdapterConfiguration( UINT32 interfaceIndex, UINT32 updateFlags, SOCK_NetworkConfiguration* config ) { return CLR_E_FAIL; } -HRESULT HAL_SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) +__weak HRESULT HAL_SOCK_CONFIGURATION_LoadWirelessConfiguration( UINT32 interfaceIndex, SOCK_WirelessConfiguration* wirelessConfig ) { return CLR_E_FAIL; } -void HAL_SOCK_EventsSet( UINT32 events ) +__weak void HAL_SOCK_EventsSet( UINT32 events ) { } -void * HAL_SOCK_GlobalLockContext() +__weak void * HAL_SOCK_GlobalLockContext() { return NULL; } diff --git a/DeviceCode/pal/palevent/Stubs/palevent_stubs.cpp b/DeviceCode/pal/palevent/Stubs/palevent_stubs.cpp index 854cbe600..e4b20a462 100644 --- a/DeviceCode/pal/palevent/Stubs/palevent_stubs.cpp +++ b/DeviceCode/pal/palevent/Stubs/palevent_stubs.cpp @@ -4,24 +4,22 @@ #include -HRESULT PalEvent_Initialize() +__weak HRESULT PalEvent_Initialize() { return CLR_E_NOT_SUPPORTED; } -HRESULT PalEvent_Uninitialize() +__weak HRESULT PalEvent_Uninitialize() { return CLR_E_NOT_SUPPORTED; } -HRESULT PalEvent_Post(unsigned int e, unsigned int param) +__weak HRESULT PalEvent_Post(unsigned int e, unsigned int param) { return CLR_E_NOT_SUPPORTED; } -HRESULT PalEvent_Enlist(PalEventListener* listener) +__weak HRESULT PalEvent_Enlist(PalEventListener* listener) { return CLR_E_NOT_SUPPORTED; } - - diff --git a/DeviceCode/pal/piezo/stubs/piezo_stubs.cpp b/DeviceCode/pal/piezo/stubs/piezo_stubs.cpp index afcbbc0cd..94787ba8d 100644 --- a/DeviceCode/pal/piezo/stubs/piezo_stubs.cpp +++ b/DeviceCode/pal/piezo/stubs/piezo_stubs.cpp @@ -6,21 +6,20 @@ //--// -void Piezo_Initialize() +__weak void Piezo_Initialize() { } -void Piezo_Uninitialize() +__weak void Piezo_Uninitialize() { } -BOOL Piezo_Tone( UINT32 Frequency_Hertz, UINT32 Duration_Milliseconds ) +__weak BOOL Piezo_Tone( UINT32 Frequency_Hertz, UINT32 Duration_Milliseconds ) { return TRUE; } -BOOL Piezo_IsEnabled() +__weak BOOL Piezo_IsEnabled() { return FALSE; } - diff --git a/DeviceCode/pal/time/stubs/time_stubs.cpp b/DeviceCode/pal/time/stubs/time_stubs.cpp index 3667ad4f8..396fb53c0 100644 --- a/DeviceCode/pal/time/stubs/time_stubs.cpp +++ b/DeviceCode/pal/time/stubs/time_stubs.cpp @@ -103,4 +103,3 @@ LPCSTR Time_CurrentDateTimeToString() { return NULL; } - diff --git a/DeviceCode/pal/timeservice/stubs/timeservice_stubs.cpp b/DeviceCode/pal/timeservice/stubs/timeservice_stubs.cpp index 54460eead..b264a0dd8 100644 --- a/DeviceCode/pal/timeservice/stubs/timeservice_stubs.cpp +++ b/DeviceCode/pal/timeservice/stubs/timeservice_stubs.cpp @@ -4,42 +4,42 @@ #include -HRESULT TimeService_Initialize() +__weak HRESULT TimeService_Initialize() { return CLR_E_NOTIMPL; } -HRESULT TimeService_UnInitialize() +__weak HRESULT TimeService_UnInitialize() { return CLR_E_NOTIMPL; } -HRESULT TimeService_Start() +__weak HRESULT TimeService_Start() { return CLR_E_NOTIMPL; } -HRESULT TimeService_Stop() +__weak HRESULT TimeService_Stop() { return CLR_E_NOTIMPL; } -HRESULT TimeService_Update(UINT32 serverIP, UINT32 tolerance, TimeService_Status* status) +__weak HRESULT TimeService_Update(UINT32 serverIP, UINT32 tolerance, TimeService_Status* status) { return CLR_E_NOTIMPL; } -HRESULT TimeService_GetLastSyncStatus(TimeService_Status* status) +__weak HRESULT TimeService_GetLastSyncStatus(TimeService_Status* status) { return CLR_E_NOTIMPL; } -HRESULT TimeService_LoadSettings(TimeService_Settings* settings) +__weak HRESULT TimeService_LoadSettings(TimeService_Settings* settings) { return CLR_E_NOTIMPL; } -HRESULT TimeService_SaveSettings(TimeService_Settings* settings) +__weak HRESULT TimeService_SaveSettings(TimeService_Settings* settings) { return CLR_E_NOTIMPL; } diff --git a/DeviceCode/pal/watchdog/stubs/Watchdog_stubs.cpp b/DeviceCode/pal/watchdog/stubs/Watchdog_stubs.cpp index 73cc230a9..487dcea49 100644 --- a/DeviceCode/pal/watchdog/stubs/Watchdog_stubs.cpp +++ b/DeviceCode/pal/watchdog/stubs/Watchdog_stubs.cpp @@ -6,27 +6,27 @@ //--// -BOOL Watchdog_GetSetEnabled( BOOL enabled, BOOL fSet ) +__weak BOOL Watchdog_GetSetEnabled( BOOL enabled, BOOL fSet ) { return FALSE; } -UINT32 Watchdog_GetSetTimeout( INT32 timeout_ms , BOOL fSet ) +__weak UINT32 Watchdog_GetSetTimeout( INT32 timeout_ms , BOOL fSet ) { return 0; } -Watchdog_Behavior Watchdog_GetSetBehavior( Watchdog_Behavior behavior, BOOL fSet ) +__weak Watchdog_Behavior Watchdog_GetSetBehavior( Watchdog_Behavior behavior, BOOL fSet ) { return Watchdog_Behavior__None; } -BOOL Watchdog_LastOccurence( INT64& time, INT64& timeout, UINT32& assembly, UINT32& method, BOOL fSet ) +__weak BOOL Watchdog_LastOccurence( INT64& time, INT64& timeout, UINT32& assembly, UINT32& method, BOOL fSet ) { return FALSE; } -void EmulatorHook__Watchdog_Callback() +__weak void EmulatorHook__Watchdog_Callback() { } diff --git a/Install-CMSIS-STM32.ps1 b/Install-CMSIS-STM32.ps1 new file mode 100644 index 000000000..4e0a69241 --- /dev/null +++ b/Install-CMSIS-STM32.ps1 @@ -0,0 +1,318 @@ +<# +.SYNOPSIS +Downloads and and extracts STM32CubeMX CMSIS pack. + +.DESCRIPTION +The script downloads and and extracts an STM32CubeMX CMSIS support pack for STM32 series from ST website. +Accepts as parameters the series name and the pack version. + + +.EXAMPLE +Install-CMSIS-STM32.ps1 F4 1.11.00 + +.PARAMETER seriesName +STM32 series name. Valid series are: F0, F1, F2, F3, F4, F7, L0, L1 and L4. + +.PARAMETER packVersion +The pack version to donwload. Format is N.N.N. Example: 1.1.0 + +#> + +[CmdletBinding()] +Param( + [Parameter(Mandatory=$True,Position=1)] + [ValidateNotNullOrEmpty()] + [string]$seriesName, + + [Parameter(Mandatory=$True,Position=2)] + [ValidateNotNullOrEmpty()] + [string]$packVersion +) + +# check running path +$spotClientPath = Get-Location +if($spotClientPath.Path.Contains("Solutions")) +{ + # path includes 'Solutions' so presume that this is being called from a solution project, repository home must be two levels up + $spotClientPath = [System.IO.Path]::GetFullPath( [System.IO.Path]::Combine( $spotClientPath, "..","..") ) +} + +# validate pack version +if(-not ($packVersion -match "\d{1}.\d{1,2}.\d{1}$")) +{ + # path includes 'Solutions' so presume that this is being called from a solution project, repository home must be two levels up + throw "Pack version is invalid. Must have format N.N.N" +} + +# validate series name +$seriesName = $seriesName.ToUpper() +if(-not ($seriesName -match "(^F0$|^F1$|^F2$|^F3$|^F4$|^F7$|^L0$|^L1$|^L4$)")) +{ + throw "Unsupported series. Valid series are: F0, F1, F2, F3, F4, F7, L0, L1 and L4." +} + +Write-Host "Installing STM32Cube CMSIS pack v$packVersion for STM32$seriesName series" + +# check if this a patch +$PatchVersion = $packVersion.Substring($packVersion.LastIndexOf('.') + 1) + +$IsPatch = $false +if( [system.int32]::Parse($PatchVersion) -gt 0) +{ + # this is patch, meaning that the base package needs to be downloaded and then the patch applied on top of it + + # update patch flag + $IsPatch = $true + + # get the base package name + $packVersion = $packVersion.Substring(0, $packVersion.LastIndexOf('.')) + ".0" +} + + +# pack file name +$packFileName = "stm32cube_fw_" + $seriesName.ToLower() + "_v" + ($packVersion -replace "[.]","") + ".zip" + +# zip folder name +$zipPackFileName = "STM32Cube_FW_" + $seriesName + "_V" + $packVersion + +# directory for the SMT32Cube +$stmCubePath = [System.IO.Path]::Combine( $spotClientPath, "STM32Cube" ) + +# directory for the series under STM32Cube folder +$seriesPath = [System.IO.Path]::Combine( $stmCubePath, $seriesName ) + +# make sure the destination directory is empty (if it exists at all) +if( Test-Path $seriesPath ) +{ + Remove-Item -Path $seriesPath -Force -Recurse -ErrorAction Ignore | Out-Null +} +else +{ + # need to create destination directory first + New-Item -Path $seriesPath -Force -ItemType directory | Out-Null +} + +# check is pack file is already there +if(-not (Test-Path ([System.IO.Path]::Combine( $stmCubePath , $packFileName ))) ) +{ + # base URL to download the pack file from + $packSourceURL = "http://www.st.com/resource/en/firmware2/" + $packFileName + + # download the pack... + Write-Host "Downloading pack from ST web site. This will take a while, be patient..." + + # must use WebClient because the pack file is huge + $webclient = New-Object System.Net.WebClient + $webclient.DownloadFile( $packSourceURL , [System.IO.Path]::Combine( $stmCubePath , $packFileName ) ) +} +else +{ + # pack is available... + Write-Host "Pack already available, skipping download" +} + +# ... and extract the files into the series directory +Write-Host "Extracting pack..." + +# must load this type to open Zip files +Add-Type -assembly System.IO.Compression.FileSystem + +$zipArchive = [IO.Compression.ZipFile]::OpenRead( [System.IO.Path]::Combine( $stmCubePath , $packFileName ) ) + +try +{ + # source folders and files that are to be copied + $cmsisDeviceFolder = $zipPackFileName + "/Drivers/CMSIS/Device/ST/" + $halDriverIncFolder = $zipPackFileName + "/Drivers/STM32" + $seriesName + "xx_HAL_Driver/Inc/" + $halDriverSrcFolder = $zipPackFileName + "/Drivers/STM32" + $seriesName + "xx_HAL_Driver/Src/" + $halDriverReleaseNotes = $zipPackFileName + "/Drivers/STM32" + $seriesName + "xx_HAL_Driver/Release_Notes.html" + $cmsisUSBClientLib = $zipPackFileName + "/Middlewares/ST/STM32_USB_Device_Library/" + + foreach($zipItem in $zipArchive.Entries) + { + + if($zipItem.FullName.StartsWith( $cmsisDeviceFolder ) -Or + $zipItem.FullName.StartsWith( $halDriverIncFolder ) -Or + $zipItem.FullName.StartsWith( $halDriverSrcFolder ) -Or + $zipItem.FullName.StartsWith( $halDriverReleaseNotes ) -Or + $zipItem.FullName.StartsWith( $cmsisUSBClientLib )) + { + $destinationFile = [System.IO.Path]::Combine( $seriesPath, $zipItem.FullName.Replace($zipPackFileName, "").Replace("/", "\").SubString(1)) + $parentDir = [System.IO.Path]::GetDirectoryName( $destinationFile ) + + # create directory if it doesn't exist + if((-not [System.IO.Path]::HasExtension($parentDir)) -And (-not (Test-Path -Path $parentDir)) ) + { + New-Item -Path $parentDir -Force -ItemType directory | Out-Null + } + else + { + [IO.Compression.ZipFileExtensions]::ExtractToFile($zipItem, $destinationFile, $true) + } + } + } +} +finally +{ + # free file + $zipArchive.Dispose() +} + +# move CMSIS folder for this series from STM32Cube folder to the respective Device folder in CMSIS folder +# first clear the destination directory before copying as we don't want to mix versions +Write-Host "Copying CMSIS driver..." + +$cmsisPathForSeries = [System.IO.Path]::Combine($spotClientPath , "CMSIS\Device\ST") +Remove-Item -Path $cmsisPathForSeries -Force -Recurse -ErrorAction Ignore +New-Item -Path $cmsisPathForSeries -Force -ItemType directory | Out-Null +Move-Item -Path ( [System.IO.Path]::Combine($seriesPath, "Drivers\CMSIS\Device\ST\*") ) -Destination $cmsisPathForSeries -Force + +# move HAL drivers for this series from STM32Cube folder to the respective DeviceCode folder +# first clear the destination directory before copying as we don't want to mix versions +Write-Host "Copying HAL driver..." + +$deviceCodePathForSeries = [System.IO.Path]::Combine( $spotClientPath, "DeviceCode\Targets\Native\STM32" + $seriesName + "xx\HAL_Driver") +Remove-Item -Path $deviceCodePathForSeries -Force -Recurse -ErrorAction Ignore +New-Item -Path $deviceCodePathForSeries -Force -ItemType directory | Out-Null +Move-Item -Path ( [System.IO.Path]::Combine($seriesPath, "Drivers\STM32" + $seriesName + "xx_HAL_Driver\*") ) -Destination $deviceCodePathForSeries -Force + +# move USB device client library from STM32Cube folder to USB DeviceCode folder +# first clear the destination directory before copying as we don't want to mix versions +Write-Host "Copying USB device client library..." + +$usbClientLibPath = [System.IO.Path]::Combine( $spotClientPath, "DeviceCode\Targets\Native\STM32" + $seriesName + "xx\USB\STM32_USB_Device_Library") +Remove-Item -Path $usbClientLibPath -Force -Recurse -ErrorAction Ignore +New-Item -Path $usbClientLibPath -Force -ItemType directory | Out-Null +Move-Item -Path ( [System.IO.Path]::Combine($seriesPath, "Middlewares\ST\STM32_USB_Device_Library\Core\*") ) -Destination $usbClientLibPath -Force + +# rename the USB device client library source files to cpp extension so they get compiled as CPP code +Get-childItem -Path ( [System.IO.Path]::Combine($usbClientLibPath, "Src") ) *.c | rename-item -newname { $_.name -replace '\.c','.cpp' } + +# delete the template files from USB device client library destination folder +Remove-Item -Path ( [System.IO.Path]::Combine($usbClientLibPath, "Src\usbd_conf_template.cpp") ) -Force +Remove-Item -Path ( [System.IO.Path]::Combine($usbClientLibPath, "Inc\usbd_conf_template.h") ) -Force + +# delete source folder in STM32Cube as they aren't needed it anymore +Remove-Item -Path $seriesPath -Force -Recurse -ErrorAction Ignore + +# if this a patch them go through all the above replacing the existing files +if($IsPatch) +{ + # get the patch package name + $packVersion = $packVersion.Substring(0, $packVersion.LastIndexOf('.')) + "." + $PatchVersion + + # pack file name + $packFileName = "stm32cube_fw_" + $seriesName.ToLower() + "_v" + ($packVersion -replace "[.]","") + ".zip" + + # zip folder name + $zipPackFileName = "STM32Cube_FW_" + $seriesName + "_V" + $packVersion + + # directory for the SMT32Cube + $stmCubePath = [System.IO.Path]::Combine( $spotClientPath, "STM32Cube" ) + + # directory for the series under STM32Cube folder + $seriesPath = [System.IO.Path]::Combine( $stmCubePath, $seriesName ) + + # check is pack file is already there + if(-not (Test-Path ([System.IO.Path]::Combine( $stmCubePath , $packFileName ))) ) + { + # base URL to download the pack file from + $packSourceURL = "http://www.st.com/resource/en/firmware2/" + $packFileName + + # download the pack... + Write-Host "Downloading pack from ST web site. This will take a while, be patient..." + + # must use WebClient because the pack file is huge + $webclient = New-Object System.Net.WebClient + $webclient.DownloadFile( $packSourceURL , [System.IO.Path]::Combine( $stmCubePath , $packFileName ) ) + } + else + { + # pack is available... + Write-Host "Pack already available, skipping download" + } + + # ... and extract the files into the series directory + Write-Host "Extracting pack..." + + # must load this type to open Zip files + Add-Type -assembly System.IO.Compression.FileSystem + + $zipArchive = [IO.Compression.ZipFile]::OpenRead( [System.IO.Path]::Combine( $stmCubePath , $packFileName ) ) + + try + { + # source folders and files that are to be copied + $cmsisDeviceFolder = $zipPackFileName + "/Drivers/CMSIS/Device/ST/" + $halDriverIncFolder = $zipPackFileName + "/Drivers/STM32" + $seriesName + "xx_HAL_Driver/Inc/" + $halDriverSrcFolder = $zipPackFileName + "/Drivers/STM32" + $seriesName + "xx_HAL_Driver/Src/" + $halDriverReleaseNotes = $zipPackFileName + "/Drivers/STM32" + $seriesName + "xx_HAL_Driver/Release_Notes.html" + $cmsisUSBClientLib = $zipPackFileName + "/Middlewares/ST/STM32_USB_Device_Library/" + + foreach($zipItem in $zipArchive.Entries) + { + + if($zipItem.FullName.StartsWith( $cmsisDeviceFolder ) -Or + $zipItem.FullName.StartsWith( $halDriverIncFolder ) -Or + $zipItem.FullName.StartsWith( $halDriverSrcFolder ) -Or + $zipItem.FullName.StartsWith( $halDriverReleaseNotes ) -Or + $zipItem.FullName.StartsWith( $cmsisUSBClientLib )) + { + $destinationFile = [System.IO.Path]::Combine( $seriesPath, $zipItem.FullName.Replace($zipPackFileName, "").Replace("/", "\").SubString(1)) + $parentDir = [System.IO.Path]::GetDirectoryName( $destinationFile ) + + # create directory if it doesn't exist + if((-not [System.IO.Path]::HasExtension($parentDir)) -And (-not (Test-Path -Path $parentDir)) ) + { + New-Item -Path $parentDir -Force -ItemType directory | Out-Null + } + else + { + [IO.Compression.ZipFileExtensions]::ExtractToFile($zipItem, $destinationFile, $true) + } + } + } + } + finally + { + # free file + $zipArchive.Dispose() + } + + # move CMSIS folder for this series from STM32Cube folder to the respective Device folder in CMSIS folder + # first clear the destination directory before copying as we don't want to mix versions + Write-Host "Copying CMSIS driver..." + + $cmsisPathForSeries = [System.IO.Path]::Combine($spotClientPath , "CMSIS\Device\ST") + New-Item -Path $cmsisPathForSeries -Force -ItemType directory -ErrorAction Ignore | Out-Null + Move-Item -Path ( [System.IO.Path]::Combine($seriesPath, "Drivers\CMSIS\Device\ST\*") ) -Destination $cmsisPathForSeries -Force -ErrorAction Ignore + + # move HAL drivers for this series from STM32Cube folder to the respective DeviceCode folder + # first clear the destination directory before copying as we don't want to mix versions + Write-Host "Copying HAL driver..." + + $deviceCodePathForSeries = [System.IO.Path]::Combine( $spotClientPath, "DeviceCode\Targets\Native\STM32" + $seriesName + "xx\HAL_Driver") + New-Item -Path $deviceCodePathForSeries -Force -ItemType directory -ErrorAction Ignore | Out-Null + Move-Item -Path ( [System.IO.Path]::Combine($seriesPath, "Drivers\STM32" + $seriesName + "xx_HAL_Driver\*") ) -Destination $deviceCodePathForSeries -Force -ErrorAction Ignore + + # move USB device client library from STM32Cube folder to USB DeviceCode folder + # first clear the destination directory before copying as we don't want to mix versions + Write-Host "Copying USB device client library..." + + $usbClientLibPath = [System.IO.Path]::Combine( $spotClientPath, "DeviceCode\Targets\Native\STM32" + $seriesName + "xx\USB\STM32_USB_Device_Library") + New-Item -Path $usbClientLibPath -Force -ItemType directory -ErrorAction Ignore | Out-Null + Move-Item -Path ( [System.IO.Path]::Combine($seriesPath, "Middlewares\ST\STM32_USB_Device_Library\Core\*") ) -Destination $usbClientLibPath -Force -ErrorAction Ignore + + # rename the USB device client library source files to cpp extension so they get compiled as CPP code + Get-childItem -Path ( [System.IO.Path]::Combine($usbClientLibPath, "Src") ) *.c | rename-item -newname { $_.name -replace '\.c','.cpp' } + + # delete the template files from USB device client library destination folder + Remove-Item -Path ( [System.IO.Path]::Combine($usbClientLibPath, "Src\usbd_conf_template.cpp") ) -Force -ErrorAction Ignore + Remove-Item -Path ( [System.IO.Path]::Combine($usbClientLibPath, "Inc\usbd_conf_template.h") ) -Force -ErrorAction Ignore + + # delete source folder in STM32Cube as they aren't needed it anymore + Remove-Item -Path $seriesPath -Force -Recurse -ErrorAction Ignore +} + +# done here +Write-Host "Installation of STM32Cube CMSIS pack v$packVersion for STM32$seriesName series completed" diff --git a/STM32Cube/ReadMe.md b/STM32Cube/ReadMe.md new file mode 100644 index 000000000..c6066242e --- /dev/null +++ b/STM32Cube/ReadMe.md @@ -0,0 +1,24 @@ +## STM32 Cube embedded software libraries ## +This folder is a placeholder for the SMT32 Cube embedded software libraries source code. STM32 Cube embedded software libraries include: +- The HAL hardware abstraction layer, enabling portability between different STM32 devices via standardized API calls +- A collection of Middleware components, like RTOS, USB library, file system, TCP/IP stack, Touch sensing library or Graphic Library (depending on the MCU series) + +The SMTCube is available from [ST web site](http://www.st.com/web/en/catalog/tools/FM146/CL2167/SC2004) + +There are software packages for each STM32 device familly. Each one should go into its own folder. E.g. F0 folder for STM32 F0 series, F4 for STM32 F4 series, etc. The build system will look the code and header files there. + +### Download and install ### +To download and install the SMT32Cube source use the respective Powershell command available at the root folder. E.g. `Install-STM32Cube_F4.ps1` for F4 familly. + +### Supported and tested versions ### +**_This code base was validated and tested with the following versions:_** + +- F0: not implmented/ not tested +- F1: not implmented/ not tested +- F2: not implmented/ not tested +- F3: not implmented/ not tested +- F4: v1.11.0 +- F7: not implmented/ not tested +- L0: not implmented/ not tested +- L1: not implmented/ not tested +- L4: not implmented/ not tested diff --git a/Solutions/MCBSTM32F400/DeviceCode/Blockstorage/addDevices/Bl_addDevices.cpp b/Solutions/MCBSTM32F400/DeviceCode/Blockstorage/addDevices/Bl_addDevices.cpp index 5972d2748..fdf0a2931 100644 --- a/Solutions/MCBSTM32F400/DeviceCode/Blockstorage/addDevices/Bl_addDevices.cpp +++ b/Solutions/MCBSTM32F400/DeviceCode/Blockstorage/addDevices/Bl_addDevices.cpp @@ -15,7 +15,7 @@ extern struct BlockStorageDevice g_STM32F4_BS; -extern struct IBlockStorageDevice g_STM32F4_Flash_DeviceTable; +extern struct IBlockStorageDevice g_CMSIS_Flash_DeviceTable; extern struct BLOCK_CONFIG g_STM32F4_BS_Config; extern struct BlockStorageDevice g_M29W640FB_BS; @@ -25,7 +25,7 @@ extern struct BLOCK_CONFIG g_M29W640FB_BS_Config; void BlockStorage_AddDevices() { BlockStorageList::AddDevice( &g_STM32F4_BS, - &g_STM32F4_Flash_DeviceTable, + &g_CMSIS_Flash_DeviceTable, &g_STM32F4_BS_Config, FALSE ); BlockStorageList::AddDevice( &g_M29W640FB_BS, &g_M29W640FB_Flash_DeviceTable, diff --git a/Solutions/MCBSTM32F400/DeviceCode/Initialization/tinyhal.cpp b/Solutions/MCBSTM32F400/DeviceCode/Initialization/tinyhal.cpp index a81e9ebdf..d0a0ab12c 100644 --- a/Solutions/MCBSTM32F400/DeviceCode/Initialization/tinyhal.cpp +++ b/Solutions/MCBSTM32F400/DeviceCode/Initialization/tinyhal.cpp @@ -242,7 +242,11 @@ void HAL_EnterBooterMode() { // will be either directly read from NOR +#ifdef FEATURE_CPUCACHE dataAddress = (volatile UINT32*)CPU_GetUncachableAddress(&pAddr[i]); +#else + dataAddress = (volatile UINT32*)&pAddr[i]; +#endif // write directly bRet = (TRUE == pBlockDevice->Write( (UINT32)dataAddress, sizeof(UINT32), (PBYTE)&c_Key, FALSE )); @@ -460,7 +464,9 @@ void HAL_Uninitialize() } } - //LCD_Uninitialize(); + #ifdef FEATURE_LCD + LCD_Uninitialize(); + #endif I2C_Uninitialize(); diff --git a/Solutions/MCBSTM32F400/MCBSTM32F400.settings b/Solutions/MCBSTM32F400/MCBSTM32F400.settings index 19746763e..4c455a82c 100644 --- a/Solutions/MCBSTM32F400/MCBSTM32F400.settings +++ b/Solutions/MCBSTM32F400/MCBSTM32F400.settings @@ -19,11 +19,32 @@ Copyright (C) Microsoft Corporation + + + STM32F407xx + F4 + 1.11.0 + + + + + 0x0483 + 0xA08F + Microsoft OpenTech + MCBSTM32F400 + + - + + + + + + + \ No newline at end of file diff --git a/Solutions/MCBSTM32F400/TinyBooter/GNU_S/startup_tinyBooter.s b/Solutions/MCBSTM32F400/TinyBooter/GNU_S/startup_tinyBooter.s new file mode 100644 index 000000000..7c0806631 --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyBooter/GNU_S/startup_tinyBooter.s @@ -0,0 +1,532 @@ +/** + ****************************************************************************** + * @file startup_stm32f407xx.s + * @author Eclo Solutions + * @brief STM32F407xx Devices vector table for GCC based toolchains. Based in startup_stm32f407xx.s V2.4.3 + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global ARM_Vectors +.global Default_Handler +.global HeapBegin +.global HeapEnd +.global _end +.extern FAULT_SubHandler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/* start address of managed heap */ +.word HeapBegin +/* end address of managed heap */ +.word HeapEnd + + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type ARM_Vectors, %object + .size ARM_Vectors, .-ARM_Vectors + +ARM_Vectors: + .long _estack + .long Reset_Handler + .long NMI_Handler + .long HardFault_Handler + .long MemManage_Handler + .long BusFault_Handler + .long UsageFault_Handler + .long 0 + .long 0 + .long 0 + .long 0 + .long SVC_Handler + .long DebugMon_Handler + .long 0 + .long PendSV_Handler + .long SysTick_Handler + + /* External Interrupts */ + .long WWDG_IRQHandler /* Window WatchDog */ + .long PVD_IRQHandler /* PVD through EXTI Line detection */ + .long TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .long RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .long FLASH_IRQHandler /* FLASH */ + .long RCC_IRQHandler /* RCC */ + .long EXTI0_IRQHandler /* EXTI Line0 */ + .long EXTI1_IRQHandler /* EXTI Line1 */ + .long EXTI2_IRQHandler /* EXTI Line2 */ + .long EXTI3_IRQHandler /* EXTI Line3 */ + .long EXTI4_IRQHandler /* EXTI Line4 */ + .long DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .long DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .long DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .long DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .long DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .long DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .long DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .long ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .long CAN1_TX_IRQHandler /* CAN1 TX */ + .long CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .long CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .long CAN1_SCE_IRQHandler /* CAN1 SCE */ + .long EXTI9_5_IRQHandler /* External Line[9:5]s */ + .long TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .long TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .long TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .long TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .long TIM2_IRQHandler /* TIM2 */ + .long TIM3_IRQHandler /* TIM3 */ + .long TIM4_IRQHandler /* TIM4 */ + .long I2C1_EV_IRQHandler /* I2C1 Event */ + .long I2C1_ER_IRQHandler /* I2C1 Error */ + .long I2C2_EV_IRQHandler /* I2C2 Event */ + .long I2C2_ER_IRQHandler /* I2C2 Error */ + .long SPI1_IRQHandler /* SPI1 */ + .long SPI2_IRQHandler /* SPI2 */ + .long USART1_IRQHandler /* USART1 */ + .long USART2_IRQHandler /* USART2 */ + .long USART3_IRQHandler /* USART3 */ + .long EXTI15_10_IRQHandler /* External Line[15:10]s */ + .long RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .long OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .long TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .long TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .long TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .long TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .long DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .long FSMC_IRQHandler /* FSMC */ + .long SDIO_IRQHandler /* SDIO */ + .long TIM5_IRQHandler /* TIM5 */ + .long SPI3_IRQHandler /* SPI3 */ + .long UART4_IRQHandler /* UART4 */ + .long UART5_IRQHandler /* UART5 */ + .long TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .long TIM7_IRQHandler /* TIM7 */ + .long DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .long DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .long DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .long DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .long DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .long ETH_IRQHandler /* Ethernet */ + .long ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .long CAN2_TX_IRQHandler /* CAN2 TX */ + .long CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .long CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .long CAN2_SCE_IRQHandler /* CAN2 SCE */ + .long OTG_FS_IRQHandler /* USB OTG FS */ + .long DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .long DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .long DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .long USART6_IRQHandler /* USART6 */ + .long I2C3_EV_IRQHandler /* I2C3 event */ + .long I2C3_ER_IRQHandler /* I2C3 error */ + .long OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .long OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .long OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .long OTG_HS_IRQHandler /* USB OTG HS */ + .long DCMI_IRQHandler /* DCMI */ + .long 0 /* CRYP crypto */ + .long HASH_RNG_IRQHandler /* Hash and Rng */ + .long FPU_IRQHandler /* FPU */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,FAULT_SubHandler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,FAULT_SubHandler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + /*.weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler*/ + + /*.weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler*/ + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + /* implemented at Int_Handlers.c */ + /*.weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler*/ + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Solutions/MCBSTM32F400/TinyBooter/TinyBooter.proj b/Solutions/MCBSTM32F400/TinyBooter/TinyBooter.proj index d9d1375cf..2117d3664 100644 --- a/Solutions/MCBSTM32F400/TinyBooter/TinyBooter.proj +++ b/Solutions/MCBSTM32F400/TinyBooter/TinyBooter.proj @@ -9,7 +9,7 @@ False - $(SPOCLIENT)\Solutions\MCBSTM32F400\MCBSTM32F400.settings + $(SPOCLIENT)\Solutions\MCBSTM32F400\TinyBooter\TinyBooter.settings True true @@ -28,10 +28,7 @@ - - - - + @@ -42,213 +39,144 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + - + + + - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + - - - - - - + + + + + - - + + + + + + + + - - + + + + + + + + + + + - - + + - - + + - - + + - - + + - - + + - - - - - - - - - - - - @@ -269,10 +197,6 @@ - - - - diff --git a/Solutions/MCBSTM32F400/TinyBooter/TinyBooter.settings b/Solutions/MCBSTM32F400/TinyBooter/TinyBooter.settings new file mode 100644 index 000000000..d57861ada --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyBooter/TinyBooter.settings @@ -0,0 +1,13 @@ + + + + Eclo Solutions + + + + + + + + + diff --git a/Solutions/MCBSTM32F400/TinyBooter/TinyBooterEntry.cpp b/Solutions/MCBSTM32F400/TinyBooter/TinyBooterEntry.cpp index e589db26f..25e2015a4 100644 --- a/Solutions/MCBSTM32F400/TinyBooter/TinyBooterEntry.cpp +++ b/Solutions/MCBSTM32F400/TinyBooter/TinyBooterEntry.cpp @@ -17,14 +17,8 @@ #define BUTTON_ENTR BUTTON_B4 #define BUTTON_USER_IDX BUTTON_B5_BITIDX -// boot loader doesn't use the CMSIS-RTOS kernel, so sleep goes direct -// to the low level support -extern void HAL_CPU_Sleep( SLEEP_LEVEL level, UINT64 wakeEvents ); - -void CPU_Sleep( SLEEP_LEVEL level, UINT64 wakeEvents ) -{ - HAL_CPU_Sleep( level, wakeEvents ); -} +extern GenericPortTableEntry const Itm0GenericPort; +extern GenericPortTableEntry const* const g_GenericPorts[TOTAL_GENERIC_PORTS] = { &Itm0GenericPort }; //////////////////////////////////////////////////////////////////////////////// // Tinybooter_ProgramWordCheck diff --git a/Solutions/MCBSTM32F400/TinyBooter/allocator.cpp b/Solutions/MCBSTM32F400/TinyBooter/allocator.cpp index 59ddd068e..36898c3e5 100644 --- a/Solutions/MCBSTM32F400/TinyBooter/allocator.cpp +++ b/Solutions/MCBSTM32F400/TinyBooter/allocator.cpp @@ -41,3 +41,15 @@ void operator delete[] (void*) } //////////////////////////////////////////////////////////////////////////////// + +// remap private_malloc to standard C malloc +void *private_malloc(size_t size) +{ + return malloc(size); +} + +// remap private_free to standard C free +void private_free(void *ptr) +{ + free(ptr); +} diff --git a/Solutions/MCBSTM32F400/TinyBooter/features.settings b/Solutions/MCBSTM32F400/TinyBooter/features.settings new file mode 100644 index 000000000..ecd704af1 --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyBooter/features.settings @@ -0,0 +1,40 @@ + + + + Eclo Solutions + + + + + + + + True + False + False + False + False + False + False + + True + False + False + False + False + False + True + False + True + + False + False + False + False + False + False + False + False + False + + diff --git a/Solutions/MCBSTM32F400/TinyBooter/scatterfile_bootloader_gcc.xml b/Solutions/MCBSTM32F400/TinyBooter/scatterfile_bootloader_gcc.xml index 1237b057d..712cb5a07 100644 --- a/Solutions/MCBSTM32F400/TinyBooter/scatterfile_bootloader_gcc.xml +++ b/Solutions/MCBSTM32F400/TinyBooter/scatterfile_bootloader_gcc.xml @@ -127,24 +127,38 @@ (See Section 4.4.4 of the ARM Cortex-M4 Generic User Guide [ ARM DUI 0553A (ID121610) ] ) Since this starts the SRAM block, it's aligned just fine for any size table. --> - - - - + + + + + + + + + + - + - - - - - - + + + + + + + + + + + + + + @@ -153,44 +167,40 @@ - - + + + + + + + + - - - - - + + + + + + + - - - - - - - - - + - - - + + + + - - - - - - - + + + diff --git a/Solutions/MCBSTM32F400/TinyCLR/GNU_S/startup_tinyCLR.s b/Solutions/MCBSTM32F400/TinyCLR/GNU_S/startup_tinyCLR.s new file mode 100644 index 000000000..e4c8e0821 --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyCLR/GNU_S/startup_tinyCLR.s @@ -0,0 +1,549 @@ +/** + ****************************************************************************** + * @file startup_stm32f407xx.s + * @author Eclo Solutions + * @brief STM32F407xx Devices vector table for GCC based toolchains. Based in startup_stm32f407xx.s V2.4.3 + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global ARM_Vectors +.global Default_Handler +.global HeapBegin +.global HeapEnd +.global _end +.extern FAULT_SubHandler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/* start address of managed heap */ +.word HeapBegin +/* end address of managed heap */ +.word HeapEnd + + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + +.section SectionForPowerOnReset, "ax", %progbits +PowerOnReset: + + .word __initial_sp + .word Reset_Handler @ Reset + .word Fault_Handler @ NMI + .word Fault_Handler @ Hard Fault + .word Fault_Handler @ MMU Fault + .word Fault_Handler @ Bus Fault + .word Fault_Handler @ Usage Fault + + .text + .thumb + .thumb_func + .align 2 + .weak Reset_Handler + .type Reset_Handler, %function + + .section i.EntryPoint, "ax", %progbits +//EntryPoint: +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .VectorTable,"a",%progbits + .type ARM_Vectors, %object + .size ARM_Vectors, .-ARM_Vectors + + +ARM_Vectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word 0 /* CRYP crypto */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,FAULT_SubHandler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,FAULT_SubHandler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + /*.weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler*/ + + /*.weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler*/ + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + /* implemented at Int_Handlers.c */ + /*.weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler*/ + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Solutions/MCBSTM32F400/TinyCLR/TinyCLR.proj b/Solutions/MCBSTM32F400/TinyCLR/TinyCLR.proj index 2869bc261..ab995ceab 100644 --- a/Solutions/MCBSTM32F400/TinyCLR/TinyCLR.proj +++ b/Solutions/MCBSTM32F400/TinyCLR/TinyCLR.proj @@ -9,7 +9,7 @@ True - $(SPOCLIENT)\Solutions\MCBSTM32F400\MCBSTM32F400.settings + $(SPOCLIENT)\Solutions\MCBSTM32F400\TinyCLR\TinyCLR.settings True false @@ -45,6 +45,7 @@ + @@ -75,9 +76,117 @@ - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -150,30 +259,6 @@ - - - - - - - - - - - - - - - - - - - - - - - - @@ -182,114 +267,10 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -298,30 +279,6 @@ - - - - - - - - - - - - - - - - - - - - - - - - @@ -342,18 +299,10 @@ - - - - - - - - @@ -370,10 +319,6 @@ - - - - @@ -531,10 +476,6 @@ - - - - diff --git a/Solutions/MCBSTM32F400/TinyCLR/TinyCLR.settings b/Solutions/MCBSTM32F400/TinyCLR/TinyCLR.settings new file mode 100644 index 000000000..03dc6a383 --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyCLR/TinyCLR.settings @@ -0,0 +1,13 @@ + + + + Eclo Solutions + + + + + + + + + diff --git a/Solutions/MCBSTM32F400/TinyCLR/allocator.cpp b/Solutions/MCBSTM32F400/TinyCLR/allocator.cpp index 372f95138..b40a5f435 100644 --- a/Solutions/MCBSTM32F400/TinyCLR/allocator.cpp +++ b/Solutions/MCBSTM32F400/TinyCLR/allocator.cpp @@ -8,24 +8,36 @@ //////////////////////////////////////////////////////////////////////////////// -void *operator new( size_t n ) -{ - return private_malloc( n ); -} +// void *operator new( size_t n ) +// { +// return private_malloc( n ); +// } + +// void *operator new[]( size_t n ) +// { +// return private_malloc( n ); +// } + +// void operator delete( void* p ) +// { +// return private_free( p ); +// } + +// void operator delete[]( void* p ) +// { +// return private_free( p ); +// } -void *operator new[]( size_t n ) -{ - return private_malloc( n ); -} +//////////////////////////////////////////////////////////////////////////////// -void operator delete( void* p ) +// remap private_malloc to standard C malloc +void *private_malloc(size_t size) { - return private_free( p ); + return malloc(size); } -void operator delete[]( void* p ) +// remap private_free to standard C free +void private_free(void *ptr) { - return private_free( p ); + free(ptr); } - -//////////////////////////////////////////////////////////////////////////////// diff --git a/Solutions/MCBSTM32F400/TinyCLR/features.settings b/Solutions/MCBSTM32F400/TinyCLR/features.settings new file mode 100644 index 000000000..9870f3a52 --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyCLR/features.settings @@ -0,0 +1,40 @@ + + + + Eclo Solutions + + + + + + + + True + True + False + False + False + False + False + + True + False + False + False + False + False + True + False + True + + False + False + False + False + False + False + False + False + False + + diff --git a/Solutions/MCBSTM32F400/TinyCLR/scatterfile_tinyclr_gcc.xml b/Solutions/MCBSTM32F400/TinyCLR/scatterfile_tinyclr_gcc.xml index 4fdb0b8f4..f5fac3661 100644 --- a/Solutions/MCBSTM32F400/TinyCLR/scatterfile_tinyclr_gcc.xml +++ b/Solutions/MCBSTM32F400/TinyCLR/scatterfile_tinyclr_gcc.xml @@ -143,6 +143,9 @@ + + + @@ -162,17 +165,28 @@ - - + + + - + + + + + + + + + + + - - - - - - - - + + + + + + + + - - - - - - - - - + + + + + - + + + - - - - - - - - + + + + - + @@ -258,9 +259,9 @@ - - - + + + diff --git a/Solutions/MCBSTM32F400/TinyCLR/tinyclr.cpp b/Solutions/MCBSTM32F400/TinyCLR/tinyclr.cpp index 051970c5a..ed5c7ca58 100644 --- a/Solutions/MCBSTM32F400/TinyCLR/tinyclr.cpp +++ b/Solutions/MCBSTM32F400/TinyCLR/tinyclr.cpp @@ -5,6 +5,9 @@ #include #include +extern GenericPortTableEntry const Itm0GenericPort; +extern GenericPortTableEntry const* const g_GenericPorts[TOTAL_GENERIC_PORTS] = { &Itm0GenericPort }; + //////////////////////////////////////////////////////////////////////////////// void ApplicationEntryPoint() { diff --git a/Solutions/MCBSTM32F400/TinyCLR_NONET/GNU_S/startup_tinyCLR.s b/Solutions/MCBSTM32F400/TinyCLR_NONET/GNU_S/startup_tinyCLR.s new file mode 100644 index 000000000..e4c8e0821 --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyCLR_NONET/GNU_S/startup_tinyCLR.s @@ -0,0 +1,549 @@ +/** + ****************************************************************************** + * @file startup_stm32f407xx.s + * @author Eclo Solutions + * @brief STM32F407xx Devices vector table for GCC based toolchains. Based in startup_stm32f407xx.s V2.4.3 + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global ARM_Vectors +.global Default_Handler +.global HeapBegin +.global HeapEnd +.global _end +.extern FAULT_SubHandler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/* start address of managed heap */ +.word HeapBegin +/* end address of managed heap */ +.word HeapEnd + + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + +.section SectionForPowerOnReset, "ax", %progbits +PowerOnReset: + + .word __initial_sp + .word Reset_Handler @ Reset + .word Fault_Handler @ NMI + .word Fault_Handler @ Hard Fault + .word Fault_Handler @ MMU Fault + .word Fault_Handler @ Bus Fault + .word Fault_Handler @ Usage Fault + + .text + .thumb + .thumb_func + .align 2 + .weak Reset_Handler + .type Reset_Handler, %function + + .section i.EntryPoint, "ax", %progbits +//EntryPoint: +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .VectorTable,"a",%progbits + .type ARM_Vectors, %object + .size ARM_Vectors, .-ARM_Vectors + + +ARM_Vectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word 0 /* CRYP crypto */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,FAULT_SubHandler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,FAULT_SubHandler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + /*.weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler*/ + + /*.weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler*/ + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + /* implemented at Int_Handlers.c */ + /*.weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler*/ + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Solutions/MCBSTM32F400/TinyCLR_NONET/TinyCLR_NONET.proj b/Solutions/MCBSTM32F400/TinyCLR_NONET/TinyCLR_NONET.proj index 868d7a2c6..baa53b70b 100644 --- a/Solutions/MCBSTM32F400/TinyCLR_NONET/TinyCLR_NONET.proj +++ b/Solutions/MCBSTM32F400/TinyCLR_NONET/TinyCLR_NONET.proj @@ -9,7 +9,7 @@ True - $(SPOCLIENT)\Solutions\MCBSTM32F400\MCBSTM32F400_NONET.settings + $(SPOCLIENT)\Solutions\MCBSTM32F400\TinyCLR_NONET\TinyCLR_NONET.settings True false @@ -41,6 +41,7 @@ + @@ -63,9 +64,119 @@ - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -118,182 +229,18 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -314,18 +261,10 @@ - - - - - - - - @@ -342,10 +281,6 @@ - - - - @@ -394,10 +329,6 @@ - - - - @@ -422,10 +353,6 @@ - - - - diff --git a/Solutions/MCBSTM32F400/TinyCLR_NONET/TinyCLR_NONET.settings b/Solutions/MCBSTM32F400/TinyCLR_NONET/TinyCLR_NONET.settings new file mode 100644 index 000000000..4291246aa --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyCLR_NONET/TinyCLR_NONET.settings @@ -0,0 +1,13 @@ + + + + Eclo Solutions + + + + + + + + + diff --git a/Solutions/MCBSTM32F400/TinyCLR_NONET/allocator.cpp b/Solutions/MCBSTM32F400/TinyCLR_NONET/allocator.cpp index 372f95138..ce58cbb3a 100644 --- a/Solutions/MCBSTM32F400/TinyCLR_NONET/allocator.cpp +++ b/Solutions/MCBSTM32F400/TinyCLR_NONET/allocator.cpp @@ -8,24 +8,36 @@ //////////////////////////////////////////////////////////////////////////////// -void *operator new( size_t n ) -{ - return private_malloc( n ); +// void *operator new( size_t n ) +// { +// return private_malloc( n ); +// } + +// void *operator new[]( size_t n ) +// { +// return private_malloc( n ); +// } + +// void operator delete( void* p ) +// { +// return private_free( p ); +// } + +// void operator delete[]( void* p ) +// { +// return private_free( p ); } -void *operator new[]( size_t n ) -{ - return private_malloc( n ); -} +//////////////////////////////////////////////////////////////////////////////// -void operator delete( void* p ) +// remap private_malloc to standard C malloc +void *private_malloc(size_t size) { - return private_free( p ); + return malloc(size); } -void operator delete[]( void* p ) +// remap private_free to standard C free +void private_free(void *ptr) { - return private_free( p ); + free(ptr); } - -//////////////////////////////////////////////////////////////////////////////// diff --git a/Solutions/MCBSTM32F400/TinyCLR_NONET/features.settings b/Solutions/MCBSTM32F400/TinyCLR_NONET/features.settings new file mode 100644 index 000000000..6b319dea8 --- /dev/null +++ b/Solutions/MCBSTM32F400/TinyCLR_NONET/features.settings @@ -0,0 +1,40 @@ + + + + Eclo Solutions + + + + + + + + True + True + False + False + False + False + False + + True + False + False + False + False + False + True + False + True + + False + False + False + False + False + False + False + False + False + + diff --git a/Solutions/MCBSTM32F400/TinyCLR_NONET/scatterfile_tinyclr_nonet_gcc.xml b/Solutions/MCBSTM32F400/TinyCLR_NONET/scatterfile_tinyclr_nonet_gcc.xml index c3c7be81f..8faa22065 100644 --- a/Solutions/MCBSTM32F400/TinyCLR_NONET/scatterfile_tinyclr_nonet_gcc.xml +++ b/Solutions/MCBSTM32F400/TinyCLR_NONET/scatterfile_tinyclr_nonet_gcc.xml @@ -132,17 +132,35 @@ - + + + + + + + + + - + + + + + + + + + + + @@ -157,35 +175,29 @@ - - - - - - - - + + + + + + + + - - - - - - - - - + + + + + - - - + - - - + + + + diff --git a/Solutions/MCBSTM32F400/TinyCLR_NONET/tinyclr.cpp b/Solutions/MCBSTM32F400/TinyCLR_NONET/tinyclr.cpp index 14990758b..2e123ba90 100644 --- a/Solutions/MCBSTM32F400/TinyCLR_NONET/tinyclr.cpp +++ b/Solutions/MCBSTM32F400/TinyCLR_NONET/tinyclr.cpp @@ -5,6 +5,9 @@ #include #include +extern GenericPortTableEntry const Itm0GenericPort; +extern GenericPortTableEntry const* const g_GenericPorts[TOTAL_GENERIC_PORTS] = { &Itm0GenericPort }; + extern void HAL_CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents); void CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents) { diff --git a/Solutions/MCBSTM32F400/dotnetmf.proj b/Solutions/MCBSTM32F400/dotnetmf.proj index 0904d3e23..c0b45bee3 100644 --- a/Solutions/MCBSTM32F400/dotnetmf.proj +++ b/Solutions/MCBSTM32F400/dotnetmf.proj @@ -1,15 +1,21 @@  - - - Solutions\MCBSTM32F400 - $(SPOCLIENT)\Solutions\MCBSTM32F400\MCBSTM32F400.settings - - - - - - - - - + + + Solutions\MCBSTM32F400 + $(SPOCLIENT)\Solutions\MCBSTM32F400 + $(SPOCLIENT)\Solutions\MCBSTM32F400\MCBSTM32F400.settings + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Solutions/MCBSTM32F400/platform_selector.h b/Solutions/MCBSTM32F400/platform_selector.h index aa4f4f418..ce69b6044 100644 --- a/Solutions/MCBSTM32F400/platform_selector.h +++ b/Solutions/MCBSTM32F400/platform_selector.h @@ -26,6 +26,9 @@ #if defined(PLATFORM_ARM_MCBSTM32F400) #define HAL_SYSTEM_NAME "MCBSTM32F400" +// FIXME +// the following can be removed after complete migration to CMSIS HAL/PAL +#define STM32F4XX 1 #define PLATFORM_ARM_STM32F4 1 // STM32F407 cpu #define STM32F4_ETH_PHY_RMII 1 #define USB_ALLOW_CONFIGURATION_OVERRIDE 1 @@ -100,6 +103,29 @@ #define STM32F4_32B_TIMER 2 #define STM32F4_16B_TIMER 3 +/* GPIOs */ +// User button PG.15 +// LED1 PG.6 +// LED2 PG.7 +// LED3 PG.8 +// LED4 PH.2 +// LED5 PH.3 +// LED6 PH.6 +// LED7 PH.7 +// LED8 PI.10 + +#define GPIO_PORT_PINS \ +{\ + {GPIOG, GPIO_PIN_15},\ + {GPIOG, GPIO_PIN_6},\ + {GPIOG, GPIO_PIN_7},\ + {GPIOG, GPIO_PIN_8},\ + {GPIOH, GPIO_PIN_2},\ + {GPIOH, GPIO_PIN_3},\ + {GPIOH, GPIO_PIN_6},\ + {GPIOH, GPIO_PIN_7},\ +} + // Pin Configuration #define STM32F4_ADC 3 #define STM32F4_AD_CHANNELS {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15} @@ -131,16 +157,17 @@ { 0, BUTTON_NONE }, /* Enter */ \ { PORT_PIN( GPIO_PORTG, 15 ), BUTTON_B5 }, /* User */ -#define LED1 PORT_PIN( GPIO_PORTG, 6 ) // PG.6 -#define LED2 PORT_PIN( GPIO_PORTG, 7 ) // PG.7 -#define LED3 PORT_PIN( GPIO_PORTG, 8 ) // PG.8 +// User LEDs are defined as GPIO ports above in GPIO_PORT_PINS @ the following indexes +#define LED1 1 +#define LED2 2 +#define LED3 3 -#define LED4 PORT_PIN( GPIO_PORTH, 2 ) // PH.2 -#define LED5 PORT_PIN( GPIO_PORTH, 3 ) // PH.3 -#define LED6 PORT_PIN( GPIO_PORTH, 6 ) // PH.6 -#define LED7 PORT_PIN( GPIO_PORTH, 7 ) // PH.7 +#define LED4 4 +#define LED5 5 +#define LED6 6 +#define LED7 7 -#define LED8 PORT_PIN( GPIO_PORTI, 10 ) // PI.10 +#define LED8 8 // // constants diff --git a/Solutions/MCBSTM32F400/stm32f4xx_hal_conf.h b/Solutions/MCBSTM32F400/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..a1d9445f4 --- /dev/null +++ b/Solutions/MCBSTM32F400/stm32f4xx_hal_conf.h @@ -0,0 +1,444 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf.h + * @brief HAL configuration file based in stm32f4xx_hal_conf_template.h V1.4.4 + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +#define HAL_CAN_MODULE_ENABLED +#define HAL_CRC_MODULE_ENABLED +#define HAL_CEC_MODULE_ENABLED +#define HAL_CRYP_MODULE_ENABLED +#define HAL_DAC_MODULE_ENABLED +//#define HAL_DCMI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_DMA2D_MODULE_ENABLED +#define HAL_ETH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +//#define HAL_NAND_MODULE_ENABLED +//#define HAL_NOR_MODULE_ENABLED +//#define HAL_PCCARD_MODULE_ENABLED +//#define HAL_SRAM_MODULE_ENABLED +//#define HAL_SDRAM_MODULE_ENABLED +#define HAL_HASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +//#define HAL_I2S_MODULE_ENABLED +//#define HAL_IWDG_MODULE_ENABLED +#define HAL_LTDC_MODULE_ENABLED +#define HAL_DSI_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +//#define HAL_QSPI_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_RNG_MODULE_ENABLED +#define HAL_RTC_MODULE_ENABLED +//#define HAL_SAI_MODULE_ENABLED +//#define HAL_SD_MODULE_ENABLED +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +//#define HAL_IRDA_MODULE_ENABLED +//#define HAL_SMARTCARD_MODULE_ENABLED +//#define HAL_WWDG_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_PCD_MODULE_ENABLED +#define HAL_HCD_MODULE_ENABLED +//#define HAL_FMPI2C_MODULE_ENABLED +//#define HAL_SPDIFRX_MODULE_ENABLED +//#define HAL_LPTIM_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE (3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ +#define USE_RTOS 0U +//#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848 PHY Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ + +#define PHY_SR ((uint16_t)0x0010U) /*!< PHY status register Offset */ +#define PHY_MICR ((uint16_t)0x0011U) /*!< MII Interrupt Control Register */ +#define PHY_MISR ((uint16_t)0x0012U) /*!< MII Interrupt Status and Misc. Control Register */ + +#define PHY_LINK_STATUS ((uint16_t)0x0001U) /*!< PHY Link mask */ +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +#define PHY_MICR_INT_EN ((uint16_t)0x0002U) /*!< PHY Enable interrupts */ +#define PHY_MICR_INT_OE ((uint16_t)0x0001U) /*!< PHY Enable output interrupt events */ + +#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020U) /*!< Enable Interrupt on change of link status */ +#define PHY_LINK_INTERRUPT ((uint16_t)0x2000U) /*!< PHY link status interrupt mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 1U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Blockstorage/addDevices/Bl_addDevices.cpp b/Solutions/STM32F4DISCOVERY/DeviceCode/Blockstorage/addDevices/Bl_addDevices.cpp index 4b84ebf65..9f5aff89e 100644 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/Blockstorage/addDevices/Bl_addDevices.cpp +++ b/Solutions/STM32F4DISCOVERY/DeviceCode/Blockstorage/addDevices/Bl_addDevices.cpp @@ -15,13 +15,13 @@ extern struct BlockStorageDevice g_STM32F4_BS; -extern struct IBlockStorageDevice g_STM32F4_Flash_DeviceTable; +extern struct IBlockStorageDevice g_CMSIS_Flash_DeviceTable; extern struct BLOCK_CONFIG g_STM32F4_BS_Config; void BlockStorage_AddDevices() { - BlockStorageList::AddDevice( &g_STM32F4_BS, &g_STM32F4_Flash_DeviceTable, &g_STM32F4_BS_Config, FALSE ); + BlockStorageList::AddDevice( &g_STM32F4_BS, &g_CMSIS_Flash_DeviceTable, &g_STM32F4_BS_Config, FALSE ); } diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Init/IO_Init.cpp b/Solutions/STM32F4DISCOVERY/DeviceCode/Init/IO_Init.cpp deleted file mode 100644 index 9b9d4c6e4..000000000 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/Init/IO_Init.cpp +++ /dev/null @@ -1,35 +0,0 @@ -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 -// -// Copyright (c) Microsoft Corporation. All rights reserved. -// Implementation for the MCBSTM32F400 board (STM32F4): Copyright (c) Oberon microsystems, Inc. -// -// *** STM32F4DISCOVERY Board specific IO Port Initialization *** -// -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - -#include -#include "..\..\..\..\DeviceCode\Targets\Native\STM32F4\DeviceCode\stm32f4xx.h" - -// Define the generic port table, only one generic extensionn port type supported -// and that is the ITM hardware trace port on Channel 0. -extern GenericPortTableEntry const Itm0GenericPort; -extern GenericPortTableEntry const* const g_GenericPorts[TOTAL_GENERIC_PORTS] = { &Itm0GenericPort }; - -extern void STM32F4_GPIO_Pin_Config( GPIO_PIN pin, UINT32 mode, GPIO_RESISTOR resistor, UINT32 alternate ); // Workaround, since CPU_GPIO_DisablePin() does not correctly initialize pin speeds - -void __section("SectionForBootstrapOperations") BootstrapCode_GPIO() -{ - // Enable GPIO clocks for ports A - E - RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN - | RCC_AHB1ENR_GPIODEN | RCC_AHB1ENR_GPIOEEN; - - // TODO: Restore at the end of bootloader? - CPU_GPIO_EnableOutputPin(LED3, FALSE); - CPU_GPIO_EnableOutputPin(LED4, FALSE); - CPU_GPIO_EnableOutputPin(LED5, FALSE); - CPU_GPIO_EnableOutputPin(LED6, FALSE); -} diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/MasterConfig.h b/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/MasterConfig.h deleted file mode 100644 index d4ce06bf0..000000000 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/MasterConfig.h +++ /dev/null @@ -1,23 +0,0 @@ -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Copyright (c) Microsoft Corporation. All rights reserved. -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - -//--// - -#ifndef _MASTER_CONFIG_H_ -#define _MASTER_CONFIG_H_ 1 - -//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--// - -#include - -//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--// - -#define NUM_DEBUGGERS 1 -#define NUM_MESSAGING 1 - -#define DEBUGGER_PORT_INDEX 0 - -//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--//--// - -#endif // _MASTER_CONFIG_H_ diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/OEM_Model_SKU_NetworkID.cpp b/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/OEM_Model_SKU_NetworkID.cpp deleted file mode 100644 index 19fecc373..000000000 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/OEM_Model_SKU_NetworkID.cpp +++ /dev/null @@ -1,212 +0,0 @@ -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// Copyright (c) Microsoft Corporation. All rights reserved. -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - -#include -#include - -HAL_SYSTEM_CONFIG HalSystemConfig = -{ - { TRUE }, // HAL_DRIVER_CONFIG_HEADER Header; - { DEBUGGER_PORT }, // UINT32 DebuggerPorts[MAX_DEBUGGERS]; - { MESSAGING_PORT }, // UINT32 MessagingPorts[MAX_MESSAGING]; - DEBUG_TEXT_PORT, // UINT32 DebugTextPort; - 115200, // UINT32 USART_DefaultBaudRate; - STDIO, // FILE* stdio; - { SRAM1_MEMORY_Base, SRAM1_MEMORY_Size }, // HAL_SYSTEM_MEMORY_CONFIG RAM1; - { FLASH_MEMORY_Base, FLASH_MEMORY_Size }, // HAL_SYSTEM_MEMORY_CONFIG FLASH; -}; - -/***************************************************************************/ - -const char HalName[] = HAL_SYSTEM_NAME; - -OEM_MODEL_SKU OEM_Model_SKU; - -#define OEM_ALL 0 -#define OEM_MS 0xFF - -#pragma arm section rodata = "SectionForConfig" - -const ConfigurationSector __section("SectionForConfig") g_ConfigurationSector = -{ - // ConfigurationLength - offsetof(ConfigurationSector, FirstConfigBlock), - - //CONFIG_SECTOR_VERSION - { - ConfigurationSector::c_CurrentVersionMajor, - ConfigurationSector::c_CurrentVersionMinor, - ConfigurationSector::c_CurrentVersionTinyBooter, - 0, // extra - }, - - // backwards compatibility buffer (88 bytes to put booterflagarray at offset 96) - { - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - }, - - // BooterFlagArray - determines if we enter the tinybooter or not - { - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - }, - - // UINT32 SectorSignatureCheck[9*8]; // 287 sectors max * 8 changes before erase - { - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - 0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF, - }, - - //TINYBOOTER_KEY_CONFIG DeploymentKey = - { - {// ODM key configuration for programming firmware (non deployment sectors) - { // ODM public key for firware sectors - // exponent length - 0xFF,0xFF,0xFF, 0xFF, - - // module - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - - // exponent - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - } - }, - {// OEM key configuration for programming Deployment sector - { // OEM public key for Deployment sector - // exponent length - 0xFF,0xFF,0xFF, 0xFF, - - // module - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - - // exponent - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - } - } - }, - - // OEM_MODEL_SKU OEM_Model_SKU; - { - OEM_MS, // UINT8 OEM; - 0, // UINT8 Model; - 0xFFFF, // UINT16 SKU; - }, - - // OEM_SERIAL_NUMBERS OemSerialNumbers - { - { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // UINT8 module_serial_number[32]; - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, }, - { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, } // UINT8 system_serial_number[16]; - }, - - // CLR Config Data - { - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - }, - - // HAL_CONFIG_BLOCK FirstConfigBlock; - { - HAL_CONFIG_BLOCK::c_Version_V2, // UINT32 Signature; - 0x8833794c, // UINT32 HeaderCRC; - 0x00000000, // UINT32 DataCRC; - 0x00000000, // UINT32 Size; - // char DriverName[64]; - }, -}; -#pragma arm section rodata diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/dotNetMF.proj b/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/dotNetMF.proj deleted file mode 100644 index ae05cbf58..000000000 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/dotNetMF.proj +++ /dev/null @@ -1,60 +0,0 @@ - - - - STM32F4DISCOVERY_initialization_hal - {413207C2-BC11-461F-A060-A1B05C9D5817} - - - System initialization library for STM32F4DISCOVERY - HAL - STM32F4DISCOVERY_initialization_hal.$(LIB_EXT) - STM32F4DISCOVERY_initialization_hal.$(LIB_EXT).manifest - System - - - - 4 - 0 - 0 - 0 - - 2009-04-30 - - LibraryCategory - - - - - False - - - False - False - False - DeviceCode\Targets\Native\STM32F4\DeviceCode\Initialization - false - 4.0.0.0 - - - - - - - - - - - - - - - Library - - - - - - - - - \ No newline at end of file diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/dotNetMF_loader.proj b/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/dotNetMF_loader.proj deleted file mode 100644 index 7f745c770..000000000 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/dotNetMF_loader.proj +++ /dev/null @@ -1,62 +0,0 @@ - - - - STM32F4DISCOVERY_initialization_hal_loader - {D0939448-2D69-42F3-99F1-221C5433823C} - - - System initialization library for STM32F4DISCOVERY (for boot loaders) - HAL - STM32F4DISCOVERY_initialization_hal_loader.$(LIB_EXT) - STM32F4DISCOVERY_initialization_hal_loader.$(LIB_EXT).manifest - System - - - - 4 - 0 - 0 - 0 - - 2009-04-30 - - LibraryCategory - - - - - False - - - False - False - False - DeviceCode\Targets\Native\STM32F4\DeviceCode\Initialization\reducesize - true - false - 4.0.0.0 - - - - - - - - - - - - - - - - Library - - - - - - - - - diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/tinyhal.cpp b/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/tinyhal.cpp deleted file mode 100644 index a81e9ebdf..000000000 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/Initialization/tinyhal.cpp +++ /dev/null @@ -1,760 +0,0 @@ -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// This file is part of the Microsoft .NET Micro Framework Porting Kit Code Samples and is unsupported. -// Copyright (c) Microsoft Open Technologies, Inc. All rights reserved. -// -// Licensed under the Apache License, Version 2.0 (the "License"); you may not use these files except in compliance with the License. -// You may obtain a copy of the License at: -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing -// permissions and limitations under the License. -// -#include -#include "stm32f4xx.h" - -#if defined(PLATFORM_ARM_OS_PORT) -#include -#include -#endif - -#undef TRACE_ALWAYS -#define TRACE_ALWAYS 0x00000001 - -#undef DEBUG_TRACE -#define DEBUG_TRACE (TRACE_ALWAYS) -// these define the region to zero initialize -extern UINT32 Image$$ER_RAM_RW$$ZI$$Base; -extern UINT32 Image$$ER_RAM_RW$$ZI$$Length; - -// here is the execution address/length of code to move from FLASH to RAM -#define IMAGE_RAM_RO_BASE Image$$ER_RAM_RO$$Base -#define IMAGE_RAM_RO_LENGTH Image$$ER_RAM_RO$$Length - -extern UINT32 IMAGE_RAM_RO_BASE; -extern UINT32 IMAGE_RAM_RO_LENGTH; - -// here is the execution address/length of data to move from FLASH to RAM -extern UINT32 Image$$ER_RAM_RW$$Base; -extern UINT32 Image$$ER_RAM_RW$$Length; - -// here is the load address of the RAM code/data -#define LOAD_RAM_RO_BASE Load$$ER_RAM_RO$$Base - -extern UINT32 LOAD_RAM_RO_BASE; -extern UINT32 Load$$ER_RAM_RW$$Base; - -#if defined(TARGETLOCATION_RAM) - -extern UINT32 Load$$ER_RAM$$Base; -extern UINT32 Image$$ER_RAM$$Length; - -#elif defined(TARGETLOCATION_FLASH) - -extern UINT32 Load$$ER_FLASH$$Base; -extern UINT32 Image$$ER_FLASH$$Length; - -#else - !ERROR -#endif - -UINT32 LOAD_IMAGE_Start; -UINT32 LOAD_IMAGE_Length; -UINT32 LOAD_IMAGE_CalcCRC; - -#if defined(PLATFORM_ARM_OS_PORT) && defined(TCPIP_LWIP_OS) -extern UINT32 Load$$ER_LWIP_OS$$RW$$Base; -extern UINT32 Image$$ER_LWIP_OS$$RW$$Base; -extern UINT32 Image$$ER_LWIP_OS$$RW$$Length; -extern UINT32 Image$$ER_LWIP_OS$$ZI$$Base; -extern UINT32 Image$$ER_LWIP_OS$$ZI$$Length; -#endif - -#pragma arm section code = "SectionForBootstrapOperations" - -static void __section("SectionForBootstrapOperations") Prepare_Copy( UINT32* src, UINT32* dst, UINT32 len ) -{ - if(dst != src) - { - INT32 extraLen = len & 0x00000003; - len = len & 0xFFFFFFFC; - - while(len != 0) - { - *dst++ = *src++; - - len -= 4; - } - - // thumb2 code can be multiples of 2... - - UINT8 *dst8 = (UINT8*) dst, *src8 = (UINT8*) src; - - while (extraLen > 0) - { - *dst8++ = *src8++; - - extraLen--; - } - } -} - -static void __section("SectionForBootstrapOperations") Prepare_Zero( UINT32* dst, UINT32 len ) -{ - INT32 extraLen = len & 0x00000003; - len = len & 0xFFFFFFFC; - - while(len != 0) - { - *dst++ = 0; - - len -= 4; - } - - // thumb2 code can be multiples of 2... - - UINT8 *dst8 = (UINT8*) dst; - - while (extraLen > 0) - { - *dst8++ = 0; - - extraLen--; - } -} - -#if !defined(PLATFORM_ARM_OS_PORT) || defined(__GNUC__) -void __section("SectionForBootstrapOperations") PrepareImageRegions() -{ - // - // Copy RAM RO regions into proper location. - // - { - UINT32* src = (UINT32*)&LOAD_RAM_RO_BASE; - UINT32* dst = (UINT32*)&IMAGE_RAM_RO_BASE; - UINT32 len = (UINT32 )&IMAGE_RAM_RO_LENGTH; - - Prepare_Copy( src, dst, len ); - } - - // - // Copy RAM RW regions into proper location. - // - { - UINT32* src = (UINT32*)&Load$$ER_RAM_RW$$Base; - UINT32* dst = (UINT32*)&Image$$ER_RAM_RW$$Base; - UINT32 len = (UINT32)&Image$$ER_RAM_RW$$Length; - - Prepare_Copy( src, dst, len ); - } - - // - // Initialize RAM ZI regions. - // - { - UINT32* dst = (UINT32*)&Image$$ER_RAM_RW$$ZI$$Base; - UINT32 len = (UINT32 )&Image$$ER_RAM_RW$$ZI$$Length; - - Prepare_Zero( dst, len ); - } -} -#else -extern "C" void PrepareImageRegions() -{ - // This space intentionally left blank... 8^) - // - // The OS boot of CLR on CMSIS-RTX doesn't - // use this as it relies on the C/C++ runtime - // to handle initialization. However, to keep - // from adding more libraries or #if checks - // in code this is defined to allow normal - // linking with the same HAL libs used in a - // boot loader. -} -#endif - -#pragma arm section code - -//--// - -#if !defined(BUILD_RTM) -static UINT32 g_Boot_RAMConstants_CRC = 0; -#endif - -static ON_SOFT_REBOOT_HANDLER s_rebootHandlers[16] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; - -void HAL_AddSoftRebootHandler(ON_SOFT_REBOOT_HANDLER handler) -{ - for(int i=0; iGetDeviceInfo(); - - ByteAddress configSectAddress; - UINT32 iRegion, iRange; - - pBlockDevice->FindForBlockUsage(BlockUsage::CONFIG, configSectAddress, iRegion, iRange ); - - // if non-XIP, load data - if (!deviceInfo->Attribute.SupportsXIP) - { - pBlockDevice->Read(configSectAddress, sizeof(ConfigurationSector), (BYTE*)&g_ConfigurationSector); - } - - - for(int i=0; !bDone && iAttribute.SupportsXIP) - { - - // will be either directly read from NOR - dataAddress = (volatile UINT32*)CPU_GetUncachableAddress(&pAddr[i]); - - // write directly - bRet = (TRUE == pBlockDevice->Write( (UINT32)dataAddress, sizeof(UINT32), (PBYTE)&c_Key, FALSE )); - } - else - { - // updated the g_ConfigurationSector with the latest value - // as the g_ConfigurationSector must be at the RAM area, so it should be ok to write to it. - - dataAddress =(volatile UINT32 *) &(g_ConfigurationSector.BooterFlagArray[i]); - (*dataAddress) = c_Key; - - // write back to sector, as we only change one bit from 0 to 1, no need to erase sector - bRet = (TRUE == pBlockDevice->Write( configSectAddress, sizeof(ConfigurationSector), (BYTE*)&g_ConfigurationSector, FALSE )); - - } - - bDone = true; - break; - - case ConfigurationSector::c_BootEntryKey: // looks like we already have a key set - bDone = true; - break; - } - } - - if(!bDone) // we must be full, so rewrite sector - { - // reading whole block, not just the configurationsector - const BlockRegionInfo * pBlockRegionInfo = &deviceInfo->Regions[iRegion]; - - ::Watchdog_ResetCounter(); - - BYTE *data = (BYTE*) private_malloc(pBlockRegionInfo->BytesPerBlock); - - if(data != NULL) - { - ConfigurationSector *pCfg; - - if(deviceInfo->Attribute.SupportsXIP) - { - memcpy(data, (void*)configSectAddress, pBlockRegionInfo->BytesPerBlock); - } - else - { - pBlockDevice->Read(configSectAddress, pBlockRegionInfo->BytesPerBlock, data); - } - - pCfg = (ConfigurationSector *)data; - memset( (void*)&pCfg->BooterFlagArray[0], 0xFF, sizeof(pCfg->BooterFlagArray) ); - - // updated the g_ConfigurationSector with the latest value - // as the g_ConfigurationSector must be at the RAM area, so it should be ok to write to it. - pCfg->BooterFlagArray[0] = c_Key; - - pBlockDevice->EraseBlock(configSectAddress); - - ::Watchdog_ResetCounter(); - - // write back to sector, as we only change one bit from 0 to 1, no need to erase sector - bRet = (TRUE == pBlockDevice->Write( configSectAddress, pBlockRegionInfo->BytesPerBlock, data, FALSE )); - - private_free(data); - } - } - - CPU_Reset(); - } -} - -bool g_fDoNotUninitializeDebuggerPort = false; - -void HAL_Initialize() -{ -#if defined(PLATFORM_ARM_OS_PORT) - // Interrupts must be enabled to handle calls to OS - // (Network stack uses the CMSIS-RTX OS, which uses - // SVC calls, which will hard fault if the interrupts - // are disabled at the Svc instruction ) - // SystemInit handles this for the startup from reset - // However, this is also called from the CLR when doing - // a soft reboot. - __enable_irq(); -#endif - - HAL_CONTINUATION::InitializeList(); - HAL_COMPLETION ::InitializeList(); - - HAL_Init_Custom_Heap(); - - Time_Initialize(); - Events_Initialize(); - - CPU_GPIO_Initialize(); - CPU_SPI_Initialize(); - -#if !defined(PLATFORM_ARM_OS_PORT) - // this is the place where interrupts are enabled after boot for the first time after boot - ENABLE_INTERRUPTS(); -#endif - - // have to initialize the blockstorage first, as the USB device needs to update the configure block - - BlockStorageList::Initialize(); - - BlockStorage_AddDevices(); - - BlockStorageList::InitializeDevices(); - - //FS_Initialize(); - - //FileSystemVolumeList::Initialize(); - - //FS_AddVolumes(); - - //FileSystemVolumeList::InitializeVolumes(); - - //LCD_Initialize(); - -#if !defined(HAL_REDUCESIZE) - CPU_InitializeCommunication(); -#endif - - I2C_Initialize(); - - Buttons_Initialize(); - - // Initialize the backlight to a default off state - //BackLight_Initialize(); - - //Piezo_Initialize(); - - //Battery_Initialize(); - - //Charger_Initialize(); - - PalEvent_Initialize(); - //Gesture_Initialize(); - //Ink_Initialize(); - TimeService_Initialize(); - -#if defined(ENABLE_NATIVE_PROFILER) - Native_Profiler_Init(); -#endif -} - -void HAL_UnReserveAllGpios() -{ - for(INT32 i = CPU_GPIO_GetPinCount()-1; i >=0; i--) - { - CPU_GPIO_ReservePin((GPIO_PIN)i, false); - } -} - -#if defined(PLATFORM_ARM_OS_PORT) && defined(TCPIP_LWIP_OS) -// Hack: refer to work item #2374 -// For reasons unknown, the ARM linker is getting the -// fixup for the LoadRegion symbol incorrect. The data -// is located correctly but the fixed up pointer stored -// in the literal pool that this code loads for the address -// of the load base (src) is off by some factor. In initial -// testing it was always 0x90, unfortunately it turns out -// not to be consistent and bumped up to 0xED0, and is now -// back at 0x90... Sigh... Hope to hear back from ARM support -// on this soon. ARM has confirmed the bug as related to the -// use of a non-compressed region in the scatter file. Since -// the code here doesn't understand the linker compression -// the region is uncompressed, however the linker bug is -// that an uncompressed region that follows after a compressed -// one will get the invalid Load$$xxx$$Base value. If the -// scatter file is updated to ensure all regions occuring -// before this one are also uncompressed it works ok. -const UINT32 ArmLinkerLoadRegionOffsetHack = 0x00000000; -void LwipRegionInit() -{ - // Copy RAM RW regions into proper location. - { - UINT32* src = &Load$$ER_LWIP_OS$$RW$$Base; - UINT32* dst = &Image$$ER_LWIP_OS$$RW$$Base; - UINT32 len = (UINT32) &Image$$ER_LWIP_OS$$RW$$Length; - - // Hack: refer to work item #2374 - src = reinterpret_cast(reinterpret_cast(src) - ArmLinkerLoadRegionOffsetHack ); - - Prepare_Copy( src, dst, len ); - } - - // Initialize RAM ZI regions. - { - UINT32* dst = &Image$$ER_LWIP_OS$$ZI$$Base; - UINT32 len = (UINT32) &Image$$ER_LWIP_OS$$ZI$$Length; - - Prepare_Zero( dst, len ); - } -} -#endif - -void HAL_Uninitialize() -{ - int i; - -#if defined(ENABLE_NATIVE_PROFILER) - Native_Profiler_Stop(); -#endif - - for(i=0; i= end) - { - *ptr-- = 0xBAADF00D; - } - } -#endif - - // these are needed for patch access - -#if defined(TARGETLOCATION_RAM) - - LOAD_IMAGE_Start = (UINT32)&Load$$ER_RAM$$Base; - LOAD_IMAGE_Length = (UINT32)&Image$$ER_RAM$$Length; - -#elif defined(TARGETLOCATION_FLASH) - - LOAD_IMAGE_Start = (UINT32)&Load$$ER_FLASH$$Base; - LOAD_IMAGE_Length = (UINT32)&Image$$ER_FLASH$$Length; - -#else - !ERROR -#endif - - LOAD_IMAGE_Length += (UINT32)&IMAGE_RAM_RO_LENGTH + (UINT32)&Image$$ER_RAM_RW$$Length; - -#if !defined(BUILD_RTM) - g_Boot_RAMConstants_CRC = Checksum_RAMConstants(); -#endif - - - CPU_Initialize(); - - HAL_Time_Initialize(); - - HAL_Initialize(); - -#if !defined(BUILD_RTM) - DEBUG_TRACE4( STREAM_LCD, ".NetMF v%d.%d.%d.%d\r\n", VERSION_MAJOR, VERSION_MINOR, VERSION_BUILD, VERSION_REVISION); - DEBUG_TRACE3(TRACE_ALWAYS, "%s, Build Date:\r\n\t%s %s\r\n", HalName, __DATE__, __TIME__); -#if defined(__GNUC__) - DEBUG_TRACE1(TRACE_ALWAYS, "GNU Compiler version %d\r\n", __GNUC__); -#else - DEBUG_TRACE1(TRACE_ALWAYS, "ARM Compiler version %d\r\n", __ARMCC_VERSION); -#endif - - UINT8* BaseAddress; - UINT32 SizeInBytes; - - HeapLocation( BaseAddress, SizeInBytes ); - memset ( BaseAddress, 0, SizeInBytes ); - - debug_printf("\f"); - - debug_printf("%-15s\r\n", HalName); - debug_printf("%-15s\r\n", "Build Date:"); - debug_printf(" %-13s\r\n", __DATE__); - debug_printf(" %-13s\r\n", __TIME__); - -#endif // !defined(BUILD_RTM) - - /***********************************************************************************/ - - { -#if defined(FIQ_SAMPLING_PROFILER) - FIQ_Profiler_Init(); -#endif - } - - // the runtime is by default using a watchdog - - Watchdog_GetSetTimeout ( WATCHDOG_TIMEOUT , TRUE ); - Watchdog_GetSetBehavior( WATCHDOG_BEHAVIOR, TRUE ); - Watchdog_GetSetEnabled ( WATCHDOG_ENABLE, TRUE ); - - - // HAL initialization completed. Interrupts are enabled. Jump to the Application routine - ApplicationEntryPoint(); - - debug_printf("main exited!!???. Halting CPU\r\n"); - -#if defined(BUILD_RTM) - CPU_Reset(); -#else - CPU_Halt(); -#endif -} -#endif - -} // extern "C" - - -#if defined(PLATFORM_ARM_OS_PORT) -extern "C" void STM32F4_BootstrapCode(); - -// performs base level system initialization -// This typically consists of setting up clocks -// and PLLs along with any external memory needed -// to boot. -// NOTE: -// It is important to keep in mind that this is -// called *BEFORE* any C/C++ runtime initialization -// That is, zero init of uninitialied writeable data -// and copying of initialized values for initialized -// writeable data have not yet occured. Thus, any code -// called from SystemInit must not use or rely on -// initializtion having occured. This also precludes -// the use of any OS provided primitives and support -// as the kernel isn't initialized yet either. -extern "C" void SystemInit() -{ - STM32F4_BootstrapCode(); - CPU_Initialize(); - __enable_irq(); -} - -#endif //PLATFORM_ARM_OS_PORT - -#if !defined(BUILD_RTM) - -void debug_printf( const char* format, ... ) -{ - char buffer[256] = {0}; - va_list arg_ptr; - - va_start( arg_ptr, format ); - - int len = hal_vsnprintf( buffer, sizeof(buffer)-1, format, arg_ptr ); - - { // take CLR lock to send whole message - GLOBAL_LOCK(clrLock); - // send characters directly to the trace port - for( char* p = buffer; *p != '\0' || p-buffer >= 256; ++p ) - ITM_SendChar( *p ); - } - - va_end( arg_ptr ); -} - -void lcd_printf( const char* format, ... ) -{ - va_list arg_ptr; - - va_start( arg_ptr, format ); - - hal_vfprintf( STREAM_LCD, format, arg_ptr ); -} - -#endif // !defined(BUILD_RTM) - -#if !defined(BUILD_RTM) - -UINT32 Checksum_RAMConstants() -{ - UINT32* RAMConstants = (UINT32*)&IMAGE_RAM_RO_BASE; - UINT32 Length = (UINT32 )&IMAGE_RAM_RO_LENGTH; - - UINT32 crc; - - // start with Vector area CRC - crc = SUPPORT_ComputeCRC(NULL, 0x00000020, 0); - - // add the big block of RAM constants to CRC - crc = SUPPORT_ComputeCRC(RAMConstants, Length, crc); - - return crc; -} - -void Verify_RAMConstants( void* arg ) -{ - BOOL BreakpointOnError = (BOOL)arg; - - //debug_printf("RAMC\r\n"); - - UINT32 crc = Checksum_RAMConstants(); - - if (crc != g_Boot_RAMConstants_CRC) - { - hal_printf("RAMC CRC:%08x!=%08x\r\n", crc, g_Boot_RAMConstants_CRC); - - UINT32* ROMConstants = (UINT32*)&LOAD_RAM_RO_BASE; - UINT32* RAMConstants = (UINT32*)&IMAGE_RAM_RO_BASE; - UINT32 Length = (UINT32 )&IMAGE_RAM_RO_LENGTH; - BOOL FoundMismatch = FALSE; - - for(int i = 0; i < Length; i += 4) - { - if(*RAMConstants != *ROMConstants) - { - hal_printf( "RAMC %08x:%08x!=%08x\r\n", (UINT32) RAMConstants, *RAMConstants, *ROMConstants ); - - if(!FoundMismatch) lcd_printf( "\fRAMC:%08x\r\n", (UINT32)RAMConstants ); // first one only to LCD - FoundMismatch = TRUE; - } - - RAMConstants++; - ROMConstants++; - } - - if(!FoundMismatch) - { - // the vector area must have been trashed - lcd_printf("\fRAMC:%08x\r\n", (UINT32) NULL); - RAMConstants = (UINT32*)NULL; - - for(int i = 0; i < 32; i += 4) - { - hal_printf( "RAMC %02x:%08x\r\n", i, *RAMConstants ); - lcd_printf( "%02x:%08x\r\n" , i, *RAMConstants++ ); - } - } - - DebuggerPort_Flush( HalSystemConfig.DebugTextPort ); - - if(BreakpointOnError) - { - HARD_BREAKPOINT(); - } - } -} - -#endif // !defined(BUILD_RTM) diff --git a/Solutions/STM32F4DISCOVERY/DeviceCode/USB/usb_config.cpp b/Solutions/STM32F4DISCOVERY/DeviceCode/USB/usb_config.cpp deleted file mode 100644 index fdd49964c..000000000 --- a/Solutions/STM32F4DISCOVERY/DeviceCode/USB/usb_config.cpp +++ /dev/null @@ -1,281 +0,0 @@ -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 -// -// Copyright (c) Microsoft Corporation. All rights reserved. -// Implementation for the MCBSTM32F400 board (STM32F4): Copyright (c) Oberon microsystems, Inc. -// -// *** STM32F4DISCOVERY USB Configuration *** -// -//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// - -#include - -//--// - -//string descriptor -#define MANUFACTURER_NAME_SIZE 19 // "Microsoft OpenTech " -// NOTE: Having more than (probably) 32 characters causes the MFUSB KERNEL driver -// to *CRASH* which, of course, causes Windows to crash -#define PRODUCT_NAME_SIZE 16 // "STM32F4DISCOVERY" -// NOTE: If these two strings are not present, the MFUSB KERNEL driver will *CRASH* -// which, of course, causes Windows to crash -#define DISPLAY_NAME_SIZE 16 // "STM32F4DISCOVERY" -#define FRIENDLY_NAME_SIZE 8 // "a7e70ea2" -// index for the strings -#define MANUFACTURER_NAME_INDEX 1 -#define PRODUCT_NAME_INDEX 2 -#define SERIAL_NUMBER_INDEX 0 -// device descriptor -#define VENDOR_ID 0x0483 // STM32F4 Test VID -#define PRODUCT_ID 0xA08F // STM32F4 Test PID -#define MAX_EP0_SIZE 8 -//configuration descriptor -#define USB_MAX_CURRENT (100/USB_CURRENT_UNIT) - -#define USB_ATTRIBUTES (USB_ATTRIBUTE_BASE | USB_ATTRIBUTE_SELF_POWER) - -// Configuration for extended descriptor -#define OS_DESCRIPTOR_EX_VERSION 0x0100 - -///////////////////////////////////////////////////////////// -// The following structure defines the USB descriptor -// for a basic device with a USB debug interface via the -// WinUSB extended Compat ID. -// -// This USB configuration is always used to define the USB -// configuration for TinyBooter. It is also the default for -// the runtime if there is no USB configuration in the Flash -// configuration sector. - -ADS_PACKED struct GNU_PACKED USB_DYNAMIC_CONFIGURATION -{ - USB_DEVICE_DESCRIPTOR device; - USB_CONFIGURATION_DESCRIPTOR config; - USB_INTERFACE_DESCRIPTOR itfc0; - USB_ENDPOINT_DESCRIPTOR ep1; - USB_ENDPOINT_DESCRIPTOR ep2; - USB_STRING_DESCRIPTOR_HEADER manHeader; - USB_STRING_CHAR manString[MANUFACTURER_NAME_SIZE]; - USB_STRING_DESCRIPTOR_HEADER prodHeader; - USB_STRING_CHAR prodString[PRODUCT_NAME_SIZE]; - USB_STRING_DESCRIPTOR_HEADER string4; - USB_STRING_CHAR displayString[DISPLAY_NAME_SIZE]; - USB_STRING_DESCRIPTOR_HEADER string5; - USB_STRING_CHAR friendlyString[FRIENDLY_NAME_SIZE]; - USB_OS_STRING_DESCRIPTOR OS_String; - USB_XCOMPATIBLE_OS_ID OS_XCompatible_ID; - USB_XPROPERTIES_OS_WINUSB OS_XProperty; - USB_DESCRIPTOR_HEADER endList; -}; - -extern const ADS_PACKED struct GNU_PACKED USB_DYNAMIC_CONFIGURATION UsbDefaultConfiguration; - -const struct USB_DYNAMIC_CONFIGURATION UsbDefaultConfiguration = -{ - // Device descriptor - { - { - USB_DEVICE_DESCRIPTOR_MARKER, - 0, - sizeof(USB_DEVICE_DESCRIPTOR) - }, - USB_DEVICE_DESCRIPTOR_LENGTH, // Length of device descriptor - USB_DEVICE_DESCRIPTOR_TYPE, // USB device descriptor type - 0x0200, // USB Version 2.00 (BCD) (2.0 required for Extended ID recognition) - 0, // Device class (none) - 0, // Device subclass (none) - 0, // Device protocol (none) - MAX_EP0_SIZE, // Endpoint 0 size - VENDOR_ID, // Vendor ID - PRODUCT_ID, // Product ID - DEVICE_RELEASE_VERSION, // Product version 1.00 (BCD) - MANUFACTURER_NAME_INDEX, // Manufacturer name string index - PRODUCT_NAME_INDEX, // Product name string index - 0, // Serial number string index (none) - 1 // Number of configurations - }, - - // Configuration descriptor - { - { - USB_CONFIGURATION_DESCRIPTOR_MARKER, - 0, - sizeof(USB_CONFIGURATION_DESCRIPTOR) - + sizeof(USB_INTERFACE_DESCRIPTOR) - + sizeof(USB_ENDPOINT_DESCRIPTOR) - + sizeof(USB_ENDPOINT_DESCRIPTOR) - }, - USB_CONFIGURATION_DESCRIPTOR_LENGTH, - USB_CONFIGURATION_DESCRIPTOR_TYPE, - USB_CONFIGURATION_DESCRIPTOR_LENGTH - + sizeof(USB_INTERFACE_DESCRIPTOR) - + sizeof(USB_ENDPOINT_DESCRIPTOR) - + sizeof(USB_ENDPOINT_DESCRIPTOR), - 1, // Number of interfaces - 1, // Number of this configuration - 0, // Config descriptor string index (none) - USB_ATTRIBUTES, // Config attributes - USB_MAX_CURRENT // Device max current draw - }, - - // Interface 0 descriptor - { - sizeof(USB_INTERFACE_DESCRIPTOR), - USB_INTERFACE_DESCRIPTOR_TYPE, - 0, // Interface number - 0, // Alternate number (main) - 2, // Number of endpoints - 0xFF, // Interface class (vendor) - 1, // Interface subclass - 1, // Interface protocol - 0 // Interface descriptor string index (none) - }, - - // Endpoint 1 descriptor - { - sizeof(USB_ENDPOINT_DESCRIPTOR), - USB_ENDPOINT_DESCRIPTOR_TYPE, - USB_ENDPOINT_DIRECTION_IN + 1, - USB_ENDPOINT_ATTRIBUTE_BULK, - 64, // Endpoint 1 packet size - 0 // Endpoint 1 interval - }, - - // Endpoint 2 descriptor - { - sizeof(USB_ENDPOINT_DESCRIPTOR), - USB_ENDPOINT_DESCRIPTOR_TYPE, - USB_ENDPOINT_DIRECTION_OUT + 2, - USB_ENDPOINT_ATTRIBUTE_BULK, - 64, // Endpoint 2 packet size - 0 // Endpoint 2 interval - }, - - // Manufacturer name string descriptor - { - { - USB_STRING_DESCRIPTOR_MARKER, - MANUFACTURER_NAME_INDEX, - sizeof(USB_STRING_DESCRIPTOR_HEADER) + (sizeof(USB_STRING_CHAR) * MANUFACTURER_NAME_SIZE) - }, - USB_STRING_DESCRIPTOR_HEADER_LENGTH + (sizeof(USB_STRING_CHAR) * MANUFACTURER_NAME_SIZE), - USB_STRING_DESCRIPTOR_TYPE - }, - { 'M', 'i', 'c', 'r', 'o', 's', 'o', 'f', 't', ' ', 'O', 'p', 'e', 'n', 'T', 'e', 'c', 'h', ' ' }, - - // Product name string descriptor - { - { - USB_STRING_DESCRIPTOR_MARKER, - PRODUCT_NAME_INDEX, - sizeof(USB_STRING_DESCRIPTOR_HEADER) + (sizeof(USB_STRING_CHAR) * PRODUCT_NAME_SIZE) - }, - USB_STRING_DESCRIPTOR_HEADER_LENGTH + (sizeof(USB_STRING_CHAR) * PRODUCT_NAME_SIZE), - USB_STRING_DESCRIPTOR_TYPE - }, - { 'S', 'T', 'M', '3', '2', 'F', '4', 'D', 'I', 'S', 'C', 'O', 'V', 'E', 'R', 'Y' }, - - // String 4 descriptor (display name) - { - { - USB_STRING_DESCRIPTOR_MARKER, - USB_DISPLAY_STRING_NUM, - sizeof(USB_STRING_DESCRIPTOR_HEADER) + (sizeof(USB_STRING_CHAR) * DISPLAY_NAME_SIZE) - }, - USB_STRING_DESCRIPTOR_HEADER_LENGTH + (sizeof(USB_STRING_CHAR) * DISPLAY_NAME_SIZE), - USB_STRING_DESCRIPTOR_TYPE - }, - { 'S', 'T', 'M', '3', '2', 'F', '4', 'D', 'I', 'S', 'C', 'O', 'V', 'E', 'R', 'Y' }, - - // String 5 descriptor (friendly name) - { - { - USB_STRING_DESCRIPTOR_MARKER, - USB_FRIENDLY_STRING_NUM, - sizeof(USB_STRING_DESCRIPTOR_HEADER) + (sizeof(USB_STRING_CHAR) * FRIENDLY_NAME_SIZE) - }, - USB_STRING_DESCRIPTOR_HEADER_LENGTH + (sizeof(USB_STRING_CHAR) * FRIENDLY_NAME_SIZE), - USB_STRING_DESCRIPTOR_TYPE - }, - { 'a', '7', 'e', '7', '0', 'e', 'a', '2' }, - - // OS Descriptor string for Extended OS Compat ID - { - { - USB_STRING_DESCRIPTOR_MARKER, - OS_DESCRIPTOR_STRING_INDEX, - sizeof(USB_DESCRIPTOR_HEADER) + OS_DESCRIPTOR_STRING_SIZE - }, - OS_DESCRIPTOR_STRING_SIZE, - USB_STRING_DESCRIPTOR_TYPE, - { 'M', 'S', 'F', 'T', '1', '0', '0' }, - OS_DESCRIPTOR_STRING_VENDOR_CODE, - 0x00 - }, - - // OS Extended Compatible ID for WinUSB - { - // Generic Descriptor header - { - { - USB_GENERIC_DESCRIPTOR_MARKER, - 0, - sizeof(USB_GENERIC_DESCRIPTOR_HEADER) + USB_XCOMPATIBLE_OS_SIZE - }, - USB_REQUEST_TYPE_IN | USB_REQUEST_TYPE_VENDOR, - OS_DESCRIPTOR_STRING_VENDOR_CODE, - 0, // Intfc # << 8 + Page # - USB_XCOMPATIBLE_OS_REQUEST // Extended Compatible OS ID request - }, - USB_XCOMPATIBLE_OS_SIZE, // Size of this descriptor - OS_DESCRIPTOR_EX_VERSION, // Version 1.00 (BCD) - USB_XCOMPATIBLE_OS_REQUEST, // Extended Compatible OS ID response - 1, // Only 1 function record - { 0, 0, 0, 0, 0, 0, 0 }, // (padding) - // Extended Compatible OS ID function record - 0, // Interface 0 - 1, // (reserved) - { 'W', 'I', 'N', 'U', 'S', 'B', 0, 0 }, // Compatible ID - { 0, 0, 0, 0, 0, 0, 0, 0 }, // Sub-compatible ID - { 0, 0, 0, 0, 0, 0 } // Padding - }, - - // OS Extended Property - { - // Generic Descriptor header - { - { - USB_GENERIC_DESCRIPTOR_MARKER, - 0, - sizeof(USB_GENERIC_DESCRIPTOR_HEADER) + USB_XPROPERTY_OS_SIZE_WINUSB - }, - USB_REQUEST_TYPE_IN | USB_REQUEST_TYPE_VENDOR | USB_REQUEST_TYPE_INTERFACE, - OS_DESCRIPTOR_STRING_VENDOR_CODE, - 0, // Intfc # << 8 + Page # - USB_XPROPERTY_OS_REQUEST // Extended Property OS ID request - }, - USB_XPROPERTY_OS_SIZE_WINUSB, // Size of this descriptor (78 bytes for guid + 40 bytes for the property name + 24 bytes for other fields = 142 bytes) - OS_DESCRIPTOR_EX_VERSION, // Version 1.00 (BCD) - USB_XPROPERTY_OS_REQUEST, // Extended Compatible OS ID response - 1, // Only 1 ex property record - // Extended Property OS ID function record - 0x00000084, // size in bytes - EX_PROPERTY_DATA_TYPE__REG_SZ, // data type (unicode string) - 40, // name length - // property name (null -terminated unicode string: 'DeviceInterfaceGuid\0') - { 'D','\0', 'e','\0', 'v','\0', 'i','\0', 'c','\0', 'e','\0', 'I','\0', 'n','\0', 't','\0', 'e','\0', 'r','\0', 'f','\0', 'a','\0', 'c','\0', 'e','\0', 'G','\0', 'u','\0', 'i','\0', 'd','\0', '\0','\0' }, - 78, // data length - // data ({D32D1D64-963D-463E-874A-8EC8C8082CBF}) - { '{','\0', 'D','\0', '3','\0', '2','\0', 'D','\0', '1','\0', 'D','\0', '6','\0', '4','\0', '-','\0', '9','\0', '6','\0', '3','\0', 'D','\0', '-','\0', '4','\0', '6','\0', '3','\0', 'E','\0', '-','\0', '8','\0', '7','\0', '4','\0', 'A','\0', '-','\0', '8','\0', 'E','\0', 'C','\0', '8','\0', 'C','\0', '8','\0', '0','\0', '8','\0', '2','\0', 'C','\0', 'B','\0', 'F','\0', '}','\0', '\0','\0' } - }, - - // End of configuration marker - { - USB_END_DESCRIPTOR_MARKER, - 0, - 0 - }, -}; diff --git a/Solutions/STM32F4DISCOVERY/STM32F4DISCOVERY.settings b/Solutions/STM32F4DISCOVERY/STM32F4DISCOVERY.settings index a2a5d139c..46cf3cd70 100644 --- a/Solutions/STM32F4DISCOVERY/STM32F4DISCOVERY.settings +++ b/Solutions/STM32F4DISCOVERY/STM32F4DISCOVERY.settings @@ -1,12 +1,13 @@  - CW2 + Eclo Solutions @@ -16,13 +17,32 @@ True le true + true - - STM32F4DISCOVERY by CW2 + STM32F4DISCOVERY by Eclo Solutions + + + + STM32F407xx + F4 + 1.13.0 + + + + + 0x0483 + 0xA08F + Microsoft OpenTech + STM32F4DISCOVERY + + - + + + + \ No newline at end of file diff --git a/Solutions/STM32F4DISCOVERY/TinyBooter/GNU_S/startup_tinyBooter.s b/Solutions/STM32F4DISCOVERY/TinyBooter/GNU_S/startup_tinyBooter.s new file mode 100644 index 000000000..7c0806631 --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/TinyBooter/GNU_S/startup_tinyBooter.s @@ -0,0 +1,532 @@ +/** + ****************************************************************************** + * @file startup_stm32f407xx.s + * @author Eclo Solutions + * @brief STM32F407xx Devices vector table for GCC based toolchains. Based in startup_stm32f407xx.s V2.4.3 + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global ARM_Vectors +.global Default_Handler +.global HeapBegin +.global HeapEnd +.global _end +.extern FAULT_SubHandler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/* start address of managed heap */ +.word HeapBegin +/* end address of managed heap */ +.word HeapEnd + + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler + +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type ARM_Vectors, %object + .size ARM_Vectors, .-ARM_Vectors + +ARM_Vectors: + .long _estack + .long Reset_Handler + .long NMI_Handler + .long HardFault_Handler + .long MemManage_Handler + .long BusFault_Handler + .long UsageFault_Handler + .long 0 + .long 0 + .long 0 + .long 0 + .long SVC_Handler + .long DebugMon_Handler + .long 0 + .long PendSV_Handler + .long SysTick_Handler + + /* External Interrupts */ + .long WWDG_IRQHandler /* Window WatchDog */ + .long PVD_IRQHandler /* PVD through EXTI Line detection */ + .long TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .long RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .long FLASH_IRQHandler /* FLASH */ + .long RCC_IRQHandler /* RCC */ + .long EXTI0_IRQHandler /* EXTI Line0 */ + .long EXTI1_IRQHandler /* EXTI Line1 */ + .long EXTI2_IRQHandler /* EXTI Line2 */ + .long EXTI3_IRQHandler /* EXTI Line3 */ + .long EXTI4_IRQHandler /* EXTI Line4 */ + .long DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .long DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .long DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .long DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .long DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .long DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .long DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .long ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .long CAN1_TX_IRQHandler /* CAN1 TX */ + .long CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .long CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .long CAN1_SCE_IRQHandler /* CAN1 SCE */ + .long EXTI9_5_IRQHandler /* External Line[9:5]s */ + .long TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .long TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .long TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .long TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .long TIM2_IRQHandler /* TIM2 */ + .long TIM3_IRQHandler /* TIM3 */ + .long TIM4_IRQHandler /* TIM4 */ + .long I2C1_EV_IRQHandler /* I2C1 Event */ + .long I2C1_ER_IRQHandler /* I2C1 Error */ + .long I2C2_EV_IRQHandler /* I2C2 Event */ + .long I2C2_ER_IRQHandler /* I2C2 Error */ + .long SPI1_IRQHandler /* SPI1 */ + .long SPI2_IRQHandler /* SPI2 */ + .long USART1_IRQHandler /* USART1 */ + .long USART2_IRQHandler /* USART2 */ + .long USART3_IRQHandler /* USART3 */ + .long EXTI15_10_IRQHandler /* External Line[15:10]s */ + .long RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .long OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .long TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .long TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .long TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .long TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .long DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .long FSMC_IRQHandler /* FSMC */ + .long SDIO_IRQHandler /* SDIO */ + .long TIM5_IRQHandler /* TIM5 */ + .long SPI3_IRQHandler /* SPI3 */ + .long UART4_IRQHandler /* UART4 */ + .long UART5_IRQHandler /* UART5 */ + .long TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .long TIM7_IRQHandler /* TIM7 */ + .long DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .long DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .long DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .long DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .long DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .long ETH_IRQHandler /* Ethernet */ + .long ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .long CAN2_TX_IRQHandler /* CAN2 TX */ + .long CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .long CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .long CAN2_SCE_IRQHandler /* CAN2 SCE */ + .long OTG_FS_IRQHandler /* USB OTG FS */ + .long DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .long DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .long DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .long USART6_IRQHandler /* USART6 */ + .long I2C3_EV_IRQHandler /* I2C3 event */ + .long I2C3_ER_IRQHandler /* I2C3 error */ + .long OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .long OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .long OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .long OTG_HS_IRQHandler /* USB OTG HS */ + .long DCMI_IRQHandler /* DCMI */ + .long 0 /* CRYP crypto */ + .long HASH_RNG_IRQHandler /* Hash and Rng */ + .long FPU_IRQHandler /* FPU */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,FAULT_SubHandler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,FAULT_SubHandler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + /*.weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler*/ + + /*.weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler*/ + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + /* implemented at Int_Handlers.c */ + /*.weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler*/ + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooter.proj b/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooter.proj index 3c4ee2ece..2ac230809 100644 --- a/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooter.proj +++ b/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooter.proj @@ -9,7 +9,7 @@ False - $(SPOCLIENT)\Solutions\STM32F4DISCOVERY\STM32F4DISCOVERY.settings + $(SPOCLIENT)\Solutions\STM32F4DISCOVERY\TinyBooter\TinyBooter.settings True true @@ -23,15 +23,13 @@ $(ExtraTargets);CompressBin scatterfile_bootloader_$(COMPILER_TOOL).$(SCATTER_EXT) scatterfile_bootloader_$(COMPILER_TOOL).$(SCATTER_EXT) + true - - - - + @@ -42,213 +40,124 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + - - - - - - - - - - - - - + + + - - - - - - - - - + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + - - + + + + + + + + - + + + + + + + + + + + - - - - - - - - - - - - @@ -257,17 +166,6 @@ - - - - - - - - - - - - + - \ No newline at end of file + diff --git a/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooter.settings b/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooter.settings new file mode 100644 index 000000000..193188a17 --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooter.settings @@ -0,0 +1,13 @@ + + + + Eclo Solutions + + + + + + + + + diff --git a/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooterEntry.cpp b/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooterEntry.cpp index 69c5a71a7..69a37676f 100644 --- a/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooterEntry.cpp +++ b/Solutions/STM32F4DISCOVERY/TinyBooter/TinyBooterEntry.cpp @@ -14,14 +14,8 @@ #include #include -// boot loader doesn't use the CMSIS-RTOS kernel, so sleep goes direct -// to the low level support -extern void HAL_CPU_Sleep( SLEEP_LEVEL level, UINT64 wakeEvents ); - -void CPU_Sleep( SLEEP_LEVEL level, UINT64 wakeEvents ) -{ - HAL_CPU_Sleep( level, wakeEvents ); -} +extern GenericPortTableEntry const Itm0GenericPort; +extern GenericPortTableEntry const* const g_GenericPorts[TOTAL_GENERIC_PORTS] = { &Itm0GenericPort }; //////////////////////////////////////////////////////////////////////////////// // Tinybooter_ProgramWordCheck @@ -279,4 +273,3 @@ BOOL TinyBooter_GetReleaseInfo(MfReleaseInfo& releaseInfo) ); return TRUE; } - diff --git a/Solutions/STM32F4DISCOVERY/TinyBooter/allocator.cpp b/Solutions/STM32F4DISCOVERY/TinyBooter/allocator.cpp index 59ddd068e..36898c3e5 100644 --- a/Solutions/STM32F4DISCOVERY/TinyBooter/allocator.cpp +++ b/Solutions/STM32F4DISCOVERY/TinyBooter/allocator.cpp @@ -41,3 +41,15 @@ void operator delete[] (void*) } //////////////////////////////////////////////////////////////////////////////// + +// remap private_malloc to standard C malloc +void *private_malloc(size_t size) +{ + return malloc(size); +} + +// remap private_free to standard C free +void private_free(void *ptr) +{ + free(ptr); +} diff --git a/Solutions/STM32F4DISCOVERY/TinyBooter/features.settings b/Solutions/STM32F4DISCOVERY/TinyBooter/features.settings new file mode 100644 index 000000000..9b750585d --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/TinyBooter/features.settings @@ -0,0 +1,40 @@ + + + + Eclo Solutions + + + + + + + + True + False + False + False + False + False + False + + True + False + False + False + False + False + True + False + True + + False + False + False + False + False + False + False + False + False + + diff --git a/Solutions/STM32F4DISCOVERY/TinyBooter/scatterfile_bootloader_gcc.xml b/Solutions/STM32F4DISCOVERY/TinyBooter/scatterfile_bootloader_gcc.xml index 9b7ada5df..fb4da2c05 100644 --- a/Solutions/STM32F4DISCOVERY/TinyBooter/scatterfile_bootloader_gcc.xml +++ b/Solutions/STM32F4DISCOVERY/TinyBooter/scatterfile_bootloader_gcc.xml @@ -32,7 +32,7 @@ --> - + @@ -43,11 +43,9 @@ - - - + - + @@ -60,102 +58,166 @@ - + + + + + + + + + - - - - - - - - - - - - - - - - - - - - + + + + + + - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - + + - - - - + + + - - - + - + - - + + + + + + + + + + + + + + - - + + + + + + + + + + + + + + + + + - - - - + + + + + + + + - - - + + + + + + + + - - - + + + + + + + + + - - - + + + diff --git a/Solutions/STM32F4DISCOVERY/TinyCLR/GNU_S/startup_tinyCLR.s b/Solutions/STM32F4DISCOVERY/TinyCLR/GNU_S/startup_tinyCLR.s new file mode 100644 index 000000000..e4c8e0821 --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/TinyCLR/GNU_S/startup_tinyCLR.s @@ -0,0 +1,549 @@ +/** + ****************************************************************************** + * @file startup_stm32f407xx.s + * @author Eclo Solutions + * @brief STM32F407xx Devices vector table for GCC based toolchains. Based in startup_stm32f407xx.s V2.4.3 + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global ARM_Vectors +.global Default_Handler +.global HeapBegin +.global HeapEnd +.global _end +.extern FAULT_SubHandler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/* start address of managed heap */ +.word HeapBegin +/* end address of managed heap */ +.word HeapEnd + + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + +.section SectionForPowerOnReset, "ax", %progbits +PowerOnReset: + + .word __initial_sp + .word Reset_Handler @ Reset + .word Fault_Handler @ NMI + .word Fault_Handler @ Hard Fault + .word Fault_Handler @ MMU Fault + .word Fault_Handler @ Bus Fault + .word Fault_Handler @ Usage Fault + + .text + .thumb + .thumb_func + .align 2 + .weak Reset_Handler + .type Reset_Handler, %function + + .section i.EntryPoint, "ax", %progbits +//EntryPoint: +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .VectorTable,"a",%progbits + .type ARM_Vectors, %object + .size ARM_Vectors, .-ARM_Vectors + + +ARM_Vectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word 0 /* CRYP crypto */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,FAULT_SubHandler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,FAULT_SubHandler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + /*.weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler*/ + + /*.weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler*/ + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + /* implemented at Int_Handlers.c */ + /*.weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler*/ + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Solutions/STM32F4DISCOVERY/TinyCLR/TinyCLR.proj b/Solutions/STM32F4DISCOVERY/TinyCLR/TinyCLR.proj index bb8254842..f55a5e401 100644 --- a/Solutions/STM32F4DISCOVERY/TinyCLR/TinyCLR.proj +++ b/Solutions/STM32F4DISCOVERY/TinyCLR/TinyCLR.proj @@ -9,7 +9,7 @@ True - $(SPOCLIENT)\Solutions\STM32F4DISCOVERY\STM32F4DISCOVERY.settings + $(SPOCLIENT)\Solutions\STM32F4DISCOVERY\TinyCLR\TinyCLR.settings True false @@ -30,8 +30,7 @@ EntryPoint TinyClr_Dat_Start g_ConfigurationSector - - false + true @@ -40,34 +39,149 @@ - - - + + + + + - - + + - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - + + + + + + + + + + + + + + + + + + + + + + @@ -104,198 +218,30 @@ - - - - - + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + @@ -316,18 +262,6 @@ - - - - - - - - - - - - @@ -344,10 +278,6 @@ - - - - @@ -368,10 +298,10 @@ - + @@ -384,22 +314,18 @@ - + + + @@ -412,14 +338,10 @@ - + diff --git a/Solutions/STM32F4DISCOVERY/TinyCLR/TinyCLR.settings b/Solutions/STM32F4DISCOVERY/TinyCLR/TinyCLR.settings new file mode 100644 index 000000000..0f2ed8e3f --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/TinyCLR/TinyCLR.settings @@ -0,0 +1,13 @@ + + + + Eclo Solutions + + + + + + + + + diff --git a/Solutions/STM32F4DISCOVERY/TinyCLR/allocator.cpp b/Solutions/STM32F4DISCOVERY/TinyCLR/allocator.cpp index 372f95138..b40a5f435 100644 --- a/Solutions/STM32F4DISCOVERY/TinyCLR/allocator.cpp +++ b/Solutions/STM32F4DISCOVERY/TinyCLR/allocator.cpp @@ -8,24 +8,36 @@ //////////////////////////////////////////////////////////////////////////////// -void *operator new( size_t n ) -{ - return private_malloc( n ); -} +// void *operator new( size_t n ) +// { +// return private_malloc( n ); +// } + +// void *operator new[]( size_t n ) +// { +// return private_malloc( n ); +// } + +// void operator delete( void* p ) +// { +// return private_free( p ); +// } + +// void operator delete[]( void* p ) +// { +// return private_free( p ); +// } -void *operator new[]( size_t n ) -{ - return private_malloc( n ); -} +//////////////////////////////////////////////////////////////////////////////// -void operator delete( void* p ) +// remap private_malloc to standard C malloc +void *private_malloc(size_t size) { - return private_free( p ); + return malloc(size); } -void operator delete[]( void* p ) +// remap private_free to standard C free +void private_free(void *ptr) { - return private_free( p ); + free(ptr); } - -//////////////////////////////////////////////////////////////////////////////// diff --git a/Solutions/STM32F4DISCOVERY/TinyCLR/features.settings b/Solutions/STM32F4DISCOVERY/TinyCLR/features.settings new file mode 100644 index 000000000..73d7cbf20 --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/TinyCLR/features.settings @@ -0,0 +1,40 @@ + + + + Eclo Solutions + + + + + + + + True + False + False + True + False + False + False + + True + False + False + False + False + False + True + False + True + + False + False + False + False + False + False + False + False + False + + diff --git a/Solutions/STM32F4DISCOVERY/TinyCLR/scatterfile_tinyclr_gcc.xml b/Solutions/STM32F4DISCOVERY/TinyCLR/scatterfile_tinyclr_gcc.xml index ad604bb70..d994e909f 100644 --- a/Solutions/STM32F4DISCOVERY/TinyCLR/scatterfile_tinyclr_gcc.xml +++ b/Solutions/STM32F4DISCOVERY/TinyCLR/scatterfile_tinyclr_gcc.xml @@ -6,7 +6,6 @@ - + - - - - + + - - + - - + + + + + + + + - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - + + + + + - - - - + + - - - - - - - + + + + + + - - - - + + + - - + + + + + + + + + + + + + + + + + - - - - + + + + + + + + - - - - - - - - + + + + + + - - - - - - - - - + + - - - + + + + + + + + - + + - - - + + + @@ -180,4 +247,3 @@ - diff --git a/Solutions/STM32F4DISCOVERY/TinyCLR/scatterfile_tinyclr_net_gcc.xml b/Solutions/STM32F4DISCOVERY/TinyCLR/scatterfile_tinyclr_net_gcc.xml new file mode 100644 index 000000000..f604dd19d --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/TinyCLR/scatterfile_tinyclr_net_gcc.xml @@ -0,0 +1,403 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Solutions/STM32F4DISCOVERY/TinyCLR/tinyclr.cpp b/Solutions/STM32F4DISCOVERY/TinyCLR/tinyclr.cpp index 14990758b..ed5c7ca58 100644 --- a/Solutions/STM32F4DISCOVERY/TinyCLR/tinyclr.cpp +++ b/Solutions/STM32F4DISCOVERY/TinyCLR/tinyclr.cpp @@ -5,11 +5,8 @@ #include #include -extern void HAL_CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents); -void CPU_Sleep(SLEEP_LEVEL level, UINT64 wakeEvents) -{ - HAL_CPU_Sleep(level, wakeEvents); -} +extern GenericPortTableEntry const Itm0GenericPort; +extern GenericPortTableEntry const* const g_GenericPorts[TOTAL_GENERIC_PORTS] = { &Itm0GenericPort }; //////////////////////////////////////////////////////////////////////////////// void ApplicationEntryPoint() diff --git a/Solutions/STM32F4DISCOVERY/dotnetmf.proj b/Solutions/STM32F4DISCOVERY/dotnetmf.proj index b62b5da84..6857e72f9 100644 --- a/Solutions/STM32F4DISCOVERY/dotnetmf.proj +++ b/Solutions/STM32F4DISCOVERY/dotnetmf.proj @@ -1,14 +1,21 @@  - - - Solutions\STM32F4DISCOVERY - $(SPOCLIENT)\Solutions\STM32F4DISCOVERY\STM32F4DISCOVERY.settings - - + + + Solutions\STM32F4DISCOVERY + $(SPOCLIENT)\Solutions\STM32F4DISCOVERY + $(SPOCLIENT)\Solutions\STM32F4DISCOVERY\STM32F4DISCOVERY.settings + + - - - + + + + + + + + + \ No newline at end of file diff --git a/Solutions/STM32F4DISCOVERY/platform_selector.h b/Solutions/STM32F4DISCOVERY/platform_selector.h index e1cf20592..53db74aad 100644 --- a/Solutions/STM32F4DISCOVERY/platform_selector.h +++ b/Solutions/STM32F4DISCOVERY/platform_selector.h @@ -26,6 +26,9 @@ #if defined(PLATFORM_ARM_STM32F4DISCOVERY) #define HAL_SYSTEM_NAME "STM32F4DISCOVERY" +// FIXME +// the following can be removed after complete migration to CMSIS HAL/PAL +#define STM32F4XX 1 #define PLATFORM_ARM_STM32F4 1 // STM32F407 cpu #define USB_ALLOW_CONFIGURATION_OVERRIDE 1 @@ -39,15 +42,7 @@ // constants // -#define GPIO_PORTA 0 -#define GPIO_PORTB 1 -#define GPIO_PORTC 2 -#define GPIO_PORTD 3 -#define GPIO_PORTE 4 -// The remaining ports are not broken out - except PH0 and PH1, -// which are deliberately omitted to keep the range continuous. - -#define PORT_PIN(port,pin) ( ( (int)port) * 16 + ( pin ) ) +#define GPIO_PINS {GPIO_PIN_0,GPIO_PIN_1,GPIO_PIN_2,GPIO_PIN_3,GPIO_PIN_4,GPIO_PIN_5,GPIO_PIN_6,GPIO_PIN_7,GPIO_PIN_8,GPIO_PIN_9,GPIO_PIN_10,GPIO_PIN_11,GPIO_PIN_12,GPIO_PIN_13,GPIO_PIN_14,GPIO_PIN_15} // System clock #define SYSTEM_CLOCK_HZ 168000000 // 168 MHz @@ -55,15 +50,7 @@ #define SYSTEM_APB1_CLOCK_HZ 42000000 // 42 MHz #define SYSTEM_APB2_CLOCK_HZ 84000000 // 84 MHz -#define SYSTEM_CRYSTAL_CLOCK_HZ 8000000 // 8 MHz external clock - -#define SUPPLY_VOLTAGE_MV 3300 // 3.3V supply - -#define CLOCK_COMMON_FACTOR 1000000 // GCD(SYSTEM_CLOCK_HZ, 1M) - #define SLOW_CLOCKS_PER_SECOND 1000000 // 1 MHz -#define SLOW_CLOCKS_TEN_MHZ_GCD 1000000 // GCD(SLOW_CLOCKS_PER_SECOND, 10M) -#define SLOW_CLOCKS_MILLISECOND_GCD 1000 // GCD(SLOW_CLOCKS_PER_SECOND, 1k) #define FLASH_MEMORY_Base 0x08000000 #define FLASH_MEMORY_Size 0x00100000 @@ -97,38 +84,80 @@ #define USB_MAX_QUEUES 4 // 4 endpoints (EP0 + 3) // System Timer Configuration -#define STM32F4_32B_TIMER 2 -#define STM32F4_16B_TIMER 3 - +// #define HAL_32B_TIMER 2 +// #define HAL_16B_TIMER 3 + +/* Choose if wake-up from STOP mode is in fast mode or not. +This selects which regulator is on during stop mode. +By keeping the internal regulator ON during Stop mode, the consumption +is higher although the startup time is reduced. +When the voltage regulator operates in low power mode, an additional +startup delay is incurred when waking up from Stop mode. */ +//#define FAST_WAKEUP_FROM_STOP + +/* GPIOs */ +// PA.0 'User' button +// PD.13 LED3 (orange) +// PD.12 LED4 (green) +// PD.14 LED5 (red) +// PD.15 LED6 (blue) + +#define GPIO_PORT_PINS \ +{\ + {GPIOA, GPIO_PIN_0},\ + {GPIOD, GPIO_PIN_13},\ + {GPIOD, GPIO_PIN_12},\ + {GPIOD, GPIO_PIN_14},\ + {GPIOD, GPIO_PIN_15},\ +} + +/* ADC */ // Pin Configuration -#define STM32F4_ADC 3 -#define STM32F4_AD_CHANNELS {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15} - -#define STM32F4_PWM_TIMER {4,4,4,4} -#define STM32F4_PWM_CHNL {0,1,2,3} -#define STM32F4_PWM_PINS {60,61,62,63} // PD12-PD15 - -#define STM32F4_SPI_SCLK_PINS {5, 29, 42} // PA5, PB13, PC10 -#define STM32F4_SPI_MISO_PINS {6, 30, 43} // PA6, PB14, PC11 -#define STM32F4_SPI_MOSI_PINS {7, 31, 44} // PA7, PB15, PC12 - -#define STM32F4_I2C_PORT 1 -#define STM32F4_I2C_SCL_PIN PORT_PIN( GPIO_PORTB, 8 ) // PB8 -#define STM32F4_I2C_SDA_PIN PORT_PIN( GPIO_PORTB, 9 ) // PB9 +#define USER_ADC 3 +// choose a maximum of 8 channels and a minimum of one +// ** IMPORTANT ** internal channels 16 and 17 are not available in ADC3 +#define AD_CHANNELS {0,1,2,3,4,5,6,7}//,8,9,10,11,12,13,14,15,16,17} + +/* DAC */ +// Uncomment only one of the following defines for DAC +//#define USE_DAC_CHANNEL_1 +//#define USE_DAC_CHANNEL_2 +#define USE_BOTH_DAC_CHANNEL + +#define PWM_TIMER {4,4,4,4} +#define PWM_CHNL {0,1,2,3} +#define PWM_PINS {60,61,62,63} // PD12-PD15 + +/* SPI */ +// add to SPI_PORTS array the SPI ports that are available in the solution +// please check which SPI ports are available in the device datasheet +// uncomment the following define and leave the SPI ports that are available in your hardware +#define SPI_PORTS {SPI1, SPI2, SPI3} + +/* USART/UART */ +// add to USART_PORTS array the USART ports that are available in the solution +// please check which USART ports are available in the device datasheet +// uncomment the following define and leave the USART ports that are available in your hardware and you intend to use +// NOTE: UART5 is not supported because TX and RX are handled in different ports +#define USART_PORTS {USART1, USART2, USART6} +#define USART_PORTS_TX_RX {GPIOA, GPIOD, GPIOC} +// to use flow control, uncomment below define and leave the USART ports that are available in your hardware and you intend to use +#define GPIO_NO_PORT 0 +#define USART_PORTS_FLOW_CONTROL {GPIO_NO_PORT, GPIO_NO_PORT, GPIO_NO_PORT} #define STM32F4_UART_RXD_PINS {23, 54, 43} // PB7, D6, C11 #define STM32F4_UART_TXD_PINS {22, 53, 42} // PB6, D5, C10 #define STM32F4_UART_CTS_PINS {(BYTE)GPIO_PIN_NONE, 51, 59} // GPIO_PIN_NONE, D3, D11 #define STM32F4_UART_RTS_PINS {(BYTE)GPIO_PIN_NONE, 52, 60} // GPIO_PIN_NONE, D4, D12 -// User LEDs -#define LED3 PORT_PIN(GPIO_PORTD, 13) // PD.13 (orange) -#define LED4 PORT_PIN(GPIO_PORTD, 12) // PD.12 (green) -#define LED5 PORT_PIN(GPIO_PORTD, 14) // PD.14 (red) -#define LED6 PORT_PIN(GPIO_PORTD, 15) // PD.15 (blue) +// User LEDs are defined as GPIO ports above in GPIO_PORT_PINS @ the following indexes +#define LED3 1 // (orange) +#define LED4 2 // (green) +#define LED5 3 // (red) +#define LED6 4 // (blue) // TinyBooter entry using GPIO -#define TINYBOOTER_ENTRY_GPIO_PIN PORT_PIN(GPIO_PORTA, 0) // 'User' button +#define TINYBOOTER_ENTRY_GPIO_PIN 0 // 'User' button being GPIO port @ index 0 above in GPIO_PORT_PINS #define TINYBOOTER_ENTRY_GPIO_STATE TRUE // Active high #define TINYBOOTER_ENTRY_GPIO_RESISTOR RESISTOR_DISABLED // No internal resistor, there is external pull-down (R39) @@ -136,7 +165,7 @@ // constants ///////////////////////////////////////////////////////// -#include +#include "processor_selector.h" #endif // PLATFORM_ARM_STM32F4DISCOVERY diff --git a/Solutions/STM32F4DISCOVERY/readme.md b/Solutions/STM32F4DISCOVERY/readme.md new file mode 100644 index 000000000..a3f82f144 --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/readme.md @@ -0,0 +1,63 @@ +### Recipe to configure a NETMF solution ### + +Please note the following (**and this is _EXTREMELY_ important**): +- you must keep the solution name consistent throughout the find/replace/renaming that follows. Failing to do so will result in compilation errors and possibly in bugs that might be hard to track specially if they are using other solutions that already exist in the repository tree. +- In all proj files and some settings file there are GUIDs with tags `````` and ``````. You have to replace them with new ones. + + +##### Pre-requisites ##### + +In order to start configuring a new solution you need to check if the HAL/PAL of the MCU you are targeting are already implemented. +The current NETMF implementation is based in CMSIS. You may want to look into the following folders and search for the appropriate MCU vendor and series/familly names: +- \CMSIS\Device\... +- \DeviceCode\Targets\Native\... + +For example, to implement a solution targeting ST's STM32F4-DISCOVERY board, you should find there: +- \CMSIS\Device\\**ST**\\**STM32F4xx** +- \DeviceCode\Targets\Native\\**STM32F4xx** + +The CMSIS folder has the header files for the STM32F4 series. +The Tartgets\Native folder has the header and code that implements the HAL for the STM32F4 series. + +If these don't exist then you must start by adding support for the appropriate vendor and series/familly CMSIS and HAL/PAL. + +##### Step-by-step ##### + +1. Start by copying an existing solution folder and rename it to something appropriate. For obvious reasons it's recommended that you choose one that is similar to the MCU/board that you are targeting. + +2. Edit the **dotnetmf.proj** file (located in the solution home folder). + 1. Find/replace the original solution name in the first `````` block. + 2. Near the bottom finf the group `````` and at ``` - - - - - - - - - - - - - - - - - - diff --git a/Solutions/STM32F4DISCOVERY/stm32f4xx_hal_conf.h b/Solutions/STM32F4DISCOVERY/stm32f4xx_hal_conf.h new file mode 100644 index 000000000..029fadc1c --- /dev/null +++ b/Solutions/STM32F4DISCOVERY/stm32f4xx_hal_conf.h @@ -0,0 +1,444 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_conf.h + * @brief HAL configuration file based in stm32f4xx_hal_conf_template.h V1.4.4 + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2016 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F4xx_HAL_CONF_H +#define __STM32F4xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +#define HAL_ADC_MODULE_ENABLED +#define HAL_CAN_MODULE_ENABLED +#define HAL_CRC_MODULE_ENABLED +#define HAL_CEC_MODULE_ENABLED +#define HAL_CRYP_MODULE_ENABLED +#define HAL_DAC_MODULE_ENABLED +//#define HAL_DCMI_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_DMA2D_MODULE_ENABLED +#define HAL_ETH_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +//#define HAL_NAND_MODULE_ENABLED +//#define HAL_NOR_MODULE_ENABLED +//#define HAL_PCCARD_MODULE_ENABLED +//#define HAL_SRAM_MODULE_ENABLED +//#define HAL_SDRAM_MODULE_ENABLED +#define HAL_HASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +//#define HAL_I2S_MODULE_ENABLED +//#define HAL_IWDG_MODULE_ENABLED +#define HAL_LTDC_MODULE_ENABLED +#define HAL_DSI_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +//#define HAL_QSPI_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_RNG_MODULE_ENABLED +#define HAL_RTC_MODULE_ENABLED +//#define HAL_SAI_MODULE_ENABLED +//#define HAL_SD_MODULE_ENABLED +#define HAL_SPI_MODULE_ENABLED +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +//#define HAL_IRDA_MODULE_ENABLED +//#define HAL_SMARTCARD_MODULE_ENABLED +//#define HAL_WWDG_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_PCD_MODULE_ENABLED +#define HAL_HCD_MODULE_ENABLED +//#define HAL_FMPI2C_MODULE_ENABLED +//#define HAL_SPDIFRX_MODULE_ENABLED +//#define HAL_LPTIM_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE (3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0x0) /*!< tick interrupt priority */ +#define USE_RTOS 0U +//#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2U +#define MAC_ADDR1 0U +#define MAC_ADDR2 0U +#define MAC_ADDR3 0U +#define MAC_ADDR4 0U +#define MAC_ADDR5 0U + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848 PHY Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FFU) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU) + +#define PHY_READ_TO ((uint32_t)0x0000FFFFU) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ + +#define PHY_SR ((uint16_t)0x0010U) /*!< PHY status register Offset */ +#define PHY_MICR ((uint16_t)0x0011U) /*!< MII Interrupt Control Register */ +#define PHY_MISR ((uint16_t)0x0012U) /*!< MII Interrupt Status and Misc. Control Register */ + +#define PHY_LINK_STATUS ((uint16_t)0x0001U) /*!< PHY Link mask */ +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +#define PHY_MICR_INT_EN ((uint16_t)0x0002U) /*!< PHY Enable interrupts */ +#define PHY_MICR_INT_OE ((uint16_t)0x0001U) /*!< PHY Enable output interrupt events */ + +#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020U) /*!< Enable Interrupt on change of link status */ +#define PHY_LINK_INTERRUPT ((uint16_t)0x2000U) /*!< PHY link status interrupt mask */ + +/* ################## SPI peripheral configuration ########################## */ + +/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver +* Activated: CRC code is present inside driver +* Deactivated: CRC code cleaned from driver +*/ + +#define USE_SPI_CRC 1U + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f4xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f4xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f4xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f4xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f4xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f4xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f4xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32f4xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32f4xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f4xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32f4xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f4xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f4xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f4xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f4xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f4xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32f4xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32f4xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f4xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f4xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f4xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED + #include "stm32f4xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f4xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32f4xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f4xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32f4xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f4xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f4xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f4xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f4xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f4xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f4xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f4xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f4xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f4xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f4xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32f4xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32f4xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f4xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_FMPI2C_MODULE_ENABLED + #include "stm32f4xx_hal_fmpi2c.h" +#endif /* HAL_FMPI2C_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32f4xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED + #include "stm32f4xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F4xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/tools/Targets/Microsoft.SPOT.Features.Settings b/tools/Targets/Microsoft.SPOT.Features.Settings new file mode 100644 index 000000000..b51917852 --- /dev/null +++ b/tools/Targets/Microsoft.SPOT.Features.Settings @@ -0,0 +1,88 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/tools/Targets/Microsoft.SPOT.System.Settings b/tools/Targets/Microsoft.SPOT.System.Settings index e43137fc0..17d12c437 100644 --- a/tools/Targets/Microsoft.SPOT.System.Settings +++ b/tools/Targets/Microsoft.SPOT.System.Settings @@ -1,3 +1,4 @@ + @@ -131,4 +132,5 @@ + \ No newline at end of file diff --git a/tools/Targets/Microsoft.Spot.system.gcc.targets b/tools/Targets/Microsoft.Spot.system.gcc.targets index 20f2b19e2..e2f9f994f 100644 --- a/tools/Targets/Microsoft.Spot.system.gcc.targets +++ b/tools/Targets/Microsoft.Spot.system.gcc.targets @@ -52,7 +52,7 @@ $(CC_CPP_TARGETTYPE_FLAGS) -O0 $(CC_CPP_TARGETTYPE_FLAGS) -Os - $(CC_FLAGS)-xc + $(CC_FLAGS)-std=c11 -xc -O3 -Og -femit-class-debug-always -g3 -ggdb @@ -67,7 +67,7 @@ NETMF already builds under two other compilers, so warnings from yet another compiler aren't really that valuable anyway. --> - $(CPP_FLAGS)-xc++ -w -fcheck-new -fabi-version=0 -fno-exceptions -fno-rtti -fno-use-cxa-atexit -fno-threadsafe-statics + $(CPP_FLAGS)-std=c++11 -xc++ -w -fcheck-new -fabi-version=0 -fno-exceptions -fno-rtti -fno-use-cxa-atexit -fno-threadsafe-statics -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mfloat-abi=softfp -mfpu=fpv4-sp-d16 @@ -163,21 +163,22 @@ $(CC_CPP_COMMON_FLAGS) @(TinyCLR_Defines->'-D%(filename)',' ') $(CC_CPP_COMMON_FLAGS) @(CC_CPP_Defines->'-D%(filename)',' ') - - $(CC_CPP_INCS) -I$(CLRROOT)\$(Directory) - $(CC_CPP_INCS) -I$(SPO_SDK)\DeviceCode\include - $(CC_CPP_INCS) -I$(SPO_SDK)\DeviceCode\Cores\arm - $(CC_CPP_INCS) -I$(SPO_SDK)\Support\Include - $(CC_CPP_INCS) -I$(SPO_SDK)\crypto\inc - $(CC_CPP_INCS) -I$(SPO_SDK)\CLR\Include - $(CC_CPP_INCS) -I$(SPO_SDK)\CLR\Libraries\CorLib - $(CC_CPP_INCS) -I$(SPO_SDK)\CLR\Libraries\SPOT - $(CC_CPP_INCS) -I$(SPO_SDK)\CLR\Libraries\SPOT_Hardware - $(CC_CPP_INCS) -I$(SPO_SDK)\CLR\Libraries\SPOT_Graphics - $(CC_CPP_INCS) -I$(SPO_SDK)\CLR\Libraries\SPOT_Net + $(CC_CPP_COMMON_FLAGS) -DUSBD_VID=$(USB_VID) -DUSBD_PID=$(USB_PID) -DUSBD_MANUFACTURER_STRING="\"$(USB_MANUFACTURER)\"" -DUSBD_PRODUCT_HS_STRING="\"$(USB_PRODUCT)\"" -DUSBD_PRODUCT_FS_STRING="\"$(USB_PRODUCT)\"" + + $(CC_CPP_INCS) -I"$(CLRROOT)\$(Directory)" + $(CC_CPP_INCS) -I"$(SPO_SDK)\DeviceCode\include" + $(CC_CPP_INCS) -I"$(SPO_SDK)\DeviceCode\Cores\arm" + $(CC_CPP_INCS) -I"$(SPO_SDK)\Support\Include" + $(CC_CPP_INCS) -I"$(SPO_SDK)\crypto\inc" + $(CC_CPP_INCS) -I"$(SPO_SDK)\CLR\Include" + $(CC_CPP_INCS) -I"$(SPO_SDK)\CLR\Libraries\CorLib" + $(CC_CPP_INCS) -I"$(SPO_SDK)\CLR\Libraries\SPOT" + $(CC_CPP_INCS) -I"$(SPO_SDK)\CLR\Libraries\SPOT_Hardware" + $(CC_CPP_INCS) -I"$(SPO_SDK)\CLR\Libraries\SPOT_Graphics" + $(CC_CPP_INCS) -I"$(SPO_SDK)\CLR\Libraries\SPOT_Net" $(CC_CPP_INCS) -I"$(ARMINC)" - $(CC_CPP_INCS) @(IncludePaths->'-I$(CLRROOT)\%(relativedir)%(filename)',' ') - $(CC_CPP_INCS) @(DirectIncludePaths->'-I%(FullPath)',' ') + $(CC_CPP_INCS) @(IncludePaths->'-I"$(CLRROOT)\%(relativedir)%(filename)"',' ') + $(CC_CPP_INCS) @(DirectIncludePaths->'-I"%(FullPath)"',' ') $(CC_CPP_COMMON_FLAGS) $(AS_CC_CPP_COMMON_FLAGS) $(CC_CPP_TARGETTYPE_FLAGS) $(CC_CPP_INCS) $(ExtraFlags) @@ -221,7 +222,7 @@ -lstdc++ -lsupc++ -lm -lgcc -lc - -specs="$(GNU_LIBGCC_DIR)\nano.specs" + -specs="$(GNU_LIBGCC_DIR)\nano.specs" -specs="$(GNU_LIBGCC_DIR)\nosys.specs" diff --git a/tools/Targets/Microsoft.Spot.system.mdk.targets b/tools/Targets/Microsoft.Spot.system.mdk.targets index f24b4acbd..06c9d264e 100644 --- a/tools/Targets/Microsoft.Spot.system.mdk.targets +++ b/tools/Targets/Microsoft.Spot.system.mdk.targets @@ -195,6 +195,7 @@ $(CC_CPP_COMMON_FLAGS) @(TinyCLR_Defines->'-D%(filename)',' ') $(CC_CPP_COMMON_FLAGS) @(CC_CPP_Defines->'-D%(filename)',' ') + $(CC_CPP_COMMON_FLAGS) -DUSBD_VID=$(USB_VID) -DUSBD_PID=$(USB_PID) -DUSBD_MANUFACTURER_STRING="\"$(USB_MANUFACTURER)\"" -DUSBD_PRODUCT_HS_STRING="\"$(USB_PRODUCT)\"" -DUSBD_PRODUCT_FS_STRING="\"$(USB_PRODUCT)\"" $(CC_CPP_INCS) -I$(CLRROOT)\$(Directory) $(CC_CPP_INCS) -I$(SPO_SDK)\DeviceCode\include